1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6 #include <linux/skbuff.h>
7 #include <linux/ctype.h>
8 #include <net/mac80211.h>
9 #include <net/cfg80211.h>
10 #include <linux/completion.h>
11 #include <linux/if_ether.h>
12 #include <linux/types.h>
13 #include <linux/pci.h>
14 #include <linux/uuid.h>
15 #include <linux/time.h>
16 #include <linux/of.h>
17 #include "core.h"
18 #include "debug.h"
19 #include "mac.h"
20 #include "hw.h"
21 #include "peer.h"
22
23 struct ath12k_wmi_svc_ready_parse {
24 bool wmi_svc_bitmap_done;
25 };
26
27 struct ath12k_wmi_dma_ring_caps_parse {
28 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps;
29 u32 n_dma_ring_caps;
30 };
31
32 struct ath12k_wmi_service_ext_arg {
33 u32 default_conc_scan_config_bits;
34 u32 default_fw_config_bits;
35 struct ath12k_wmi_ppe_threshold_arg ppet;
36 u32 he_cap_info;
37 u32 mpdu_density;
38 u32 max_bssid_rx_filters;
39 u32 num_hw_modes;
40 u32 num_phy;
41 };
42
43 struct ath12k_wmi_svc_rdy_ext_parse {
44 struct ath12k_wmi_service_ext_arg arg;
45 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps;
46 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
47 u32 n_hw_mode_caps;
48 u32 tot_phy_id;
49 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps;
50 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps;
51 u32 n_mac_phy_caps;
52 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps;
53 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps;
54 u32 n_ext_hal_reg_caps;
55 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
56 bool hw_mode_done;
57 bool mac_phy_done;
58 bool ext_hal_reg_done;
59 bool mac_phy_chainmask_combo_done;
60 bool mac_phy_chainmask_cap_done;
61 bool oem_dma_ring_cap_done;
62 bool dma_ring_cap_done;
63 };
64
65 struct ath12k_wmi_svc_rdy_ext2_arg {
66 u32 reg_db_version;
67 u32 hw_min_max_tx_power_2ghz;
68 u32 hw_min_max_tx_power_5ghz;
69 u32 chwidth_num_peer_caps;
70 u32 preamble_puncture_bw;
71 u32 max_user_per_ppdu_ofdma;
72 u32 max_user_per_ppdu_mumimo;
73 u32 target_cap_flags;
74 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
75 u32 max_num_linkview_peers;
76 u32 max_num_msduq_supported_per_tid;
77 u32 default_num_msduq_supported_per_tid;
78 };
79
80 struct ath12k_wmi_svc_rdy_ext2_parse {
81 struct ath12k_wmi_svc_rdy_ext2_arg arg;
82 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
83 bool dma_ring_cap_done;
84 bool spectral_bin_scaling_done;
85 bool mac_phy_caps_ext_done;
86 };
87
88 struct ath12k_wmi_rdy_parse {
89 u32 num_extra_mac_addr;
90 };
91
92 struct ath12k_wmi_dma_buf_release_arg {
93 struct ath12k_wmi_dma_buf_release_fixed_params fixed;
94 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry;
95 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data;
96 u32 num_buf_entry;
97 u32 num_meta;
98 bool buf_entry_done;
99 bool meta_data_done;
100 };
101
102 struct ath12k_wmi_tlv_policy {
103 size_t min_len;
104 };
105
106 struct wmi_tlv_mgmt_rx_parse {
107 const struct ath12k_wmi_mgmt_rx_params *fixed;
108 const u8 *frame_buf;
109 bool frame_buf_done;
110 };
111
112 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = {
113 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 },
114 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 },
115 [WMI_TAG_SERVICE_READY_EVENT] = {
116 .min_len = sizeof(struct wmi_service_ready_event) },
117 [WMI_TAG_SERVICE_READY_EXT_EVENT] = {
118 .min_len = sizeof(struct wmi_service_ready_ext_event) },
119 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = {
120 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) },
121 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = {
122 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) },
123 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = {
124 .min_len = sizeof(struct wmi_vdev_start_resp_event) },
125 [WMI_TAG_PEER_DELETE_RESP_EVENT] = {
126 .min_len = sizeof(struct wmi_peer_delete_resp_event) },
127 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = {
128 .min_len = sizeof(struct wmi_bcn_tx_status_event) },
129 [WMI_TAG_VDEV_STOPPED_EVENT] = {
130 .min_len = sizeof(struct wmi_vdev_stopped_event) },
131 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = {
132 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) },
133 [WMI_TAG_MGMT_RX_HDR] = {
134 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) },
135 [WMI_TAG_MGMT_TX_COMPL_EVENT] = {
136 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) },
137 [WMI_TAG_SCAN_EVENT] = {
138 .min_len = sizeof(struct wmi_scan_event) },
139 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = {
140 .min_len = sizeof(struct wmi_peer_sta_kickout_event) },
141 [WMI_TAG_ROAM_EVENT] = {
142 .min_len = sizeof(struct wmi_roam_event) },
143 [WMI_TAG_CHAN_INFO_EVENT] = {
144 .min_len = sizeof(struct wmi_chan_info_event) },
145 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = {
146 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) },
147 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = {
148 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) },
149 [WMI_TAG_READY_EVENT] = {
150 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) },
151 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = {
152 .min_len = sizeof(struct wmi_service_available_event) },
153 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = {
154 .min_len = sizeof(struct wmi_peer_assoc_conf_event) },
155 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = {
156 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) },
157 [WMI_TAG_HOST_SWFDA_EVENT] = {
158 .min_len = sizeof(struct wmi_fils_discovery_event) },
159 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = {
160 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) },
161 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = {
162 .min_len = sizeof(struct wmi_vdev_delete_resp_event) },
163 };
164
ath12k_wmi_tlv_hdr(u32 cmd,u32 len)165 static __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len)
166 {
167 return le32_encode_bits(cmd, WMI_TLV_TAG) |
168 le32_encode_bits(len, WMI_TLV_LEN);
169 }
170
ath12k_wmi_tlv_cmd_hdr(u32 cmd,u32 len)171 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len)
172 {
173 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE);
174 }
175
ath12k_wmi_init_qcn9274(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)176 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
177 struct ath12k_wmi_resource_config_arg *config)
178 {
179 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS;
180
181 if (ab->num_radios == 2) {
182 config->num_peers = TARGET_NUM_PEERS(DBS);
183 config->num_tids = TARGET_NUM_TIDS(DBS);
184 } else if (ab->num_radios == 3) {
185 config->num_peers = TARGET_NUM_PEERS(DBS_SBS);
186 config->num_tids = TARGET_NUM_TIDS(DBS_SBS);
187 } else {
188 /* Control should not reach here */
189 config->num_peers = TARGET_NUM_PEERS(SINGLE);
190 config->num_tids = TARGET_NUM_TIDS(SINGLE);
191 }
192 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS;
193 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS;
194 config->num_peer_keys = TARGET_NUM_PEER_KEYS;
195 config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
196 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
197 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
198 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
199 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
200 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
201 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
202
203 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags))
204 config->rx_decap_mode = TARGET_DECAP_MODE_RAW;
205 else
206 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
207
208 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
209 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
210 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
211 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
212 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS;
213 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS;
214 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE;
215 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
216 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES;
217 config->dma_burst_size = TARGET_DMA_BURST_SIZE;
218 config->rx_skip_defrag_timeout_dup_detection_check =
219 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
220 config->vow_config = TARGET_VOW_CONFIG;
221 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV;
222 config->num_msdu_desc = TARGET_NUM_MSDU_DESC;
223 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD;
224 config->rx_batchmode = TARGET_RX_BATCHMODE;
225 /* Indicates host supports peer map v3 and unmap v2 support */
226 config->peer_map_unmap_version = 0x32;
227 config->twt_ap_pdev_count = ab->num_radios;
228 config->twt_ap_sta_count = 1000;
229 }
230
ath12k_wmi_init_wcn7850(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)231 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
232 struct ath12k_wmi_resource_config_arg *config)
233 {
234 config->num_vdevs = 4;
235 config->num_peers = 16;
236 config->num_tids = 32;
237
238 config->num_offload_peers = 3;
239 config->num_offload_reorder_buffs = 3;
240 config->num_peer_keys = TARGET_NUM_PEER_KEYS;
241 config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
242 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
243 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
244 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
245 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
246 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
247 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
248 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
249 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
250 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
251 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
252 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
253 config->num_mcast_groups = 0;
254 config->num_mcast_table_elems = 0;
255 config->mcast2ucast_mode = 0;
256 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
257 config->num_wds_entries = 0;
258 config->dma_burst_size = 0;
259 config->rx_skip_defrag_timeout_dup_detection_check = 0;
260 config->vow_config = TARGET_VOW_CONFIG;
261 config->gtk_offload_max_vdev = 2;
262 config->num_msdu_desc = 0x400;
263 config->beacon_tx_offload_max_vdev = 2;
264 config->rx_batchmode = TARGET_RX_BATCHMODE;
265
266 config->peer_map_unmap_version = 0x1;
267 config->use_pdev_id = 1;
268 config->max_frag_entries = 0xa;
269 config->num_tdls_vdevs = 0x1;
270 config->num_tdls_conn_table_entries = 8;
271 config->beacon_tx_offload_max_vdev = 0x2;
272 config->num_multicast_filter_entries = 0x20;
273 config->num_wow_filters = 0x16;
274 config->num_keep_alive_pattern = 0;
275 }
276
277 #define PRIMAP(_hw_mode_) \
278 [_hw_mode_] = _hw_mode_##_PRI
279
280 static const int ath12k_hw_mode_pri_map[] = {
281 PRIMAP(WMI_HOST_HW_MODE_SINGLE),
282 PRIMAP(WMI_HOST_HW_MODE_DBS),
283 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE),
284 PRIMAP(WMI_HOST_HW_MODE_SBS),
285 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS),
286 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS),
287 /* keep last */
288 PRIMAP(WMI_HOST_HW_MODE_MAX),
289 };
290
291 static int
ath12k_wmi_tlv_iter(struct ath12k_base * ab,const void * ptr,size_t len,int (* iter)(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data),void * data)292 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len,
293 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len,
294 const void *ptr, void *data),
295 void *data)
296 {
297 const void *begin = ptr;
298 const struct wmi_tlv *tlv;
299 u16 tlv_tag, tlv_len;
300 int ret;
301
302 while (len > 0) {
303 if (len < sizeof(*tlv)) {
304 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",
305 ptr - begin, len, sizeof(*tlv));
306 return -EINVAL;
307 }
308
309 tlv = ptr;
310 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
311 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN);
312 ptr += sizeof(*tlv);
313 len -= sizeof(*tlv);
314
315 if (tlv_len > len) {
316 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n",
317 tlv_tag, ptr - begin, len, tlv_len);
318 return -EINVAL;
319 }
320
321 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) &&
322 ath12k_wmi_tlv_policies[tlv_tag].min_len &&
323 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) {
324 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n",
325 tlv_tag, ptr - begin, tlv_len,
326 ath12k_wmi_tlv_policies[tlv_tag].min_len);
327 return -EINVAL;
328 }
329
330 ret = iter(ab, tlv_tag, tlv_len, ptr, data);
331 if (ret)
332 return ret;
333
334 ptr += tlv_len;
335 len -= tlv_len;
336 }
337
338 return 0;
339 }
340
ath12k_wmi_tlv_iter_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)341 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len,
342 const void *ptr, void *data)
343 {
344 const void **tb = data;
345
346 if (tag < WMI_TAG_MAX)
347 tb[tag] = ptr;
348
349 return 0;
350 }
351
ath12k_wmi_tlv_parse(struct ath12k_base * ar,const void ** tb,const void * ptr,size_t len)352 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb,
353 const void *ptr, size_t len)
354 {
355 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse,
356 (void *)tb);
357 }
358
359 static const void **
ath12k_wmi_tlv_parse_alloc(struct ath12k_base * ab,const void * ptr,size_t len,gfp_t gfp)360 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab, const void *ptr,
361 size_t len, gfp_t gfp)
362 {
363 const void **tb;
364 int ret;
365
366 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp);
367 if (!tb)
368 return ERR_PTR(-ENOMEM);
369
370 ret = ath12k_wmi_tlv_parse(ab, tb, ptr, len);
371 if (ret) {
372 kfree(tb);
373 return ERR_PTR(ret);
374 }
375
376 return tb;
377 }
378
ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)379 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
380 u32 cmd_id)
381 {
382 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb);
383 struct ath12k_base *ab = wmi->wmi_ab->ab;
384 struct wmi_cmd_hdr *cmd_hdr;
385 int ret;
386
387 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr)))
388 return -ENOMEM;
389
390 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
391 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID);
392
393 memset(skb_cb, 0, sizeof(*skb_cb));
394 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb);
395
396 if (ret)
397 goto err_pull;
398
399 return 0;
400
401 err_pull:
402 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
403 return ret;
404 }
405
ath12k_wmi_cmd_send(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)406 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
407 u32 cmd_id)
408 {
409 struct ath12k_wmi_base *wmi_sc = wmi->wmi_ab;
410 int ret = -EOPNOTSUPP;
411
412 might_sleep();
413
414 wait_event_timeout(wmi_sc->tx_credits_wq, ({
415 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
416
417 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_sc->ab->dev_flags))
418 ret = -ESHUTDOWN;
419
420 (ret != -EAGAIN);
421 }), WMI_SEND_TIMEOUT_HZ);
422
423 if (ret == -EAGAIN)
424 ath12k_warn(wmi_sc->ab, "wmi command %d timeout\n", cmd_id);
425
426 return ret;
427 }
428
ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_service_ext_arg * arg)429 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
430 const void *ptr,
431 struct ath12k_wmi_service_ext_arg *arg)
432 {
433 const struct wmi_service_ready_ext_event *ev = ptr;
434 int i;
435
436 if (!ev)
437 return -EINVAL;
438
439 /* Move this to host based bitmap */
440 arg->default_conc_scan_config_bits =
441 le32_to_cpu(ev->default_conc_scan_config_bits);
442 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits);
443 arg->he_cap_info = le32_to_cpu(ev->he_cap_info);
444 arg->mpdu_density = le32_to_cpu(ev->mpdu_density);
445 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters);
446 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1);
447 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info);
448
449 for (i = 0; i < WMI_MAX_NUM_SS; i++)
450 arg->ppet.ppet16_ppet8_ru3_ru0[i] =
451 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]);
452
453 return 0;
454 }
455
456 static int
ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,struct ath12k_wmi_svc_rdy_ext_parse * svc,u8 hw_mode_id,u8 phy_id,struct ath12k_pdev * pdev)457 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
458 struct ath12k_wmi_svc_rdy_ext_parse *svc,
459 u8 hw_mode_id, u8 phy_id,
460 struct ath12k_pdev *pdev)
461 {
462 const struct ath12k_wmi_mac_phy_caps_params *mac_caps;
463 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps;
464 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps;
465 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps;
466 struct ath12k_base *ab = wmi_handle->wmi_ab->ab;
467 struct ath12k_band_cap *cap_band;
468 struct ath12k_pdev_cap *pdev_cap = &pdev->cap;
469 struct ath12k_fw_pdev *fw_pdev;
470 u32 phy_map;
471 u32 hw_idx, phy_idx = 0;
472 int i;
473
474 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps)
475 return -EINVAL;
476
477 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) {
478 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id))
479 break;
480
481 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map);
482 phy_idx = fls(phy_map);
483 }
484
485 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes))
486 return -EINVAL;
487
488 phy_idx += phy_id;
489 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy))
490 return -EINVAL;
491
492 mac_caps = wmi_mac_phy_caps + phy_idx;
493
494 pdev->pdev_id = le32_to_cpu(mac_caps->pdev_id);
495 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands);
496 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density);
497
498 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count];
499 fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands);
500 fw_pdev->pdev_id = le32_to_cpu(mac_caps->pdev_id);
501 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id);
502 ab->fw_pdev_count++;
503
504 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from
505 * band to band for a single radio, need to see how this should be
506 * handled.
507 */
508 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) {
509 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g);
510 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g);
511 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) {
512 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g);
513 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g);
514 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
515 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g);
516 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g);
517 } else {
518 return -EINVAL;
519 }
520
521 /* tx/rx chainmask reported from fw depends on the actual hw chains used,
522 * For example, for 4x4 capable macphys, first 4 chains can be used for first
523 * mac and the remaining 4 chains can be used for the second mac or vice-versa.
524 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0
525 * will be advertised for second mac or vice-versa. Compute the shift value
526 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to
527 * mac80211.
528 */
529 pdev_cap->tx_chain_mask_shift =
530 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32);
531 pdev_cap->rx_chain_mask_shift =
532 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32);
533
534 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) {
535 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ];
536 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
537 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g);
538 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g);
539 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g);
540 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext);
541 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g);
542 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
543 cap_band->he_cap_phy_info[i] =
544 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]);
545
546 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1);
547 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info);
548
549 for (i = 0; i < WMI_MAX_NUM_SS; i++)
550 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
551 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]);
552 }
553
554 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) {
555 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ];
556 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
557 cap_band->max_bw_supported =
558 le32_to_cpu(mac_caps->max_bw_supported_5g);
559 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
560 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
561 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
562 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
563 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
564 cap_band->he_cap_phy_info[i] =
565 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
566
567 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
568 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
569
570 for (i = 0; i < WMI_MAX_NUM_SS; i++)
571 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
572 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
573
574 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ];
575 cap_band->max_bw_supported =
576 le32_to_cpu(mac_caps->max_bw_supported_5g);
577 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
578 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
579 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
580 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
581 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
582 cap_band->he_cap_phy_info[i] =
583 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
584
585 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
586 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
587
588 for (i = 0; i < WMI_MAX_NUM_SS; i++)
589 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
590 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
591 }
592
593 return 0;
594 }
595
596 static int
ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev * wmi_handle,const struct ath12k_wmi_soc_hal_reg_caps_params * reg_caps,const struct ath12k_wmi_hal_reg_caps_ext_params * ext_caps,u8 phy_idx,struct ath12k_wmi_hal_reg_capabilities_ext_arg * param)597 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle,
598 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps,
599 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps,
600 u8 phy_idx,
601 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param)
602 {
603 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap;
604
605 if (!reg_caps || !ext_caps)
606 return -EINVAL;
607
608 if (phy_idx >= le32_to_cpu(reg_caps->num_phy))
609 return -EINVAL;
610
611 ext_reg_cap = &ext_caps[phy_idx];
612
613 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id);
614 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain);
615 param->eeprom_reg_domain_ext =
616 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext);
617 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1);
618 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2);
619 /* check if param->wireless_mode is needed */
620 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan);
621 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan);
622 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan);
623 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan);
624
625 return 0;
626 }
627
ath12k_pull_service_ready_tlv(struct ath12k_base * ab,const void * evt_buf,struct ath12k_wmi_target_cap_arg * cap)628 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab,
629 const void *evt_buf,
630 struct ath12k_wmi_target_cap_arg *cap)
631 {
632 const struct wmi_service_ready_event *ev = evt_buf;
633
634 if (!ev) {
635 ath12k_err(ab, "%s: failed by NULL param\n",
636 __func__);
637 return -EINVAL;
638 }
639
640 cap->phy_capability = le32_to_cpu(ev->phy_capability);
641 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry);
642 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains);
643 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info);
644 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info);
645 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs);
646 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power);
647 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power);
648 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info);
649 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable);
650 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size);
651 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels);
652 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs);
653 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps);
654 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask);
655 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index);
656 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc);
657
658 return 0;
659 }
660
661 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in
662 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each
663 * 4-byte word.
664 */
ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev * wmi,const u32 * wmi_svc_bm)665 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi,
666 const u32 *wmi_svc_bm)
667 {
668 int i, j;
669
670 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) {
671 do {
672 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32))
673 set_bit(j, wmi->wmi_ab->svc_map);
674 } while (++j % WMI_SERVICE_BITS_IN_SIZE32);
675 }
676 }
677
ath12k_wmi_svc_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)678 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
679 const void *ptr, void *data)
680 {
681 struct ath12k_wmi_svc_ready_parse *svc_ready = data;
682 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
683 u16 expect_len;
684
685 switch (tag) {
686 case WMI_TAG_SERVICE_READY_EVENT:
687 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps))
688 return -EINVAL;
689 break;
690
691 case WMI_TAG_ARRAY_UINT32:
692 if (!svc_ready->wmi_svc_bitmap_done) {
693 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32);
694 if (len < expect_len) {
695 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n",
696 len, tag);
697 return -EINVAL;
698 }
699
700 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr);
701
702 svc_ready->wmi_svc_bitmap_done = true;
703 }
704 break;
705 default:
706 break;
707 }
708
709 return 0;
710 }
711
ath12k_service_ready_event(struct ath12k_base * ab,struct sk_buff * skb)712 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
713 {
714 struct ath12k_wmi_svc_ready_parse svc_ready = { };
715 int ret;
716
717 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
718 ath12k_wmi_svc_rdy_parse,
719 &svc_ready);
720 if (ret) {
721 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
722 return ret;
723 }
724
725 return 0;
726 }
727
ath12k_wmi_alloc_skb(struct ath12k_wmi_base * wmi_sc,u32 len)728 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len)
729 {
730 struct sk_buff *skb;
731 struct ath12k_base *ab = wmi_sc->ab;
732 u32 round_len = roundup(len, 4);
733
734 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len);
735 if (!skb)
736 return NULL;
737
738 skb_reserve(skb, WMI_SKB_HEADROOM);
739 if (!IS_ALIGNED((unsigned long)skb->data, 4))
740 ath12k_warn(ab, "unaligned WMI skb data\n");
741
742 skb_put(skb, round_len);
743 memset(skb->data, 0, round_len);
744
745 return skb;
746 }
747
ath12k_wmi_mgmt_send(struct ath12k * ar,u32 vdev_id,u32 buf_id,struct sk_buff * frame)748 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id,
749 struct sk_buff *frame)
750 {
751 struct ath12k_wmi_pdev *wmi = ar->wmi;
752 struct wmi_mgmt_send_cmd *cmd;
753 struct wmi_tlv *frame_tlv;
754 struct sk_buff *skb;
755 u32 buf_len;
756 int ret, len;
757
758 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN);
759
760 len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4);
761
762 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
763 if (!skb)
764 return -ENOMEM;
765
766 cmd = (struct wmi_mgmt_send_cmd *)skb->data;
767 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD,
768 sizeof(*cmd));
769 cmd->vdev_id = cpu_to_le32(vdev_id);
770 cmd->desc_id = cpu_to_le32(buf_id);
771 cmd->chanfreq = 0;
772 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr));
773 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr));
774 cmd->frame_len = cpu_to_le32(frame->len);
775 cmd->buf_len = cpu_to_le32(buf_len);
776 cmd->tx_params_valid = 0;
777
778 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
779 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len);
780
781 memcpy(frame_tlv->value, frame->data, buf_len);
782
783 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID);
784 if (ret) {
785 ath12k_warn(ar->ab,
786 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n");
787 dev_kfree_skb(skb);
788 }
789
790 return ret;
791 }
792
ath12k_wmi_vdev_create(struct ath12k * ar,u8 * macaddr,struct ath12k_wmi_vdev_create_arg * args)793 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr,
794 struct ath12k_wmi_vdev_create_arg *args)
795 {
796 struct ath12k_wmi_pdev *wmi = ar->wmi;
797 struct wmi_vdev_create_cmd *cmd;
798 struct sk_buff *skb;
799 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams;
800 struct wmi_tlv *tlv;
801 int ret, len;
802 void *ptr;
803
804 /* It can be optimized my sending tx/rx chain configuration
805 * only for supported bands instead of always sending it for
806 * both the bands.
807 */
808 len = sizeof(*cmd) + TLV_HDR_SIZE +
809 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams));
810
811 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
812 if (!skb)
813 return -ENOMEM;
814
815 cmd = (struct wmi_vdev_create_cmd *)skb->data;
816 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD,
817 sizeof(*cmd));
818
819 cmd->vdev_id = cpu_to_le32(args->if_id);
820 cmd->vdev_type = cpu_to_le32(args->type);
821 cmd->vdev_subtype = cpu_to_le32(args->subtype);
822 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX);
823 cmd->pdev_id = cpu_to_le32(args->pdev_id);
824 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id);
825 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
826
827 ptr = skb->data + sizeof(*cmd);
828 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
829
830 tlv = ptr;
831 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
832
833 ptr += TLV_HDR_SIZE;
834 txrx_streams = ptr;
835 len = sizeof(*txrx_streams);
836 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
837 len);
838 txrx_streams->band = WMI_TPC_CHAINMASK_CONFIG_BAND_2G;
839 txrx_streams->supported_tx_streams =
840 args->chains[NL80211_BAND_2GHZ].tx;
841 txrx_streams->supported_rx_streams =
842 args->chains[NL80211_BAND_2GHZ].rx;
843
844 txrx_streams++;
845 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
846 len);
847 txrx_streams->band = WMI_TPC_CHAINMASK_CONFIG_BAND_5G;
848 txrx_streams->supported_tx_streams =
849 args->chains[NL80211_BAND_5GHZ].tx;
850 txrx_streams->supported_rx_streams =
851 args->chains[NL80211_BAND_5GHZ].rx;
852
853 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
854 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n",
855 args->if_id, args->type, args->subtype,
856 macaddr, args->pdev_id);
857
858 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID);
859 if (ret) {
860 ath12k_warn(ar->ab,
861 "failed to submit WMI_VDEV_CREATE_CMDID\n");
862 dev_kfree_skb(skb);
863 }
864
865 return ret;
866 }
867
ath12k_wmi_vdev_delete(struct ath12k * ar,u8 vdev_id)868 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id)
869 {
870 struct ath12k_wmi_pdev *wmi = ar->wmi;
871 struct wmi_vdev_delete_cmd *cmd;
872 struct sk_buff *skb;
873 int ret;
874
875 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
876 if (!skb)
877 return -ENOMEM;
878
879 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
880 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD,
881 sizeof(*cmd));
882 cmd->vdev_id = cpu_to_le32(vdev_id);
883
884 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id);
885
886 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID);
887 if (ret) {
888 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n");
889 dev_kfree_skb(skb);
890 }
891
892 return ret;
893 }
894
ath12k_wmi_vdev_stop(struct ath12k * ar,u8 vdev_id)895 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id)
896 {
897 struct ath12k_wmi_pdev *wmi = ar->wmi;
898 struct wmi_vdev_stop_cmd *cmd;
899 struct sk_buff *skb;
900 int ret;
901
902 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
903 if (!skb)
904 return -ENOMEM;
905
906 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
907
908 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD,
909 sizeof(*cmd));
910 cmd->vdev_id = cpu_to_le32(vdev_id);
911
912 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id);
913
914 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID);
915 if (ret) {
916 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n");
917 dev_kfree_skb(skb);
918 }
919
920 return ret;
921 }
922
ath12k_wmi_vdev_down(struct ath12k * ar,u8 vdev_id)923 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id)
924 {
925 struct ath12k_wmi_pdev *wmi = ar->wmi;
926 struct wmi_vdev_down_cmd *cmd;
927 struct sk_buff *skb;
928 int ret;
929
930 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
931 if (!skb)
932 return -ENOMEM;
933
934 cmd = (struct wmi_vdev_down_cmd *)skb->data;
935
936 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD,
937 sizeof(*cmd));
938 cmd->vdev_id = cpu_to_le32(vdev_id);
939
940 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id);
941
942 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID);
943 if (ret) {
944 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n");
945 dev_kfree_skb(skb);
946 }
947
948 return ret;
949 }
950
ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params * chan,struct wmi_vdev_start_req_arg * arg)951 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan,
952 struct wmi_vdev_start_req_arg *arg)
953 {
954 memset(chan, 0, sizeof(*chan));
955
956 chan->mhz = cpu_to_le32(arg->freq);
957 chan->band_center_freq1 = cpu_to_le32(arg->band_center_freq1);
958 if (arg->mode == MODE_11AC_VHT80_80)
959 chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2);
960 else
961 chan->band_center_freq2 = 0;
962
963 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE);
964 if (arg->passive)
965 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
966 if (arg->allow_ibss)
967 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED);
968 if (arg->allow_ht)
969 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
970 if (arg->allow_vht)
971 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
972 if (arg->allow_he)
973 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
974 if (arg->ht40plus)
975 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS);
976 if (arg->chan_radar)
977 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
978 if (arg->freq2_radar)
979 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2);
980
981 chan->reg_info_1 = le32_encode_bits(arg->max_power,
982 WMI_CHAN_REG_INFO1_MAX_PWR) |
983 le32_encode_bits(arg->max_reg_power,
984 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
985
986 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain,
987 WMI_CHAN_REG_INFO2_ANT_MAX) |
988 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR);
989 }
990
ath12k_wmi_vdev_start(struct ath12k * ar,struct wmi_vdev_start_req_arg * arg,bool restart)991 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg,
992 bool restart)
993 {
994 struct ath12k_wmi_pdev *wmi = ar->wmi;
995 struct wmi_vdev_start_request_cmd *cmd;
996 struct sk_buff *skb;
997 struct ath12k_wmi_channel_params *chan;
998 struct wmi_tlv *tlv;
999 void *ptr;
1000 int ret, len;
1001
1002 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
1003 return -EINVAL;
1004
1005 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE;
1006
1007 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1008 if (!skb)
1009 return -ENOMEM;
1010
1011 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
1012 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD,
1013 sizeof(*cmd));
1014 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1015 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval);
1016 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate);
1017 cmd->dtim_period = cpu_to_le32(arg->dtim_period);
1018 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors);
1019 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams);
1020 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams);
1021 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms);
1022 cmd->regdomain = cpu_to_le32(arg->regdomain);
1023 cmd->he_ops = cpu_to_le32(arg->he_ops);
1024 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
1025
1026 if (!restart) {
1027 if (arg->ssid) {
1028 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len);
1029 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
1030 }
1031 if (arg->hidden_ssid)
1032 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID);
1033 if (arg->pmf_enabled)
1034 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED);
1035 }
1036
1037 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED);
1038
1039 ptr = skb->data + sizeof(*cmd);
1040 chan = ptr;
1041
1042 ath12k_wmi_put_wmi_channel(chan, arg);
1043
1044 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
1045 sizeof(*chan));
1046 ptr += sizeof(*chan);
1047
1048 tlv = ptr;
1049 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
1050
1051 /* Note: This is a nested TLV containing:
1052 * [wmi_tlv][wmi_p2p_noa_descriptor][wmi_tlv]..
1053 */
1054
1055 ptr += sizeof(*tlv);
1056
1057 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n",
1058 restart ? "restart" : "start", arg->vdev_id,
1059 arg->freq, arg->mode);
1060
1061 if (restart)
1062 ret = ath12k_wmi_cmd_send(wmi, skb,
1063 WMI_VDEV_RESTART_REQUEST_CMDID);
1064 else
1065 ret = ath12k_wmi_cmd_send(wmi, skb,
1066 WMI_VDEV_START_REQUEST_CMDID);
1067 if (ret) {
1068 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n",
1069 restart ? "restart" : "start");
1070 dev_kfree_skb(skb);
1071 }
1072
1073 return ret;
1074 }
1075
ath12k_wmi_vdev_up(struct ath12k * ar,u32 vdev_id,u32 aid,const u8 * bssid)1076 int ath12k_wmi_vdev_up(struct ath12k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
1077 {
1078 struct ath12k_wmi_pdev *wmi = ar->wmi;
1079 struct wmi_vdev_up_cmd *cmd;
1080 struct sk_buff *skb;
1081 int ret;
1082
1083 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1084 if (!skb)
1085 return -ENOMEM;
1086
1087 cmd = (struct wmi_vdev_up_cmd *)skb->data;
1088
1089 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD,
1090 sizeof(*cmd));
1091 cmd->vdev_id = cpu_to_le32(vdev_id);
1092 cmd->vdev_assoc_id = cpu_to_le32(aid);
1093
1094 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
1095
1096 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1097 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
1098 vdev_id, aid, bssid);
1099
1100 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID);
1101 if (ret) {
1102 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n");
1103 dev_kfree_skb(skb);
1104 }
1105
1106 return ret;
1107 }
1108
ath12k_wmi_send_peer_create_cmd(struct ath12k * ar,struct ath12k_wmi_peer_create_arg * arg)1109 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar,
1110 struct ath12k_wmi_peer_create_arg *arg)
1111 {
1112 struct ath12k_wmi_pdev *wmi = ar->wmi;
1113 struct wmi_peer_create_cmd *cmd;
1114 struct sk_buff *skb;
1115 int ret;
1116
1117 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1118 if (!skb)
1119 return -ENOMEM;
1120
1121 cmd = (struct wmi_peer_create_cmd *)skb->data;
1122 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD,
1123 sizeof(*cmd));
1124
1125 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr);
1126 cmd->peer_type = cpu_to_le32(arg->peer_type);
1127 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1128
1129 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1130 "WMI peer create vdev_id %d peer_addr %pM\n",
1131 arg->vdev_id, arg->peer_addr);
1132
1133 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID);
1134 if (ret) {
1135 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n");
1136 dev_kfree_skb(skb);
1137 }
1138
1139 return ret;
1140 }
1141
ath12k_wmi_send_peer_delete_cmd(struct ath12k * ar,const u8 * peer_addr,u8 vdev_id)1142 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar,
1143 const u8 *peer_addr, u8 vdev_id)
1144 {
1145 struct ath12k_wmi_pdev *wmi = ar->wmi;
1146 struct wmi_peer_delete_cmd *cmd;
1147 struct sk_buff *skb;
1148 int ret;
1149
1150 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1151 if (!skb)
1152 return -ENOMEM;
1153
1154 cmd = (struct wmi_peer_delete_cmd *)skb->data;
1155 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD,
1156 sizeof(*cmd));
1157
1158 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1159 cmd->vdev_id = cpu_to_le32(vdev_id);
1160
1161 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1162 "WMI peer delete vdev_id %d peer_addr %pM\n",
1163 vdev_id, peer_addr);
1164
1165 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID);
1166 if (ret) {
1167 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n");
1168 dev_kfree_skb(skb);
1169 }
1170
1171 return ret;
1172 }
1173
ath12k_wmi_send_pdev_set_regdomain(struct ath12k * ar,struct ath12k_wmi_pdev_set_regdomain_arg * arg)1174 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar,
1175 struct ath12k_wmi_pdev_set_regdomain_arg *arg)
1176 {
1177 struct ath12k_wmi_pdev *wmi = ar->wmi;
1178 struct wmi_pdev_set_regdomain_cmd *cmd;
1179 struct sk_buff *skb;
1180 int ret;
1181
1182 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1183 if (!skb)
1184 return -ENOMEM;
1185
1186 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
1187 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1188 sizeof(*cmd));
1189
1190 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use);
1191 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g);
1192 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g);
1193 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g);
1194 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g);
1195 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain);
1196 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
1197
1198 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1199 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n",
1200 arg->current_rd_in_use, arg->current_rd_2g,
1201 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id);
1202
1203 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID);
1204 if (ret) {
1205 ath12k_warn(ar->ab,
1206 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n");
1207 dev_kfree_skb(skb);
1208 }
1209
1210 return ret;
1211 }
1212
ath12k_wmi_set_peer_param(struct ath12k * ar,const u8 * peer_addr,u32 vdev_id,u32 param_id,u32 param_val)1213 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr,
1214 u32 vdev_id, u32 param_id, u32 param_val)
1215 {
1216 struct ath12k_wmi_pdev *wmi = ar->wmi;
1217 struct wmi_peer_set_param_cmd *cmd;
1218 struct sk_buff *skb;
1219 int ret;
1220
1221 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1222 if (!skb)
1223 return -ENOMEM;
1224
1225 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
1226 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD,
1227 sizeof(*cmd));
1228 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1229 cmd->vdev_id = cpu_to_le32(vdev_id);
1230 cmd->param_id = cpu_to_le32(param_id);
1231 cmd->param_value = cpu_to_le32(param_val);
1232
1233 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1234 "WMI vdev %d peer 0x%pM set param %d value %d\n",
1235 vdev_id, peer_addr, param_id, param_val);
1236
1237 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID);
1238 if (ret) {
1239 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n");
1240 dev_kfree_skb(skb);
1241 }
1242
1243 return ret;
1244 }
1245
ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k * ar,u8 peer_addr[ETH_ALEN],u32 peer_tid_bitmap,u8 vdev_id)1246 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
1247 u8 peer_addr[ETH_ALEN],
1248 u32 peer_tid_bitmap,
1249 u8 vdev_id)
1250 {
1251 struct ath12k_wmi_pdev *wmi = ar->wmi;
1252 struct wmi_peer_flush_tids_cmd *cmd;
1253 struct sk_buff *skb;
1254 int ret;
1255
1256 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1257 if (!skb)
1258 return -ENOMEM;
1259
1260 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
1261 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD,
1262 sizeof(*cmd));
1263
1264 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1265 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap);
1266 cmd->vdev_id = cpu_to_le32(vdev_id);
1267
1268 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1269 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n",
1270 vdev_id, peer_addr, peer_tid_bitmap);
1271
1272 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID);
1273 if (ret) {
1274 ath12k_warn(ar->ab,
1275 "failed to send WMI_PEER_FLUSH_TIDS cmd\n");
1276 dev_kfree_skb(skb);
1277 }
1278
1279 return ret;
1280 }
1281
ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k * ar,int vdev_id,const u8 * addr,dma_addr_t paddr,u8 tid,u8 ba_window_size_valid,u32 ba_window_size)1282 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar,
1283 int vdev_id, const u8 *addr,
1284 dma_addr_t paddr, u8 tid,
1285 u8 ba_window_size_valid,
1286 u32 ba_window_size)
1287 {
1288 struct wmi_peer_reorder_queue_setup_cmd *cmd;
1289 struct sk_buff *skb;
1290 int ret;
1291
1292 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
1293 if (!skb)
1294 return -ENOMEM;
1295
1296 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data;
1297 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1298 sizeof(*cmd));
1299
1300 ether_addr_copy(cmd->peer_macaddr.addr, addr);
1301 cmd->vdev_id = cpu_to_le32(vdev_id);
1302 cmd->tid = cpu_to_le32(tid);
1303 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr));
1304 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr));
1305 cmd->queue_no = cpu_to_le32(tid);
1306 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid);
1307 cmd->ba_window_size = cpu_to_le32(ba_window_size);
1308
1309 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1310 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n",
1311 addr, vdev_id, tid);
1312
1313 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
1314 WMI_PEER_REORDER_QUEUE_SETUP_CMDID);
1315 if (ret) {
1316 ath12k_warn(ar->ab,
1317 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n");
1318 dev_kfree_skb(skb);
1319 }
1320
1321 return ret;
1322 }
1323
1324 int
ath12k_wmi_rx_reord_queue_remove(struct ath12k * ar,struct ath12k_wmi_rx_reorder_queue_remove_arg * arg)1325 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar,
1326 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg)
1327 {
1328 struct ath12k_wmi_pdev *wmi = ar->wmi;
1329 struct wmi_peer_reorder_queue_remove_cmd *cmd;
1330 struct sk_buff *skb;
1331 int ret;
1332
1333 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1334 if (!skb)
1335 return -ENOMEM;
1336
1337 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data;
1338 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1339 sizeof(*cmd));
1340
1341 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr);
1342 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1343 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap);
1344
1345 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1346 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__,
1347 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap);
1348
1349 ret = ath12k_wmi_cmd_send(wmi, skb,
1350 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID);
1351 if (ret) {
1352 ath12k_warn(ar->ab,
1353 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID");
1354 dev_kfree_skb(skb);
1355 }
1356
1357 return ret;
1358 }
1359
ath12k_wmi_pdev_set_param(struct ath12k * ar,u32 param_id,u32 param_value,u8 pdev_id)1360 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id,
1361 u32 param_value, u8 pdev_id)
1362 {
1363 struct ath12k_wmi_pdev *wmi = ar->wmi;
1364 struct wmi_pdev_set_param_cmd *cmd;
1365 struct sk_buff *skb;
1366 int ret;
1367
1368 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1369 if (!skb)
1370 return -ENOMEM;
1371
1372 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
1373 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD,
1374 sizeof(*cmd));
1375 cmd->pdev_id = cpu_to_le32(pdev_id);
1376 cmd->param_id = cpu_to_le32(param_id);
1377 cmd->param_value = cpu_to_le32(param_value);
1378
1379 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1380 "WMI pdev set param %d pdev id %d value %d\n",
1381 param_id, pdev_id, param_value);
1382
1383 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID);
1384 if (ret) {
1385 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1386 dev_kfree_skb(skb);
1387 }
1388
1389 return ret;
1390 }
1391
ath12k_wmi_pdev_set_ps_mode(struct ath12k * ar,int vdev_id,u32 enable)1392 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable)
1393 {
1394 struct ath12k_wmi_pdev *wmi = ar->wmi;
1395 struct wmi_pdev_set_ps_mode_cmd *cmd;
1396 struct sk_buff *skb;
1397 int ret;
1398
1399 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1400 if (!skb)
1401 return -ENOMEM;
1402
1403 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data;
1404 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD,
1405 sizeof(*cmd));
1406 cmd->vdev_id = cpu_to_le32(vdev_id);
1407 cmd->sta_ps_mode = cpu_to_le32(enable);
1408
1409 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1410 "WMI vdev set psmode %d vdev id %d\n",
1411 enable, vdev_id);
1412
1413 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID);
1414 if (ret) {
1415 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1416 dev_kfree_skb(skb);
1417 }
1418
1419 return ret;
1420 }
1421
ath12k_wmi_pdev_suspend(struct ath12k * ar,u32 suspend_opt,u32 pdev_id)1422 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt,
1423 u32 pdev_id)
1424 {
1425 struct ath12k_wmi_pdev *wmi = ar->wmi;
1426 struct wmi_pdev_suspend_cmd *cmd;
1427 struct sk_buff *skb;
1428 int ret;
1429
1430 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1431 if (!skb)
1432 return -ENOMEM;
1433
1434 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
1435
1436 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD,
1437 sizeof(*cmd));
1438
1439 cmd->suspend_opt = cpu_to_le32(suspend_opt);
1440 cmd->pdev_id = cpu_to_le32(pdev_id);
1441
1442 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1443 "WMI pdev suspend pdev_id %d\n", pdev_id);
1444
1445 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID);
1446 if (ret) {
1447 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n");
1448 dev_kfree_skb(skb);
1449 }
1450
1451 return ret;
1452 }
1453
ath12k_wmi_pdev_resume(struct ath12k * ar,u32 pdev_id)1454 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id)
1455 {
1456 struct ath12k_wmi_pdev *wmi = ar->wmi;
1457 struct wmi_pdev_resume_cmd *cmd;
1458 struct sk_buff *skb;
1459 int ret;
1460
1461 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1462 if (!skb)
1463 return -ENOMEM;
1464
1465 cmd = (struct wmi_pdev_resume_cmd *)skb->data;
1466
1467 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD,
1468 sizeof(*cmd));
1469 cmd->pdev_id = cpu_to_le32(pdev_id);
1470
1471 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1472 "WMI pdev resume pdev id %d\n", pdev_id);
1473
1474 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID);
1475 if (ret) {
1476 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n");
1477 dev_kfree_skb(skb);
1478 }
1479
1480 return ret;
1481 }
1482
1483 /* TODO FW Support for the cmd is not available yet.
1484 * Can be tested once the command and corresponding
1485 * event is implemented in FW
1486 */
ath12k_wmi_pdev_bss_chan_info_request(struct ath12k * ar,enum wmi_bss_chan_info_req_type type)1487 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
1488 enum wmi_bss_chan_info_req_type type)
1489 {
1490 struct ath12k_wmi_pdev *wmi = ar->wmi;
1491 struct wmi_pdev_bss_chan_info_req_cmd *cmd;
1492 struct sk_buff *skb;
1493 int ret;
1494
1495 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1496 if (!skb)
1497 return -ENOMEM;
1498
1499 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data;
1500
1501 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1502 sizeof(*cmd));
1503 cmd->req_type = cpu_to_le32(type);
1504 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1505
1506 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1507 "WMI bss chan info req type %d\n", type);
1508
1509 ret = ath12k_wmi_cmd_send(wmi, skb,
1510 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID);
1511 if (ret) {
1512 ath12k_warn(ar->ab,
1513 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n");
1514 dev_kfree_skb(skb);
1515 }
1516
1517 return ret;
1518 }
1519
ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k * ar,u8 * peer_addr,struct ath12k_wmi_ap_ps_arg * arg)1520 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr,
1521 struct ath12k_wmi_ap_ps_arg *arg)
1522 {
1523 struct ath12k_wmi_pdev *wmi = ar->wmi;
1524 struct wmi_ap_ps_peer_cmd *cmd;
1525 struct sk_buff *skb;
1526 int ret;
1527
1528 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1529 if (!skb)
1530 return -ENOMEM;
1531
1532 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
1533 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD,
1534 sizeof(*cmd));
1535
1536 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1537 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1538 cmd->param = cpu_to_le32(arg->param);
1539 cmd->value = cpu_to_le32(arg->value);
1540
1541 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1542 "WMI set ap ps vdev id %d peer %pM param %d value %d\n",
1543 arg->vdev_id, peer_addr, arg->param, arg->value);
1544
1545 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID);
1546 if (ret) {
1547 ath12k_warn(ar->ab,
1548 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n");
1549 dev_kfree_skb(skb);
1550 }
1551
1552 return ret;
1553 }
1554
ath12k_wmi_set_sta_ps_param(struct ath12k * ar,u32 vdev_id,u32 param,u32 param_value)1555 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id,
1556 u32 param, u32 param_value)
1557 {
1558 struct ath12k_wmi_pdev *wmi = ar->wmi;
1559 struct wmi_sta_powersave_param_cmd *cmd;
1560 struct sk_buff *skb;
1561 int ret;
1562
1563 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1564 if (!skb)
1565 return -ENOMEM;
1566
1567 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
1568 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1569 sizeof(*cmd));
1570
1571 cmd->vdev_id = cpu_to_le32(vdev_id);
1572 cmd->param = cpu_to_le32(param);
1573 cmd->value = cpu_to_le32(param_value);
1574
1575 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1576 "WMI set sta ps vdev_id %d param %d value %d\n",
1577 vdev_id, param, param_value);
1578
1579 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID);
1580 if (ret) {
1581 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID");
1582 dev_kfree_skb(skb);
1583 }
1584
1585 return ret;
1586 }
1587
ath12k_wmi_force_fw_hang_cmd(struct ath12k * ar,u32 type,u32 delay_time_ms)1588 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms)
1589 {
1590 struct ath12k_wmi_pdev *wmi = ar->wmi;
1591 struct wmi_force_fw_hang_cmd *cmd;
1592 struct sk_buff *skb;
1593 int ret, len;
1594
1595 len = sizeof(*cmd);
1596
1597 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1598 if (!skb)
1599 return -ENOMEM;
1600
1601 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
1602 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD,
1603 len);
1604
1605 cmd->type = cpu_to_le32(type);
1606 cmd->delay_time_ms = cpu_to_le32(delay_time_ms);
1607
1608 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID);
1609
1610 if (ret) {
1611 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID");
1612 dev_kfree_skb(skb);
1613 }
1614 return ret;
1615 }
1616
ath12k_wmi_vdev_set_param_cmd(struct ath12k * ar,u32 vdev_id,u32 param_id,u32 param_value)1617 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id,
1618 u32 param_id, u32 param_value)
1619 {
1620 struct ath12k_wmi_pdev *wmi = ar->wmi;
1621 struct wmi_vdev_set_param_cmd *cmd;
1622 struct sk_buff *skb;
1623 int ret;
1624
1625 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1626 if (!skb)
1627 return -ENOMEM;
1628
1629 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
1630 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD,
1631 sizeof(*cmd));
1632
1633 cmd->vdev_id = cpu_to_le32(vdev_id);
1634 cmd->param_id = cpu_to_le32(param_id);
1635 cmd->param_value = cpu_to_le32(param_value);
1636
1637 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1638 "WMI vdev id 0x%x set param %d value %d\n",
1639 vdev_id, param_id, param_value);
1640
1641 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID);
1642 if (ret) {
1643 ath12k_warn(ar->ab,
1644 "failed to send WMI_VDEV_SET_PARAM_CMDID\n");
1645 dev_kfree_skb(skb);
1646 }
1647
1648 return ret;
1649 }
1650
ath12k_wmi_send_pdev_temperature_cmd(struct ath12k * ar)1651 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar)
1652 {
1653 struct ath12k_wmi_pdev *wmi = ar->wmi;
1654 struct wmi_get_pdev_temperature_cmd *cmd;
1655 struct sk_buff *skb;
1656 int ret;
1657
1658 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1659 if (!skb)
1660 return -ENOMEM;
1661
1662 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data;
1663 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1664 sizeof(*cmd));
1665 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1666
1667 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1668 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id);
1669
1670 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID);
1671 if (ret) {
1672 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n");
1673 dev_kfree_skb(skb);
1674 }
1675
1676 return ret;
1677 }
1678
ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k * ar,u32 vdev_id,u32 bcn_ctrl_op)1679 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar,
1680 u32 vdev_id, u32 bcn_ctrl_op)
1681 {
1682 struct ath12k_wmi_pdev *wmi = ar->wmi;
1683 struct wmi_bcn_offload_ctrl_cmd *cmd;
1684 struct sk_buff *skb;
1685 int ret;
1686
1687 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1688 if (!skb)
1689 return -ENOMEM;
1690
1691 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data;
1692 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1693 sizeof(*cmd));
1694
1695 cmd->vdev_id = cpu_to_le32(vdev_id);
1696 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op);
1697
1698 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1699 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n",
1700 vdev_id, bcn_ctrl_op);
1701
1702 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID);
1703 if (ret) {
1704 ath12k_warn(ar->ab,
1705 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n");
1706 dev_kfree_skb(skb);
1707 }
1708
1709 return ret;
1710 }
1711
ath12k_wmi_bcn_tmpl(struct ath12k * ar,u32 vdev_id,struct ieee80211_mutable_offsets * offs,struct sk_buff * bcn)1712 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id,
1713 struct ieee80211_mutable_offsets *offs,
1714 struct sk_buff *bcn)
1715 {
1716 struct ath12k_wmi_pdev *wmi = ar->wmi;
1717 struct wmi_bcn_tmpl_cmd *cmd;
1718 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info;
1719 struct wmi_tlv *tlv;
1720 struct sk_buff *skb;
1721 void *ptr;
1722 int ret, len;
1723 size_t aligned_len = roundup(bcn->len, 4);
1724
1725 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len;
1726
1727 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1728 if (!skb)
1729 return -ENOMEM;
1730
1731 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data;
1732 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD,
1733 sizeof(*cmd));
1734 cmd->vdev_id = cpu_to_le32(vdev_id);
1735 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset);
1736 cmd->csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[0]);
1737 cmd->ext_csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[1]);
1738 cmd->buf_len = cpu_to_le32(bcn->len);
1739
1740 ptr = skb->data + sizeof(*cmd);
1741
1742 bcn_prb_info = ptr;
1743 len = sizeof(*bcn_prb_info);
1744 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
1745 len);
1746 bcn_prb_info->caps = 0;
1747 bcn_prb_info->erp = 0;
1748
1749 ptr += sizeof(*bcn_prb_info);
1750
1751 tlv = ptr;
1752 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
1753 memcpy(tlv->value, bcn->data, bcn->len);
1754
1755 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID);
1756 if (ret) {
1757 ath12k_warn(ar->ab, "failed to send WMI_BCN_TMPL_CMDID\n");
1758 dev_kfree_skb(skb);
1759 }
1760
1761 return ret;
1762 }
1763
ath12k_wmi_vdev_install_key(struct ath12k * ar,struct wmi_vdev_install_key_arg * arg)1764 int ath12k_wmi_vdev_install_key(struct ath12k *ar,
1765 struct wmi_vdev_install_key_arg *arg)
1766 {
1767 struct ath12k_wmi_pdev *wmi = ar->wmi;
1768 struct wmi_vdev_install_key_cmd *cmd;
1769 struct wmi_tlv *tlv;
1770 struct sk_buff *skb;
1771 int ret, len, key_len_aligned;
1772
1773 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key
1774 * length is specified in cmd->key_len.
1775 */
1776 key_len_aligned = roundup(arg->key_len, 4);
1777
1778 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned;
1779
1780 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1781 if (!skb)
1782 return -ENOMEM;
1783
1784 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
1785 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD,
1786 sizeof(*cmd));
1787 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1788 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
1789 cmd->key_idx = cpu_to_le32(arg->key_idx);
1790 cmd->key_flags = cpu_to_le32(arg->key_flags);
1791 cmd->key_cipher = cpu_to_le32(arg->key_cipher);
1792 cmd->key_len = cpu_to_le32(arg->key_len);
1793 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len);
1794 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len);
1795
1796 if (arg->key_rsc_counter)
1797 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter);
1798
1799 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
1800 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned);
1801 memcpy(tlv->value, arg->key_data, arg->key_len);
1802
1803 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1804 "WMI vdev install key idx %d cipher %d len %d\n",
1805 arg->key_idx, arg->key_cipher, arg->key_len);
1806
1807 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID);
1808 if (ret) {
1809 ath12k_warn(ar->ab,
1810 "failed to send WMI_VDEV_INSTALL_KEY cmd\n");
1811 dev_kfree_skb(skb);
1812 }
1813
1814 return ret;
1815 }
1816
ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd * cmd,struct ath12k_wmi_peer_assoc_arg * arg,bool hw_crypto_disabled)1817 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd,
1818 struct ath12k_wmi_peer_assoc_arg *arg,
1819 bool hw_crypto_disabled)
1820 {
1821 cmd->peer_flags = 0;
1822 cmd->peer_flags_ext = 0;
1823
1824 if (arg->is_wme_set) {
1825 if (arg->qos_flag)
1826 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS);
1827 if (arg->apsd_flag)
1828 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD);
1829 if (arg->ht_flag)
1830 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT);
1831 if (arg->bw_40)
1832 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ);
1833 if (arg->bw_80)
1834 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ);
1835 if (arg->bw_160)
1836 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ);
1837 if (arg->bw_320)
1838 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ);
1839
1840 /* Typically if STBC is enabled for VHT it should be enabled
1841 * for HT as well
1842 **/
1843 if (arg->stbc_flag)
1844 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC);
1845
1846 /* Typically if LDPC is enabled for VHT it should be enabled
1847 * for HT as well
1848 **/
1849 if (arg->ldpc_flag)
1850 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC);
1851
1852 if (arg->static_mimops_flag)
1853 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS);
1854 if (arg->dynamic_mimops_flag)
1855 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS);
1856 if (arg->spatial_mux_flag)
1857 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX);
1858 if (arg->vht_flag)
1859 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT);
1860 if (arg->he_flag)
1861 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE);
1862 if (arg->twt_requester)
1863 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ);
1864 if (arg->twt_responder)
1865 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP);
1866 if (arg->eht_flag)
1867 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT);
1868 }
1869
1870 /* Suppress authorization for all AUTH modes that need 4-way handshake
1871 * (during re-association).
1872 * Authorization will be done for these modes on key installation.
1873 */
1874 if (arg->auth_flag)
1875 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH);
1876 if (arg->need_ptk_4_way) {
1877 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY);
1878 if (!hw_crypto_disabled)
1879 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH);
1880 }
1881 if (arg->need_gtk_2_way)
1882 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY);
1883 /* safe mode bypass the 4-way handshake */
1884 if (arg->safe_mode_enabled)
1885 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY |
1886 WMI_PEER_NEED_GTK_2_WAY));
1887
1888 if (arg->is_pmf_enabled)
1889 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF);
1890
1891 /* Disable AMSDU for station transmit, if user configures it */
1892 /* Disable AMSDU for AP transmit to 11n Stations, if user configures
1893 * it
1894 * if (arg->amsdu_disable) Add after FW support
1895 **/
1896
1897 /* Target asserts if node is marked HT and all MCS is set to 0.
1898 * Mark the node as non-HT if all the mcs rates are disabled through
1899 * iwpriv
1900 **/
1901 if (arg->peer_ht_rates.num_rates == 0)
1902 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT);
1903 }
1904
ath12k_wmi_send_peer_assoc_cmd(struct ath12k * ar,struct ath12k_wmi_peer_assoc_arg * arg)1905 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar,
1906 struct ath12k_wmi_peer_assoc_arg *arg)
1907 {
1908 struct ath12k_wmi_pdev *wmi = ar->wmi;
1909 struct wmi_peer_assoc_complete_cmd *cmd;
1910 struct ath12k_wmi_vht_rate_set_params *mcs;
1911 struct ath12k_wmi_he_rate_set_params *he_mcs;
1912 struct ath12k_wmi_eht_rate_set_params *eht_mcs;
1913 struct sk_buff *skb;
1914 struct wmi_tlv *tlv;
1915 void *ptr;
1916 u32 peer_legacy_rates_align;
1917 u32 peer_ht_rates_align;
1918 int i, ret, len;
1919
1920 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates,
1921 sizeof(u32));
1922 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates,
1923 sizeof(u32));
1924
1925 len = sizeof(*cmd) +
1926 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) +
1927 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) +
1928 sizeof(*mcs) + TLV_HDR_SIZE +
1929 (sizeof(*he_mcs) * arg->peer_he_mcs_count) +
1930 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count) +
1931 TLV_HDR_SIZE + TLV_HDR_SIZE;
1932
1933 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1934 if (!skb)
1935 return -ENOMEM;
1936
1937 ptr = skb->data;
1938
1939 cmd = ptr;
1940 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
1941 sizeof(*cmd));
1942
1943 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1944
1945 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc);
1946 cmd->peer_associd = cpu_to_le32(arg->peer_associd);
1947 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
1948
1949 ath12k_wmi_copy_peer_flags(cmd, arg,
1950 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED,
1951 &ar->ab->dev_flags));
1952
1953 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac);
1954
1955 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps);
1956 cmd->peer_caps = cpu_to_le32(arg->peer_caps);
1957 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval);
1958 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps);
1959 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu);
1960 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density);
1961 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps);
1962 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode);
1963
1964 /* Update 11ax capabilities */
1965 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]);
1966 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]);
1967 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal);
1968 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz);
1969 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops);
1970 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
1971 cmd->peer_he_cap_phy[i] =
1972 cpu_to_le32(arg->peer_he_cap_phyinfo[i]);
1973 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1);
1974 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask);
1975 for (i = 0; i < WMI_MAX_NUM_SS; i++)
1976 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] =
1977 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]);
1978
1979 /* Update 11be capabilities */
1980 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac),
1981 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac),
1982 0);
1983 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy),
1984 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy),
1985 0);
1986 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet),
1987 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0);
1988
1989 /* Update peer legacy rate information */
1990 ptr += sizeof(*cmd);
1991
1992 tlv = ptr;
1993 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align);
1994
1995 ptr += TLV_HDR_SIZE;
1996
1997 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates);
1998 memcpy(ptr, arg->peer_legacy_rates.rates,
1999 arg->peer_legacy_rates.num_rates);
2000
2001 /* Update peer HT rate information */
2002 ptr += peer_legacy_rates_align;
2003
2004 tlv = ptr;
2005 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align);
2006 ptr += TLV_HDR_SIZE;
2007 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates);
2008 memcpy(ptr, arg->peer_ht_rates.rates,
2009 arg->peer_ht_rates.num_rates);
2010
2011 /* VHT Rates */
2012 ptr += peer_ht_rates_align;
2013
2014 mcs = ptr;
2015
2016 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET,
2017 sizeof(*mcs));
2018
2019 cmd->peer_nss = cpu_to_le32(arg->peer_nss);
2020
2021 /* Update bandwidth-NSS mapping */
2022 cmd->peer_bw_rxnss_override = 0;
2023 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override);
2024
2025 if (arg->vht_capable) {
2026 mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate);
2027 mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set);
2028 mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate);
2029 mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set);
2030 }
2031
2032 /* HE Rates */
2033 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count);
2034 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate);
2035
2036 ptr += sizeof(*mcs);
2037
2038 len = arg->peer_he_mcs_count * sizeof(*he_mcs);
2039
2040 tlv = ptr;
2041 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2042 ptr += TLV_HDR_SIZE;
2043
2044 /* Loop through the HE rate set */
2045 for (i = 0; i < arg->peer_he_mcs_count; i++) {
2046 he_mcs = ptr;
2047 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2048 sizeof(*he_mcs));
2049
2050 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]);
2051 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]);
2052 ptr += sizeof(*he_mcs);
2053 }
2054
2055 /* MLO header tag with 0 length */
2056 len = 0;
2057 tlv = ptr;
2058 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2059 ptr += TLV_HDR_SIZE;
2060
2061 /* Loop through the EHT rate set */
2062 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs);
2063 tlv = ptr;
2064 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2065 ptr += TLV_HDR_SIZE;
2066
2067 for (i = 0; i < arg->peer_eht_mcs_count; i++) {
2068 eht_mcs = ptr;
2069 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2070 sizeof(*eht_mcs));
2071
2072 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]);
2073 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]);
2074 ptr += sizeof(*eht_mcs);
2075 }
2076
2077 /* ML partner links tag with 0 length */
2078 len = 0;
2079 tlv = ptr;
2080 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2081 ptr += TLV_HDR_SIZE;
2082
2083 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2084 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x\n",
2085 cmd->vdev_id, cmd->peer_associd, arg->peer_mac,
2086 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps,
2087 cmd->peer_listen_intval, cmd->peer_ht_caps,
2088 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode,
2089 cmd->peer_mpdu_density,
2090 cmd->peer_vht_caps, cmd->peer_he_cap_info,
2091 cmd->peer_he_ops, cmd->peer_he_cap_info_ext,
2092 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1],
2093 cmd->peer_he_cap_phy[2],
2094 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext,
2095 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1],
2096 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1],
2097 cmd->peer_eht_cap_phy[2]);
2098
2099 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID);
2100 if (ret) {
2101 ath12k_warn(ar->ab,
2102 "failed to send WMI_PEER_ASSOC_CMDID\n");
2103 dev_kfree_skb(skb);
2104 }
2105
2106 return ret;
2107 }
2108
ath12k_wmi_start_scan_init(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2109 void ath12k_wmi_start_scan_init(struct ath12k *ar,
2110 struct ath12k_wmi_scan_req_arg *arg)
2111 {
2112 /* setup commonly used values */
2113 arg->scan_req_id = 1;
2114 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2115 arg->dwell_time_active = 50;
2116 arg->dwell_time_active_2g = 0;
2117 arg->dwell_time_passive = 150;
2118 arg->dwell_time_active_6g = 40;
2119 arg->dwell_time_passive_6g = 30;
2120 arg->min_rest_time = 50;
2121 arg->max_rest_time = 500;
2122 arg->repeat_probe_time = 0;
2123 arg->probe_spacing_time = 0;
2124 arg->idle_time = 0;
2125 arg->max_scan_time = 20000;
2126 arg->probe_delay = 5;
2127 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED |
2128 WMI_SCAN_EVENT_COMPLETED |
2129 WMI_SCAN_EVENT_BSS_CHANNEL |
2130 WMI_SCAN_EVENT_FOREIGN_CHAN |
2131 WMI_SCAN_EVENT_DEQUEUED;
2132 arg->scan_flags |= WMI_SCAN_CHAN_STAT_EVENT;
2133 arg->num_bssid = 1;
2134
2135 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be
2136 * ZEROs in probe request
2137 */
2138 eth_broadcast_addr(arg->bssid_list[0].addr);
2139 }
2140
ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd * cmd,struct ath12k_wmi_scan_req_arg * arg)2141 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd,
2142 struct ath12k_wmi_scan_req_arg *arg)
2143 {
2144 /* Scan events subscription */
2145 if (arg->scan_ev_started)
2146 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED);
2147 if (arg->scan_ev_completed)
2148 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED);
2149 if (arg->scan_ev_bss_chan)
2150 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL);
2151 if (arg->scan_ev_foreign_chan)
2152 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN);
2153 if (arg->scan_ev_dequeued)
2154 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED);
2155 if (arg->scan_ev_preempted)
2156 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED);
2157 if (arg->scan_ev_start_failed)
2158 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED);
2159 if (arg->scan_ev_restarted)
2160 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED);
2161 if (arg->scan_ev_foreign_chn_exit)
2162 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT);
2163 if (arg->scan_ev_suspended)
2164 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED);
2165 if (arg->scan_ev_resumed)
2166 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED);
2167
2168 /** Set scan control flags */
2169 cmd->scan_ctrl_flags = 0;
2170 if (arg->scan_f_passive)
2171 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE);
2172 if (arg->scan_f_strict_passive_pch)
2173 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN);
2174 if (arg->scan_f_promisc_mode)
2175 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS);
2176 if (arg->scan_f_capture_phy_err)
2177 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR);
2178 if (arg->scan_f_half_rate)
2179 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT);
2180 if (arg->scan_f_quarter_rate)
2181 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT);
2182 if (arg->scan_f_cck_rates)
2183 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES);
2184 if (arg->scan_f_ofdm_rates)
2185 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES);
2186 if (arg->scan_f_chan_stat_evnt)
2187 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT);
2188 if (arg->scan_f_filter_prb_req)
2189 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ);
2190 if (arg->scan_f_bcast_probe)
2191 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ);
2192 if (arg->scan_f_offchan_mgmt_tx)
2193 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX);
2194 if (arg->scan_f_offchan_data_tx)
2195 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX);
2196 if (arg->scan_f_force_active_dfs_chn)
2197 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS);
2198 if (arg->scan_f_add_tpc_ie_in_probe)
2199 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ);
2200 if (arg->scan_f_add_ds_ie_in_probe)
2201 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ);
2202 if (arg->scan_f_add_spoofed_mac_in_probe)
2203 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ);
2204 if (arg->scan_f_add_rand_seq_in_probe)
2205 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ);
2206 if (arg->scan_f_en_ie_whitelist_in_probe)
2207 cmd->scan_ctrl_flags |=
2208 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ);
2209
2210 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode,
2211 WMI_SCAN_DWELL_MODE_MASK);
2212 }
2213
ath12k_wmi_send_scan_start_cmd(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2214 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar,
2215 struct ath12k_wmi_scan_req_arg *arg)
2216 {
2217 struct ath12k_wmi_pdev *wmi = ar->wmi;
2218 struct wmi_start_scan_cmd *cmd;
2219 struct ath12k_wmi_ssid_params *ssid = NULL;
2220 struct ath12k_wmi_mac_addr_params *bssid;
2221 struct sk_buff *skb;
2222 struct wmi_tlv *tlv;
2223 void *ptr;
2224 int i, ret, len;
2225 u32 *tmp_ptr, extraie_len_with_pad = 0;
2226 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL;
2227 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL;
2228
2229 len = sizeof(*cmd);
2230
2231 len += TLV_HDR_SIZE;
2232 if (arg->num_chan)
2233 len += arg->num_chan * sizeof(u32);
2234
2235 len += TLV_HDR_SIZE;
2236 if (arg->num_ssids)
2237 len += arg->num_ssids * sizeof(*ssid);
2238
2239 len += TLV_HDR_SIZE;
2240 if (arg->num_bssid)
2241 len += sizeof(*bssid) * arg->num_bssid;
2242
2243 if (arg->num_hint_bssid)
2244 len += TLV_HDR_SIZE +
2245 arg->num_hint_bssid * sizeof(*hint_bssid);
2246
2247 if (arg->num_hint_s_ssid)
2248 len += TLV_HDR_SIZE +
2249 arg->num_hint_s_ssid * sizeof(*s_ssid);
2250
2251 len += TLV_HDR_SIZE;
2252 if (arg->extraie.len)
2253 extraie_len_with_pad =
2254 roundup(arg->extraie.len, sizeof(u32));
2255 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) {
2256 len += extraie_len_with_pad;
2257 } else {
2258 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n",
2259 arg->extraie.len);
2260 extraie_len_with_pad = 0;
2261 }
2262
2263 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2264 if (!skb)
2265 return -ENOMEM;
2266
2267 ptr = skb->data;
2268
2269 cmd = ptr;
2270 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD,
2271 sizeof(*cmd));
2272
2273 cmd->scan_id = cpu_to_le32(arg->scan_id);
2274 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id);
2275 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2276 cmd->scan_priority = cpu_to_le32(arg->scan_priority);
2277 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events);
2278
2279 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg);
2280
2281 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active);
2282 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g);
2283 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive);
2284 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g);
2285 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g);
2286 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time);
2287 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time);
2288 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time);
2289 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time);
2290 cmd->idle_time = cpu_to_le32(arg->idle_time);
2291 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time);
2292 cmd->probe_delay = cpu_to_le32(arg->probe_delay);
2293 cmd->burst_duration = cpu_to_le32(arg->burst_duration);
2294 cmd->num_chan = cpu_to_le32(arg->num_chan);
2295 cmd->num_bssid = cpu_to_le32(arg->num_bssid);
2296 cmd->num_ssids = cpu_to_le32(arg->num_ssids);
2297 cmd->ie_len = cpu_to_le32(arg->extraie.len);
2298 cmd->n_probes = cpu_to_le32(arg->n_probes);
2299
2300 ptr += sizeof(*cmd);
2301
2302 len = arg->num_chan * sizeof(u32);
2303
2304 tlv = ptr;
2305 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len);
2306 ptr += TLV_HDR_SIZE;
2307 tmp_ptr = (u32 *)ptr;
2308
2309 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4);
2310
2311 ptr += len;
2312
2313 len = arg->num_ssids * sizeof(*ssid);
2314 tlv = ptr;
2315 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2316
2317 ptr += TLV_HDR_SIZE;
2318
2319 if (arg->num_ssids) {
2320 ssid = ptr;
2321 for (i = 0; i < arg->num_ssids; ++i) {
2322 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len);
2323 memcpy(ssid->ssid, arg->ssid[i].ssid,
2324 arg->ssid[i].ssid_len);
2325 ssid++;
2326 }
2327 }
2328
2329 ptr += (arg->num_ssids * sizeof(*ssid));
2330 len = arg->num_bssid * sizeof(*bssid);
2331 tlv = ptr;
2332 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2333
2334 ptr += TLV_HDR_SIZE;
2335 bssid = ptr;
2336
2337 if (arg->num_bssid) {
2338 for (i = 0; i < arg->num_bssid; ++i) {
2339 ether_addr_copy(bssid->addr,
2340 arg->bssid_list[i].addr);
2341 bssid++;
2342 }
2343 }
2344
2345 ptr += arg->num_bssid * sizeof(*bssid);
2346
2347 len = extraie_len_with_pad;
2348 tlv = ptr;
2349 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len);
2350 ptr += TLV_HDR_SIZE;
2351
2352 if (extraie_len_with_pad)
2353 memcpy(ptr, arg->extraie.ptr,
2354 arg->extraie.len);
2355
2356 ptr += extraie_len_with_pad;
2357
2358 if (arg->num_hint_s_ssid) {
2359 len = arg->num_hint_s_ssid * sizeof(*s_ssid);
2360 tlv = ptr;
2361 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2362 ptr += TLV_HDR_SIZE;
2363 s_ssid = ptr;
2364 for (i = 0; i < arg->num_hint_s_ssid; ++i) {
2365 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags;
2366 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid;
2367 s_ssid++;
2368 }
2369 ptr += len;
2370 }
2371
2372 if (arg->num_hint_bssid) {
2373 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg);
2374 tlv = ptr;
2375 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2376 ptr += TLV_HDR_SIZE;
2377 hint_bssid = ptr;
2378 for (i = 0; i < arg->num_hint_bssid; ++i) {
2379 hint_bssid->freq_flags =
2380 arg->hint_bssid[i].freq_flags;
2381 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0],
2382 &hint_bssid->bssid.addr[0]);
2383 hint_bssid++;
2384 }
2385 }
2386
2387 ret = ath12k_wmi_cmd_send(wmi, skb,
2388 WMI_START_SCAN_CMDID);
2389 if (ret) {
2390 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n");
2391 dev_kfree_skb(skb);
2392 }
2393
2394 return ret;
2395 }
2396
ath12k_wmi_send_scan_stop_cmd(struct ath12k * ar,struct ath12k_wmi_scan_cancel_arg * arg)2397 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar,
2398 struct ath12k_wmi_scan_cancel_arg *arg)
2399 {
2400 struct ath12k_wmi_pdev *wmi = ar->wmi;
2401 struct wmi_stop_scan_cmd *cmd;
2402 struct sk_buff *skb;
2403 int ret;
2404
2405 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2406 if (!skb)
2407 return -ENOMEM;
2408
2409 cmd = (struct wmi_stop_scan_cmd *)skb->data;
2410
2411 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD,
2412 sizeof(*cmd));
2413
2414 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2415 cmd->requestor = cpu_to_le32(arg->requester);
2416 cmd->scan_id = cpu_to_le32(arg->scan_id);
2417 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2418 /* stop the scan with the corresponding scan_id */
2419 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) {
2420 /* Cancelling all scans */
2421 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL);
2422 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) {
2423 /* Cancelling VAP scans */
2424 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL);
2425 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) {
2426 /* Cancelling specific scan */
2427 cmd->req_type = WMI_SCAN_STOP_ONE;
2428 } else {
2429 ath12k_warn(ar->ab, "invalid scan cancel req_type %d",
2430 arg->req_type);
2431 dev_kfree_skb(skb);
2432 return -EINVAL;
2433 }
2434
2435 ret = ath12k_wmi_cmd_send(wmi, skb,
2436 WMI_STOP_SCAN_CMDID);
2437 if (ret) {
2438 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n");
2439 dev_kfree_skb(skb);
2440 }
2441
2442 return ret;
2443 }
2444
ath12k_wmi_send_scan_chan_list_cmd(struct ath12k * ar,struct ath12k_wmi_scan_chan_list_arg * arg)2445 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar,
2446 struct ath12k_wmi_scan_chan_list_arg *arg)
2447 {
2448 struct ath12k_wmi_pdev *wmi = ar->wmi;
2449 struct wmi_scan_chan_list_cmd *cmd;
2450 struct sk_buff *skb;
2451 struct ath12k_wmi_channel_params *chan_info;
2452 struct ath12k_wmi_channel_arg *channel_arg;
2453 struct wmi_tlv *tlv;
2454 void *ptr;
2455 int i, ret, len;
2456 u16 num_send_chans, num_sends = 0, max_chan_limit = 0;
2457 __le32 *reg1, *reg2;
2458
2459 channel_arg = &arg->channel[0];
2460 while (arg->nallchans) {
2461 len = sizeof(*cmd) + TLV_HDR_SIZE;
2462 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) /
2463 sizeof(*chan_info);
2464
2465 num_send_chans = min(arg->nallchans, max_chan_limit);
2466
2467 arg->nallchans -= num_send_chans;
2468 len += sizeof(*chan_info) * num_send_chans;
2469
2470 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2471 if (!skb)
2472 return -ENOMEM;
2473
2474 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
2475 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD,
2476 sizeof(*cmd));
2477 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2478 cmd->num_scan_chans = cpu_to_le32(num_send_chans);
2479 if (num_sends)
2480 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG);
2481
2482 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2483 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n",
2484 num_send_chans, len, cmd->pdev_id, num_sends);
2485
2486 ptr = skb->data + sizeof(*cmd);
2487
2488 len = sizeof(*chan_info) * num_send_chans;
2489 tlv = ptr;
2490 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT,
2491 len);
2492 ptr += TLV_HDR_SIZE;
2493
2494 for (i = 0; i < num_send_chans; ++i) {
2495 chan_info = ptr;
2496 memset(chan_info, 0, sizeof(*chan_info));
2497 len = sizeof(*chan_info);
2498 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
2499 len);
2500
2501 reg1 = &chan_info->reg_info_1;
2502 reg2 = &chan_info->reg_info_2;
2503 chan_info->mhz = cpu_to_le32(channel_arg->mhz);
2504 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1);
2505 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2);
2506
2507 if (channel_arg->is_chan_passive)
2508 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
2509 if (channel_arg->allow_he)
2510 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
2511 else if (channel_arg->allow_vht)
2512 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
2513 else if (channel_arg->allow_ht)
2514 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
2515 if (channel_arg->half_rate)
2516 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE);
2517 if (channel_arg->quarter_rate)
2518 chan_info->info |=
2519 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE);
2520
2521 if (channel_arg->psc_channel)
2522 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC);
2523
2524 if (channel_arg->dfs_set)
2525 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
2526
2527 chan_info->info |= le32_encode_bits(channel_arg->phy_mode,
2528 WMI_CHAN_INFO_MODE);
2529 *reg1 |= le32_encode_bits(channel_arg->minpower,
2530 WMI_CHAN_REG_INFO1_MIN_PWR);
2531 *reg1 |= le32_encode_bits(channel_arg->maxpower,
2532 WMI_CHAN_REG_INFO1_MAX_PWR);
2533 *reg1 |= le32_encode_bits(channel_arg->maxregpower,
2534 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
2535 *reg1 |= le32_encode_bits(channel_arg->reg_class_id,
2536 WMI_CHAN_REG_INFO1_REG_CLS);
2537 *reg2 |= le32_encode_bits(channel_arg->antennamax,
2538 WMI_CHAN_REG_INFO2_ANT_MAX);
2539
2540 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2541 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n",
2542 i, chan_info->mhz, chan_info->info);
2543
2544 ptr += sizeof(*chan_info);
2545
2546 channel_arg++;
2547 }
2548
2549 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID);
2550 if (ret) {
2551 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n");
2552 dev_kfree_skb(skb);
2553 return ret;
2554 }
2555
2556 num_sends++;
2557 }
2558
2559 return 0;
2560 }
2561
ath12k_wmi_send_wmm_update_cmd(struct ath12k * ar,u32 vdev_id,struct wmi_wmm_params_all_arg * param)2562 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id,
2563 struct wmi_wmm_params_all_arg *param)
2564 {
2565 struct ath12k_wmi_pdev *wmi = ar->wmi;
2566 struct wmi_vdev_set_wmm_params_cmd *cmd;
2567 struct wmi_wmm_params *wmm_param;
2568 struct wmi_wmm_params_arg *wmi_wmm_arg;
2569 struct sk_buff *skb;
2570 int ret, ac;
2571
2572 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2573 if (!skb)
2574 return -ENOMEM;
2575
2576 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data;
2577 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
2578 sizeof(*cmd));
2579
2580 cmd->vdev_id = cpu_to_le32(vdev_id);
2581 cmd->wmm_param_type = 0;
2582
2583 for (ac = 0; ac < WME_NUM_AC; ac++) {
2584 switch (ac) {
2585 case WME_AC_BE:
2586 wmi_wmm_arg = ¶m->ac_be;
2587 break;
2588 case WME_AC_BK:
2589 wmi_wmm_arg = ¶m->ac_bk;
2590 break;
2591 case WME_AC_VI:
2592 wmi_wmm_arg = ¶m->ac_vi;
2593 break;
2594 case WME_AC_VO:
2595 wmi_wmm_arg = ¶m->ac_vo;
2596 break;
2597 }
2598
2599 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac];
2600 wmm_param->tlv_header =
2601 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
2602 sizeof(*wmm_param));
2603
2604 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs);
2605 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin);
2606 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax);
2607 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop);
2608 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm);
2609 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack);
2610
2611 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2612 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n",
2613 ac, wmm_param->aifs, wmm_param->cwmin,
2614 wmm_param->cwmax, wmm_param->txoplimit,
2615 wmm_param->acm, wmm_param->no_ack);
2616 }
2617 ret = ath12k_wmi_cmd_send(wmi, skb,
2618 WMI_VDEV_SET_WMM_PARAMS_CMDID);
2619 if (ret) {
2620 ath12k_warn(ar->ab,
2621 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID");
2622 dev_kfree_skb(skb);
2623 }
2624
2625 return ret;
2626 }
2627
ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k * ar,u32 pdev_id)2628 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar,
2629 u32 pdev_id)
2630 {
2631 struct ath12k_wmi_pdev *wmi = ar->wmi;
2632 struct wmi_dfs_phyerr_offload_cmd *cmd;
2633 struct sk_buff *skb;
2634 int ret;
2635
2636 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2637 if (!skb)
2638 return -ENOMEM;
2639
2640 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data;
2641 cmd->tlv_header =
2642 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
2643 sizeof(*cmd));
2644
2645 cmd->pdev_id = cpu_to_le32(pdev_id);
2646
2647 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2648 "WMI dfs phy err offload enable pdev id %d\n", pdev_id);
2649
2650 ret = ath12k_wmi_cmd_send(wmi, skb,
2651 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID);
2652 if (ret) {
2653 ath12k_warn(ar->ab,
2654 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n");
2655 dev_kfree_skb(skb);
2656 }
2657
2658 return ret;
2659 }
2660
ath12k_wmi_delba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)2661 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
2662 u32 tid, u32 initiator, u32 reason)
2663 {
2664 struct ath12k_wmi_pdev *wmi = ar->wmi;
2665 struct wmi_delba_send_cmd *cmd;
2666 struct sk_buff *skb;
2667 int ret;
2668
2669 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2670 if (!skb)
2671 return -ENOMEM;
2672
2673 cmd = (struct wmi_delba_send_cmd *)skb->data;
2674 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD,
2675 sizeof(*cmd));
2676 cmd->vdev_id = cpu_to_le32(vdev_id);
2677 ether_addr_copy(cmd->peer_macaddr.addr, mac);
2678 cmd->tid = cpu_to_le32(tid);
2679 cmd->initiator = cpu_to_le32(initiator);
2680 cmd->reasoncode = cpu_to_le32(reason);
2681
2682 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2683 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
2684 vdev_id, mac, tid, initiator, reason);
2685
2686 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID);
2687
2688 if (ret) {
2689 ath12k_warn(ar->ab,
2690 "failed to send WMI_DELBA_SEND_CMDID cmd\n");
2691 dev_kfree_skb(skb);
2692 }
2693
2694 return ret;
2695 }
2696
ath12k_wmi_addba_set_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)2697 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac,
2698 u32 tid, u32 status)
2699 {
2700 struct ath12k_wmi_pdev *wmi = ar->wmi;
2701 struct wmi_addba_setresponse_cmd *cmd;
2702 struct sk_buff *skb;
2703 int ret;
2704
2705 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2706 if (!skb)
2707 return -ENOMEM;
2708
2709 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
2710 cmd->tlv_header =
2711 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD,
2712 sizeof(*cmd));
2713 cmd->vdev_id = cpu_to_le32(vdev_id);
2714 ether_addr_copy(cmd->peer_macaddr.addr, mac);
2715 cmd->tid = cpu_to_le32(tid);
2716 cmd->statuscode = cpu_to_le32(status);
2717
2718 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2719 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
2720 vdev_id, mac, tid, status);
2721
2722 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID);
2723
2724 if (ret) {
2725 ath12k_warn(ar->ab,
2726 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n");
2727 dev_kfree_skb(skb);
2728 }
2729
2730 return ret;
2731 }
2732
ath12k_wmi_addba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)2733 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
2734 u32 tid, u32 buf_size)
2735 {
2736 struct ath12k_wmi_pdev *wmi = ar->wmi;
2737 struct wmi_addba_send_cmd *cmd;
2738 struct sk_buff *skb;
2739 int ret;
2740
2741 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2742 if (!skb)
2743 return -ENOMEM;
2744
2745 cmd = (struct wmi_addba_send_cmd *)skb->data;
2746 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD,
2747 sizeof(*cmd));
2748 cmd->vdev_id = cpu_to_le32(vdev_id);
2749 ether_addr_copy(cmd->peer_macaddr.addr, mac);
2750 cmd->tid = cpu_to_le32(tid);
2751 cmd->buffersize = cpu_to_le32(buf_size);
2752
2753 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2754 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
2755 vdev_id, mac, tid, buf_size);
2756
2757 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID);
2758
2759 if (ret) {
2760 ath12k_warn(ar->ab,
2761 "failed to send WMI_ADDBA_SEND_CMDID cmd\n");
2762 dev_kfree_skb(skb);
2763 }
2764
2765 return ret;
2766 }
2767
ath12k_wmi_addba_clear_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac)2768 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac)
2769 {
2770 struct ath12k_wmi_pdev *wmi = ar->wmi;
2771 struct wmi_addba_clear_resp_cmd *cmd;
2772 struct sk_buff *skb;
2773 int ret;
2774
2775 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2776 if (!skb)
2777 return -ENOMEM;
2778
2779 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
2780 cmd->tlv_header =
2781 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD,
2782 sizeof(*cmd));
2783 cmd->vdev_id = cpu_to_le32(vdev_id);
2784 ether_addr_copy(cmd->peer_macaddr.addr, mac);
2785
2786 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2787 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
2788 vdev_id, mac);
2789
2790 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID);
2791
2792 if (ret) {
2793 ath12k_warn(ar->ab,
2794 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n");
2795 dev_kfree_skb(skb);
2796 }
2797
2798 return ret;
2799 }
2800
ath12k_wmi_send_init_country_cmd(struct ath12k * ar,struct ath12k_wmi_init_country_arg * arg)2801 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
2802 struct ath12k_wmi_init_country_arg *arg)
2803 {
2804 struct ath12k_wmi_pdev *wmi = ar->wmi;
2805 struct wmi_init_country_cmd *cmd;
2806 struct sk_buff *skb;
2807 int ret;
2808
2809 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2810 if (!skb)
2811 return -ENOMEM;
2812
2813 cmd = (struct wmi_init_country_cmd *)skb->data;
2814 cmd->tlv_header =
2815 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD,
2816 sizeof(*cmd));
2817
2818 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
2819
2820 switch (arg->flags) {
2821 case ALPHA_IS_SET:
2822 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA;
2823 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3);
2824 break;
2825 case CC_IS_SET:
2826 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE);
2827 cmd->cc_info.country_code =
2828 cpu_to_le32(arg->cc_info.country_code);
2829 break;
2830 case REGDMN_IS_SET:
2831 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN);
2832 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id);
2833 break;
2834 default:
2835 ret = -EINVAL;
2836 goto out;
2837 }
2838
2839 ret = ath12k_wmi_cmd_send(wmi, skb,
2840 WMI_SET_INIT_COUNTRY_CMDID);
2841
2842 out:
2843 if (ret) {
2844 ath12k_warn(ar->ab,
2845 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n",
2846 ret);
2847 dev_kfree_skb(skb);
2848 }
2849
2850 return ret;
2851 }
2852
2853 int
ath12k_wmi_send_twt_enable_cmd(struct ath12k * ar,u32 pdev_id)2854 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id)
2855 {
2856 struct ath12k_wmi_pdev *wmi = ar->wmi;
2857 struct ath12k_base *ab = wmi->wmi_ab->ab;
2858 struct wmi_twt_enable_params_cmd *cmd;
2859 struct sk_buff *skb;
2860 int ret, len;
2861
2862 len = sizeof(*cmd);
2863
2864 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2865 if (!skb)
2866 return -ENOMEM;
2867
2868 cmd = (struct wmi_twt_enable_params_cmd *)skb->data;
2869 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD,
2870 len);
2871 cmd->pdev_id = cpu_to_le32(pdev_id);
2872 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS);
2873 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE);
2874 cmd->congestion_thresh_setup =
2875 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP);
2876 cmd->congestion_thresh_teardown =
2877 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN);
2878 cmd->congestion_thresh_critical =
2879 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL);
2880 cmd->interference_thresh_teardown =
2881 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN);
2882 cmd->interference_thresh_setup =
2883 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP);
2884 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP);
2885 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN);
2886 cmd->no_of_bcast_mcast_slots =
2887 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS);
2888 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS);
2889 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT);
2890 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL);
2891 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL);
2892 cmd->remove_sta_slot_interval =
2893 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL);
2894 /* TODO add MBSSID support */
2895 cmd->mbss_support = 0;
2896
2897 ret = ath12k_wmi_cmd_send(wmi, skb,
2898 WMI_TWT_ENABLE_CMDID);
2899 if (ret) {
2900 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID");
2901 dev_kfree_skb(skb);
2902 }
2903 return ret;
2904 }
2905
2906 int
ath12k_wmi_send_twt_disable_cmd(struct ath12k * ar,u32 pdev_id)2907 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id)
2908 {
2909 struct ath12k_wmi_pdev *wmi = ar->wmi;
2910 struct ath12k_base *ab = wmi->wmi_ab->ab;
2911 struct wmi_twt_disable_params_cmd *cmd;
2912 struct sk_buff *skb;
2913 int ret, len;
2914
2915 len = sizeof(*cmd);
2916
2917 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2918 if (!skb)
2919 return -ENOMEM;
2920
2921 cmd = (struct wmi_twt_disable_params_cmd *)skb->data;
2922 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD,
2923 len);
2924 cmd->pdev_id = cpu_to_le32(pdev_id);
2925
2926 ret = ath12k_wmi_cmd_send(wmi, skb,
2927 WMI_TWT_DISABLE_CMDID);
2928 if (ret) {
2929 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID");
2930 dev_kfree_skb(skb);
2931 }
2932 return ret;
2933 }
2934
2935 int
ath12k_wmi_send_obss_spr_cmd(struct ath12k * ar,u32 vdev_id,struct ieee80211_he_obss_pd * he_obss_pd)2936 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id,
2937 struct ieee80211_he_obss_pd *he_obss_pd)
2938 {
2939 struct ath12k_wmi_pdev *wmi = ar->wmi;
2940 struct ath12k_base *ab = wmi->wmi_ab->ab;
2941 struct wmi_obss_spatial_reuse_params_cmd *cmd;
2942 struct sk_buff *skb;
2943 int ret, len;
2944
2945 len = sizeof(*cmd);
2946
2947 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2948 if (!skb)
2949 return -ENOMEM;
2950
2951 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data;
2952 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
2953 len);
2954 cmd->vdev_id = cpu_to_le32(vdev_id);
2955 cmd->enable = cpu_to_le32(he_obss_pd->enable);
2956 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset);
2957 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset);
2958
2959 ret = ath12k_wmi_cmd_send(wmi, skb,
2960 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID);
2961 if (ret) {
2962 ath12k_warn(ab,
2963 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID");
2964 dev_kfree_skb(skb);
2965 }
2966 return ret;
2967 }
2968
ath12k_wmi_obss_color_cfg_cmd(struct ath12k * ar,u32 vdev_id,u8 bss_color,u32 period,bool enable)2969 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id,
2970 u8 bss_color, u32 period,
2971 bool enable)
2972 {
2973 struct ath12k_wmi_pdev *wmi = ar->wmi;
2974 struct ath12k_base *ab = wmi->wmi_ab->ab;
2975 struct wmi_obss_color_collision_cfg_params_cmd *cmd;
2976 struct sk_buff *skb;
2977 int ret, len;
2978
2979 len = sizeof(*cmd);
2980
2981 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2982 if (!skb)
2983 return -ENOMEM;
2984
2985 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data;
2986 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
2987 len);
2988 cmd->vdev_id = cpu_to_le32(vdev_id);
2989 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) :
2990 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE);
2991 cmd->current_bss_color = cpu_to_le32(bss_color);
2992 cmd->detection_period_ms = cpu_to_le32(period);
2993 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS);
2994 cmd->free_slot_expiry_time_ms = 0;
2995 cmd->flags = 0;
2996
2997 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2998 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n",
2999 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color,
3000 cmd->detection_period_ms, cmd->scan_period_ms);
3001
3002 ret = ath12k_wmi_cmd_send(wmi, skb,
3003 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID);
3004 if (ret) {
3005 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID");
3006 dev_kfree_skb(skb);
3007 }
3008 return ret;
3009 }
3010
ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k * ar,u32 vdev_id,bool enable)3011 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id,
3012 bool enable)
3013 {
3014 struct ath12k_wmi_pdev *wmi = ar->wmi;
3015 struct ath12k_base *ab = wmi->wmi_ab->ab;
3016 struct wmi_bss_color_change_enable_params_cmd *cmd;
3017 struct sk_buff *skb;
3018 int ret, len;
3019
3020 len = sizeof(*cmd);
3021
3022 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3023 if (!skb)
3024 return -ENOMEM;
3025
3026 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data;
3027 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
3028 len);
3029 cmd->vdev_id = cpu_to_le32(vdev_id);
3030 cmd->enable = enable ? cpu_to_le32(1) : 0;
3031
3032 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3033 "wmi_send_bss_color_change_enable id %d enable %d\n",
3034 cmd->vdev_id, cmd->enable);
3035
3036 ret = ath12k_wmi_cmd_send(wmi, skb,
3037 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID);
3038 if (ret) {
3039 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID");
3040 dev_kfree_skb(skb);
3041 }
3042 return ret;
3043 }
3044
ath12k_wmi_fils_discovery_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3045 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id,
3046 struct sk_buff *tmpl)
3047 {
3048 struct wmi_tlv *tlv;
3049 struct sk_buff *skb;
3050 void *ptr;
3051 int ret, len;
3052 size_t aligned_len;
3053 struct wmi_fils_discovery_tmpl_cmd *cmd;
3054
3055 aligned_len = roundup(tmpl->len, 4);
3056 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
3057
3058 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3059 "WMI vdev %i set FILS discovery template\n", vdev_id);
3060
3061 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3062 if (!skb)
3063 return -ENOMEM;
3064
3065 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data;
3066 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD,
3067 sizeof(*cmd));
3068 cmd->vdev_id = cpu_to_le32(vdev_id);
3069 cmd->buf_len = cpu_to_le32(tmpl->len);
3070 ptr = skb->data + sizeof(*cmd);
3071
3072 tlv = ptr;
3073 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3074 memcpy(tlv->value, tmpl->data, tmpl->len);
3075
3076 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID);
3077 if (ret) {
3078 ath12k_warn(ar->ab,
3079 "WMI vdev %i failed to send FILS discovery template command\n",
3080 vdev_id);
3081 dev_kfree_skb(skb);
3082 }
3083 return ret;
3084 }
3085
ath12k_wmi_probe_resp_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3086 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id,
3087 struct sk_buff *tmpl)
3088 {
3089 struct wmi_probe_tmpl_cmd *cmd;
3090 struct ath12k_wmi_bcn_prb_info_params *probe_info;
3091 struct wmi_tlv *tlv;
3092 struct sk_buff *skb;
3093 void *ptr;
3094 int ret, len;
3095 size_t aligned_len = roundup(tmpl->len, 4);
3096
3097 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3098 "WMI vdev %i set probe response template\n", vdev_id);
3099
3100 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len;
3101
3102 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3103 if (!skb)
3104 return -ENOMEM;
3105
3106 cmd = (struct wmi_probe_tmpl_cmd *)skb->data;
3107 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD,
3108 sizeof(*cmd));
3109 cmd->vdev_id = cpu_to_le32(vdev_id);
3110 cmd->buf_len = cpu_to_le32(tmpl->len);
3111
3112 ptr = skb->data + sizeof(*cmd);
3113
3114 probe_info = ptr;
3115 len = sizeof(*probe_info);
3116 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
3117 len);
3118 probe_info->caps = 0;
3119 probe_info->erp = 0;
3120
3121 ptr += sizeof(*probe_info);
3122
3123 tlv = ptr;
3124 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3125 memcpy(tlv->value, tmpl->data, tmpl->len);
3126
3127 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID);
3128 if (ret) {
3129 ath12k_warn(ar->ab,
3130 "WMI vdev %i failed to send probe response template command\n",
3131 vdev_id);
3132 dev_kfree_skb(skb);
3133 }
3134 return ret;
3135 }
3136
ath12k_wmi_fils_discovery(struct ath12k * ar,u32 vdev_id,u32 interval,bool unsol_bcast_probe_resp_enabled)3137 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval,
3138 bool unsol_bcast_probe_resp_enabled)
3139 {
3140 struct sk_buff *skb;
3141 int ret, len;
3142 struct wmi_fils_discovery_cmd *cmd;
3143
3144 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3145 "WMI vdev %i set %s interval to %u TU\n",
3146 vdev_id, unsol_bcast_probe_resp_enabled ?
3147 "unsolicited broadcast probe response" : "FILS discovery",
3148 interval);
3149
3150 len = sizeof(*cmd);
3151 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3152 if (!skb)
3153 return -ENOMEM;
3154
3155 cmd = (struct wmi_fils_discovery_cmd *)skb->data;
3156 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD,
3157 len);
3158 cmd->vdev_id = cpu_to_le32(vdev_id);
3159 cmd->interval = cpu_to_le32(interval);
3160 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled);
3161
3162 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID);
3163 if (ret) {
3164 ath12k_warn(ar->ab,
3165 "WMI vdev %i failed to send FILS discovery enable/disable command\n",
3166 vdev_id);
3167 dev_kfree_skb(skb);
3168 }
3169 return ret;
3170 }
3171
3172 static void
ath12k_fill_band_to_mac_param(struct ath12k_base * soc,struct ath12k_wmi_pdev_band_arg * arg)3173 ath12k_fill_band_to_mac_param(struct ath12k_base *soc,
3174 struct ath12k_wmi_pdev_band_arg *arg)
3175 {
3176 u8 i;
3177 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap;
3178 struct ath12k_pdev *pdev;
3179
3180 for (i = 0; i < soc->num_radios; i++) {
3181 pdev = &soc->pdevs[i];
3182 hal_reg_cap = &soc->hal_reg_cap[i];
3183 arg[i].pdev_id = pdev->pdev_id;
3184
3185 switch (pdev->cap.supported_bands) {
3186 case WMI_HOST_WLAN_2G_5G_CAP:
3187 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3188 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3189 break;
3190 case WMI_HOST_WLAN_2G_CAP:
3191 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3192 arg[i].end_freq = hal_reg_cap->high_2ghz_chan;
3193 break;
3194 case WMI_HOST_WLAN_5G_CAP:
3195 arg[i].start_freq = hal_reg_cap->low_5ghz_chan;
3196 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3197 break;
3198 default:
3199 break;
3200 }
3201 }
3202 }
3203
3204 static void
ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params * wmi_cfg,struct ath12k_wmi_resource_config_arg * tg_cfg)3205 ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params *wmi_cfg,
3206 struct ath12k_wmi_resource_config_arg *tg_cfg)
3207 {
3208 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs);
3209 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers);
3210 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers);
3211 wmi_cfg->num_offload_reorder_buffs =
3212 cpu_to_le32(tg_cfg->num_offload_reorder_buffs);
3213 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys);
3214 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids);
3215 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit);
3216 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask);
3217 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask);
3218 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]);
3219 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]);
3220 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]);
3221 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]);
3222 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode);
3223 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req);
3224 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev);
3225 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev);
3226 wmi_cfg->roam_offload_max_ap_profiles =
3227 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles);
3228 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups);
3229 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems);
3230 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode);
3231 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size);
3232 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries);
3233 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size);
3234 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim);
3235 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check =
3236 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check);
3237 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config);
3238 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev);
3239 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc);
3240 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries);
3241 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs);
3242 wmi_cfg->num_tdls_conn_table_entries =
3243 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries);
3244 wmi_cfg->beacon_tx_offload_max_vdev =
3245 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev);
3246 wmi_cfg->num_multicast_filter_entries =
3247 cpu_to_le32(tg_cfg->num_multicast_filter_entries);
3248 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters);
3249 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern);
3250 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size);
3251 wmi_cfg->max_tdls_concurrent_sleep_sta =
3252 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta);
3253 wmi_cfg->max_tdls_concurrent_buffer_sta =
3254 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta);
3255 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate);
3256 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs);
3257 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels);
3258 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules);
3259 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size);
3260 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters);
3261 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id);
3262 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config);
3263 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version);
3264 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params);
3265 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count);
3266 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count);
3267 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported <<
3268 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT);
3269 }
3270
ath12k_init_cmd_send(struct ath12k_wmi_pdev * wmi,struct ath12k_wmi_init_cmd_arg * arg)3271 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi,
3272 struct ath12k_wmi_init_cmd_arg *arg)
3273 {
3274 struct ath12k_base *ab = wmi->wmi_ab->ab;
3275 struct sk_buff *skb;
3276 struct wmi_init_cmd *cmd;
3277 struct ath12k_wmi_resource_config_params *cfg;
3278 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode;
3279 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac;
3280 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks;
3281 struct wmi_tlv *tlv;
3282 size_t ret, len;
3283 void *ptr;
3284 u32 hw_mode_len = 0;
3285 u16 idx;
3286
3287 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX)
3288 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE +
3289 (arg->num_band_to_mac * sizeof(*band_to_mac));
3290
3291 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len +
3292 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0);
3293
3294 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3295 if (!skb)
3296 return -ENOMEM;
3297
3298 cmd = (struct wmi_init_cmd *)skb->data;
3299
3300 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD,
3301 sizeof(*cmd));
3302
3303 ptr = skb->data + sizeof(*cmd);
3304 cfg = ptr;
3305
3306 ath12k_wmi_copy_resource_config(cfg, &arg->res_cfg);
3307
3308 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG,
3309 sizeof(*cfg));
3310
3311 ptr += sizeof(*cfg);
3312 host_mem_chunks = ptr + TLV_HDR_SIZE;
3313 len = sizeof(struct ath12k_wmi_host_mem_chunk_params);
3314
3315 for (idx = 0; idx < arg->num_mem_chunks; ++idx) {
3316 host_mem_chunks[idx].tlv_header =
3317 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
3318 len);
3319
3320 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr);
3321 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len);
3322 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id);
3323
3324 ath12k_dbg(ab, ATH12K_DBG_WMI,
3325 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n",
3326 arg->mem_chunks[idx].req_id,
3327 (u64)arg->mem_chunks[idx].paddr,
3328 arg->mem_chunks[idx].len);
3329 }
3330 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks);
3331 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks;
3332
3333 /* num_mem_chunks is zero */
3334 tlv = ptr;
3335 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
3336 ptr += TLV_HDR_SIZE + len;
3337
3338 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) {
3339 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr;
3340 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
3341 sizeof(*hw_mode));
3342
3343 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id);
3344 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac);
3345
3346 ptr += sizeof(*hw_mode);
3347
3348 len = arg->num_band_to_mac * sizeof(*band_to_mac);
3349 tlv = ptr;
3350 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
3351
3352 ptr += TLV_HDR_SIZE;
3353 len = sizeof(*band_to_mac);
3354
3355 for (idx = 0; idx < arg->num_band_to_mac; idx++) {
3356 band_to_mac = (void *)ptr;
3357
3358 band_to_mac->tlv_header =
3359 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC,
3360 len);
3361 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id);
3362 band_to_mac->start_freq =
3363 cpu_to_le32(arg->band_to_mac[idx].start_freq);
3364 band_to_mac->end_freq =
3365 cpu_to_le32(arg->band_to_mac[idx].end_freq);
3366 ptr += sizeof(*band_to_mac);
3367 }
3368 }
3369
3370 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID);
3371 if (ret) {
3372 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n");
3373 dev_kfree_skb(skb);
3374 }
3375
3376 return ret;
3377 }
3378
ath12k_wmi_pdev_lro_cfg(struct ath12k * ar,int pdev_id)3379 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar,
3380 int pdev_id)
3381 {
3382 struct ath12k_wmi_pdev_lro_config_cmd *cmd;
3383 struct sk_buff *skb;
3384 int ret;
3385
3386 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3387 if (!skb)
3388 return -ENOMEM;
3389
3390 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data;
3391 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD,
3392 sizeof(*cmd));
3393
3394 get_random_bytes(cmd->th_4, sizeof(cmd->th_4));
3395 get_random_bytes(cmd->th_6, sizeof(cmd->th_6));
3396
3397 cmd->pdev_id = cpu_to_le32(pdev_id);
3398
3399 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3400 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id);
3401
3402 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID);
3403 if (ret) {
3404 ath12k_warn(ar->ab,
3405 "failed to send lro cfg req wmi cmd\n");
3406 goto err;
3407 }
3408
3409 return 0;
3410 err:
3411 dev_kfree_skb(skb);
3412 return ret;
3413 }
3414
ath12k_wmi_wait_for_service_ready(struct ath12k_base * ab)3415 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab)
3416 {
3417 unsigned long time_left;
3418
3419 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready,
3420 WMI_SERVICE_READY_TIMEOUT_HZ);
3421 if (!time_left)
3422 return -ETIMEDOUT;
3423
3424 return 0;
3425 }
3426
ath12k_wmi_wait_for_unified_ready(struct ath12k_base * ab)3427 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab)
3428 {
3429 unsigned long time_left;
3430
3431 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready,
3432 WMI_SERVICE_READY_TIMEOUT_HZ);
3433 if (!time_left)
3434 return -ETIMEDOUT;
3435
3436 return 0;
3437 }
3438
ath12k_wmi_set_hw_mode(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type mode)3439 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab,
3440 enum wmi_host_hw_mode_config_type mode)
3441 {
3442 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd;
3443 struct sk_buff *skb;
3444 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3445 int len;
3446 int ret;
3447
3448 len = sizeof(*cmd);
3449
3450 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3451 if (!skb)
3452 return -ENOMEM;
3453
3454 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data;
3455
3456 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
3457 sizeof(*cmd));
3458
3459 cmd->pdev_id = WMI_PDEV_ID_SOC;
3460 cmd->hw_mode_index = cpu_to_le32(mode);
3461
3462 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID);
3463 if (ret) {
3464 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n");
3465 dev_kfree_skb(skb);
3466 }
3467
3468 return ret;
3469 }
3470
ath12k_wmi_cmd_init(struct ath12k_base * ab)3471 int ath12k_wmi_cmd_init(struct ath12k_base *ab)
3472 {
3473 struct ath12k_wmi_base *wmi_sc = &ab->wmi_ab;
3474 struct ath12k_wmi_init_cmd_arg arg = {};
3475
3476 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
3477 ab->wmi_ab.svc_map))
3478 arg.res_cfg.is_reg_cc_ext_event_supported = true;
3479
3480 ab->hw_params->wmi_init(ab, &arg.res_cfg);
3481
3482 arg.num_mem_chunks = wmi_sc->num_mem_chunks;
3483 arg.hw_mode_id = wmi_sc->preferred_hw_mode;
3484 arg.mem_chunks = wmi_sc->mem_chunks;
3485
3486 if (ab->hw_params->single_pdev_only)
3487 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX;
3488
3489 arg.num_band_to_mac = ab->num_radios;
3490 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac);
3491
3492 return ath12k_init_cmd_send(&wmi_sc->wmi[0], &arg);
3493 }
3494
ath12k_wmi_vdev_spectral_conf(struct ath12k * ar,struct ath12k_wmi_vdev_spectral_conf_arg * arg)3495 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar,
3496 struct ath12k_wmi_vdev_spectral_conf_arg *arg)
3497 {
3498 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd;
3499 struct sk_buff *skb;
3500 int ret;
3501
3502 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3503 if (!skb)
3504 return -ENOMEM;
3505
3506 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data;
3507 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
3508 sizeof(*cmd));
3509 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
3510 cmd->scan_count = cpu_to_le32(arg->scan_count);
3511 cmd->scan_period = cpu_to_le32(arg->scan_period);
3512 cmd->scan_priority = cpu_to_le32(arg->scan_priority);
3513 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size);
3514 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena);
3515 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena);
3516 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref);
3517 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay);
3518 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr);
3519 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr);
3520 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode);
3521 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode);
3522 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr);
3523 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format);
3524 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode);
3525 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale);
3526 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj);
3527 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask);
3528
3529 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3530 "WMI spectral scan config cmd vdev_id 0x%x\n",
3531 arg->vdev_id);
3532
3533 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
3534 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID);
3535 if (ret) {
3536 ath12k_warn(ar->ab,
3537 "failed to send spectral scan config wmi cmd\n");
3538 goto err;
3539 }
3540
3541 return 0;
3542 err:
3543 dev_kfree_skb(skb);
3544 return ret;
3545 }
3546
ath12k_wmi_vdev_spectral_enable(struct ath12k * ar,u32 vdev_id,u32 trigger,u32 enable)3547 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id,
3548 u32 trigger, u32 enable)
3549 {
3550 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd;
3551 struct sk_buff *skb;
3552 int ret;
3553
3554 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3555 if (!skb)
3556 return -ENOMEM;
3557
3558 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data;
3559 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
3560 sizeof(*cmd));
3561
3562 cmd->vdev_id = cpu_to_le32(vdev_id);
3563 cmd->trigger_cmd = cpu_to_le32(trigger);
3564 cmd->enable_cmd = cpu_to_le32(enable);
3565
3566 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3567 "WMI spectral enable cmd vdev id 0x%x\n",
3568 vdev_id);
3569
3570 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
3571 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID);
3572 if (ret) {
3573 ath12k_warn(ar->ab,
3574 "failed to send spectral enable wmi cmd\n");
3575 goto err;
3576 }
3577
3578 return 0;
3579 err:
3580 dev_kfree_skb(skb);
3581 return ret;
3582 }
3583
ath12k_wmi_pdev_dma_ring_cfg(struct ath12k * ar,struct ath12k_wmi_pdev_dma_ring_cfg_arg * arg)3584 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar,
3585 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg)
3586 {
3587 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd;
3588 struct sk_buff *skb;
3589 int ret;
3590
3591 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3592 if (!skb)
3593 return -ENOMEM;
3594
3595 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data;
3596 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ,
3597 sizeof(*cmd));
3598
3599 cmd->pdev_id = cpu_to_le32(DP_SW2HW_MACID(arg->pdev_id));
3600 cmd->module_id = cpu_to_le32(arg->module_id);
3601 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo);
3602 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi);
3603 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo);
3604 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi);
3605 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo);
3606 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi);
3607 cmd->num_elems = cpu_to_le32(arg->num_elems);
3608 cmd->buf_size = cpu_to_le32(arg->buf_size);
3609 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event);
3610 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms);
3611
3612 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3613 "WMI DMA ring cfg req cmd pdev_id 0x%x\n",
3614 arg->pdev_id);
3615
3616 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
3617 WMI_PDEV_DMA_RING_CFG_REQ_CMDID);
3618 if (ret) {
3619 ath12k_warn(ar->ab,
3620 "failed to send dma ring cfg req wmi cmd\n");
3621 goto err;
3622 }
3623
3624 return 0;
3625 err:
3626 dev_kfree_skb(skb);
3627 return ret;
3628 }
3629
ath12k_wmi_dma_buf_entry_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3630 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc,
3631 u16 tag, u16 len,
3632 const void *ptr, void *data)
3633 {
3634 struct ath12k_wmi_dma_buf_release_arg *arg = data;
3635
3636 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY)
3637 return -EPROTO;
3638
3639 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry))
3640 return -ENOBUFS;
3641
3642 arg->num_buf_entry++;
3643 return 0;
3644 }
3645
ath12k_wmi_dma_buf_meta_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3646 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc,
3647 u16 tag, u16 len,
3648 const void *ptr, void *data)
3649 {
3650 struct ath12k_wmi_dma_buf_release_arg *arg = data;
3651
3652 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA)
3653 return -EPROTO;
3654
3655 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry))
3656 return -ENOBUFS;
3657
3658 arg->num_meta++;
3659
3660 return 0;
3661 }
3662
ath12k_wmi_dma_buf_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)3663 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab,
3664 u16 tag, u16 len,
3665 const void *ptr, void *data)
3666 {
3667 struct ath12k_wmi_dma_buf_release_arg *arg = data;
3668 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed;
3669 u32 pdev_id;
3670 int ret;
3671
3672 switch (tag) {
3673 case WMI_TAG_DMA_BUF_RELEASE:
3674 fixed = ptr;
3675 arg->fixed = *fixed;
3676 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id));
3677 arg->fixed.pdev_id = cpu_to_le32(pdev_id);
3678 break;
3679 case WMI_TAG_ARRAY_STRUCT:
3680 if (!arg->buf_entry_done) {
3681 arg->num_buf_entry = 0;
3682 arg->buf_entry = ptr;
3683
3684 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
3685 ath12k_wmi_dma_buf_entry_parse,
3686 arg);
3687 if (ret) {
3688 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n",
3689 ret);
3690 return ret;
3691 }
3692
3693 arg->buf_entry_done = true;
3694 } else if (!arg->meta_data_done) {
3695 arg->num_meta = 0;
3696 arg->meta_data = ptr;
3697
3698 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
3699 ath12k_wmi_dma_buf_meta_parse,
3700 arg);
3701 if (ret) {
3702 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n",
3703 ret);
3704 return ret;
3705 }
3706
3707 arg->meta_data_done = true;
3708 }
3709 break;
3710 default:
3711 break;
3712 }
3713 return 0;
3714 }
3715
ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base * ab,struct sk_buff * skb)3716 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab,
3717 struct sk_buff *skb)
3718 {
3719 struct ath12k_wmi_dma_buf_release_arg arg = {};
3720 struct ath12k_dbring_buf_release_event param;
3721 int ret;
3722
3723 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
3724 ath12k_wmi_dma_buf_parse,
3725 &arg);
3726 if (ret) {
3727 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret);
3728 return;
3729 }
3730
3731 param.fixed = arg.fixed;
3732 param.buf_entry = arg.buf_entry;
3733 param.num_buf_entry = arg.num_buf_entry;
3734 param.meta_data = arg.meta_data;
3735 param.num_meta = arg.num_meta;
3736
3737 ret = ath12k_dbring_buffer_release_event(ab, ¶m);
3738 if (ret) {
3739 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret);
3740 return;
3741 }
3742 }
3743
ath12k_wmi_hw_mode_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3744 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc,
3745 u16 tag, u16 len,
3746 const void *ptr, void *data)
3747 {
3748 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3749 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
3750 u32 phy_map = 0;
3751
3752 if (tag != WMI_TAG_HW_MODE_CAPABILITIES)
3753 return -EPROTO;
3754
3755 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes)
3756 return -ENOBUFS;
3757
3758 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params,
3759 hw_mode_id);
3760 svc_rdy_ext->n_hw_mode_caps++;
3761
3762 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map);
3763 svc_rdy_ext->tot_phy_id += fls(phy_map);
3764
3765 return 0;
3766 }
3767
ath12k_wmi_hw_mode_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)3768 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc,
3769 u16 len, const void *ptr, void *data)
3770 {
3771 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3772 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
3773 enum wmi_host_hw_mode_config_type mode, pref;
3774 u32 i;
3775 int ret;
3776
3777 svc_rdy_ext->n_hw_mode_caps = 0;
3778 svc_rdy_ext->hw_mode_caps = ptr;
3779
3780 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
3781 ath12k_wmi_hw_mode_caps_parse,
3782 svc_rdy_ext);
3783 if (ret) {
3784 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
3785 return ret;
3786 }
3787
3788 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) {
3789 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i];
3790 mode = le32_to_cpu(hw_mode_caps->hw_mode_id);
3791
3792 if (mode >= WMI_HOST_HW_MODE_MAX)
3793 continue;
3794
3795 pref = soc->wmi_ab.preferred_hw_mode;
3796
3797 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) {
3798 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps;
3799 soc->wmi_ab.preferred_hw_mode = mode;
3800 }
3801 }
3802
3803 ath12k_dbg(soc, ATH12K_DBG_WMI, "preferred_hw_mode:%d\n",
3804 soc->wmi_ab.preferred_hw_mode);
3805 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX)
3806 return -EINVAL;
3807
3808 return 0;
3809 }
3810
ath12k_wmi_mac_phy_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3811 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc,
3812 u16 tag, u16 len,
3813 const void *ptr, void *data)
3814 {
3815 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3816
3817 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES)
3818 return -EPROTO;
3819
3820 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id)
3821 return -ENOBUFS;
3822
3823 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params));
3824 if (!svc_rdy_ext->n_mac_phy_caps) {
3825 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len,
3826 GFP_ATOMIC);
3827 if (!svc_rdy_ext->mac_phy_caps)
3828 return -ENOMEM;
3829 }
3830
3831 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len);
3832 svc_rdy_ext->n_mac_phy_caps++;
3833 return 0;
3834 }
3835
ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3836 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc,
3837 u16 tag, u16 len,
3838 const void *ptr, void *data)
3839 {
3840 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3841
3842 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT)
3843 return -EPROTO;
3844
3845 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy)
3846 return -ENOBUFS;
3847
3848 svc_rdy_ext->n_ext_hal_reg_caps++;
3849 return 0;
3850 }
3851
ath12k_wmi_ext_hal_reg_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)3852 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc,
3853 u16 len, const void *ptr, void *data)
3854 {
3855 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
3856 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3857 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap;
3858 int ret;
3859 u32 i;
3860
3861 svc_rdy_ext->n_ext_hal_reg_caps = 0;
3862 svc_rdy_ext->ext_hal_reg_caps = ptr;
3863 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
3864 ath12k_wmi_ext_hal_reg_caps_parse,
3865 svc_rdy_ext);
3866 if (ret) {
3867 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
3868 return ret;
3869 }
3870
3871 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) {
3872 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle,
3873 svc_rdy_ext->soc_hal_reg_caps,
3874 svc_rdy_ext->ext_hal_reg_caps, i,
3875 ®_cap);
3876 if (ret) {
3877 ath12k_warn(soc, "failed to extract reg cap %d\n", i);
3878 return ret;
3879 }
3880
3881 if (reg_cap.phy_id >= MAX_RADIOS) {
3882 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id);
3883 return -EINVAL;
3884 }
3885
3886 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap;
3887 }
3888 return 0;
3889 }
3890
ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base * soc,u16 len,const void * ptr,void * data)3891 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc,
3892 u16 len, const void *ptr,
3893 void *data)
3894 {
3895 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
3896 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3897 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id);
3898 u32 phy_id_map;
3899 int pdev_index = 0;
3900 int ret;
3901
3902 svc_rdy_ext->soc_hal_reg_caps = ptr;
3903 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy);
3904
3905 soc->num_radios = 0;
3906 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map);
3907 soc->fw_pdev_count = 0;
3908
3909 while (phy_id_map && soc->num_radios < MAX_RADIOS) {
3910 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle,
3911 svc_rdy_ext,
3912 hw_mode_id, soc->num_radios,
3913 &soc->pdevs[pdev_index]);
3914 if (ret) {
3915 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n",
3916 soc->num_radios);
3917 return ret;
3918 }
3919
3920 soc->num_radios++;
3921
3922 /* For single_pdev_only targets,
3923 * save mac_phy capability in the same pdev
3924 */
3925 if (soc->hw_params->single_pdev_only)
3926 pdev_index = 0;
3927 else
3928 pdev_index = soc->num_radios;
3929
3930 /* TODO: mac_phy_cap prints */
3931 phy_id_map >>= 1;
3932 }
3933
3934 if (soc->hw_params->single_pdev_only) {
3935 soc->num_radios = 1;
3936 soc->pdevs[0].pdev_id = 0;
3937 }
3938
3939 return 0;
3940 }
3941
ath12k_wmi_dma_ring_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3942 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc,
3943 u16 tag, u16 len,
3944 const void *ptr, void *data)
3945 {
3946 struct ath12k_wmi_dma_ring_caps_parse *parse = data;
3947
3948 if (tag != WMI_TAG_DMA_RING_CAPABILITIES)
3949 return -EPROTO;
3950
3951 parse->n_dma_ring_caps++;
3952 return 0;
3953 }
3954
ath12k_wmi_alloc_dbring_caps(struct ath12k_base * ab,u32 num_cap)3955 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab,
3956 u32 num_cap)
3957 {
3958 size_t sz;
3959 void *ptr;
3960
3961 sz = num_cap * sizeof(struct ath12k_dbring_cap);
3962 ptr = kzalloc(sz, GFP_ATOMIC);
3963 if (!ptr)
3964 return -ENOMEM;
3965
3966 ab->db_caps = ptr;
3967 ab->num_db_cap = num_cap;
3968
3969 return 0;
3970 }
3971
ath12k_wmi_free_dbring_caps(struct ath12k_base * ab)3972 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab)
3973 {
3974 kfree(ab->db_caps);
3975 ab->db_caps = NULL;
3976 }
3977
ath12k_wmi_dma_ring_caps(struct ath12k_base * ab,u16 len,const void * ptr,void * data)3978 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab,
3979 u16 len, const void *ptr, void *data)
3980 {
3981 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data;
3982 struct ath12k_wmi_dma_ring_caps_params *dma_caps;
3983 struct ath12k_dbring_cap *dir_buff_caps;
3984 int ret;
3985 u32 i;
3986
3987 dma_caps_parse->n_dma_ring_caps = 0;
3988 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr;
3989 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
3990 ath12k_wmi_dma_ring_caps_parse,
3991 dma_caps_parse);
3992 if (ret) {
3993 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret);
3994 return ret;
3995 }
3996
3997 if (!dma_caps_parse->n_dma_ring_caps)
3998 return 0;
3999
4000 if (ab->num_db_cap) {
4001 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n");
4002 return 0;
4003 }
4004
4005 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps);
4006 if (ret)
4007 return ret;
4008
4009 dir_buff_caps = ab->db_caps;
4010 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) {
4011 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) {
4012 ath12k_warn(ab, "Invalid module id %d\n",
4013 le32_to_cpu(dma_caps[i].module_id));
4014 ret = -EINVAL;
4015 goto free_dir_buff;
4016 }
4017
4018 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id);
4019 dir_buff_caps[i].pdev_id =
4020 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id));
4021 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem);
4022 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz);
4023 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align);
4024 }
4025
4026 return 0;
4027
4028 free_dir_buff:
4029 ath12k_wmi_free_dbring_caps(ab);
4030 return ret;
4031 }
4032
ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4033 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab,
4034 u16 tag, u16 len,
4035 const void *ptr, void *data)
4036 {
4037 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
4038 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4039 int ret;
4040
4041 switch (tag) {
4042 case WMI_TAG_SERVICE_READY_EXT_EVENT:
4043 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr,
4044 &svc_rdy_ext->arg);
4045 if (ret) {
4046 ath12k_warn(ab, "unable to extract ext params\n");
4047 return ret;
4048 }
4049 break;
4050
4051 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS:
4052 svc_rdy_ext->hw_caps = ptr;
4053 svc_rdy_ext->arg.num_hw_modes =
4054 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes);
4055 break;
4056
4057 case WMI_TAG_SOC_HAL_REG_CAPABILITIES:
4058 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr,
4059 svc_rdy_ext);
4060 if (ret)
4061 return ret;
4062 break;
4063
4064 case WMI_TAG_ARRAY_STRUCT:
4065 if (!svc_rdy_ext->hw_mode_done) {
4066 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext);
4067 if (ret)
4068 return ret;
4069
4070 svc_rdy_ext->hw_mode_done = true;
4071 } else if (!svc_rdy_ext->mac_phy_done) {
4072 svc_rdy_ext->n_mac_phy_caps = 0;
4073 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4074 ath12k_wmi_mac_phy_caps_parse,
4075 svc_rdy_ext);
4076 if (ret) {
4077 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4078 return ret;
4079 }
4080
4081 svc_rdy_ext->mac_phy_done = true;
4082 } else if (!svc_rdy_ext->ext_hal_reg_done) {
4083 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext);
4084 if (ret)
4085 return ret;
4086
4087 svc_rdy_ext->ext_hal_reg_done = true;
4088 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) {
4089 svc_rdy_ext->mac_phy_chainmask_combo_done = true;
4090 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) {
4091 svc_rdy_ext->mac_phy_chainmask_cap_done = true;
4092 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) {
4093 svc_rdy_ext->oem_dma_ring_cap_done = true;
4094 } else if (!svc_rdy_ext->dma_ring_cap_done) {
4095 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
4096 &svc_rdy_ext->dma_caps_parse);
4097 if (ret)
4098 return ret;
4099
4100 svc_rdy_ext->dma_ring_cap_done = true;
4101 }
4102 break;
4103
4104 default:
4105 break;
4106 }
4107 return 0;
4108 }
4109
ath12k_service_ready_ext_event(struct ath12k_base * ab,struct sk_buff * skb)4110 static int ath12k_service_ready_ext_event(struct ath12k_base *ab,
4111 struct sk_buff *skb)
4112 {
4113 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { };
4114 int ret;
4115
4116 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4117 ath12k_wmi_svc_rdy_ext_parse,
4118 &svc_rdy_ext);
4119 if (ret) {
4120 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4121 goto err;
4122 }
4123
4124 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map))
4125 complete(&ab->wmi_ab.service_ready);
4126
4127 kfree(svc_rdy_ext.mac_phy_caps);
4128 return 0;
4129
4130 err:
4131 ath12k_wmi_free_dbring_caps(ab);
4132 return ret;
4133 }
4134
ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_svc_rdy_ext2_arg * arg)4135 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle,
4136 const void *ptr,
4137 struct ath12k_wmi_svc_rdy_ext2_arg *arg)
4138 {
4139 const struct wmi_service_ready_ext2_event *ev = ptr;
4140
4141 if (!ev)
4142 return -EINVAL;
4143
4144 arg->reg_db_version = le32_to_cpu(ev->reg_db_version);
4145 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz);
4146 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz);
4147 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps);
4148 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw);
4149 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma);
4150 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo);
4151 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags);
4152 return 0;
4153 }
4154
ath12k_wmi_eht_caps_parse(struct ath12k_pdev * pdev,u32 band,const __le32 cap_mac_info[],const __le32 cap_phy_info[],const __le32 supp_mcs[],const struct ath12k_wmi_ppe_threshold_params * ppet,__le32 cap_info_internal)4155 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band,
4156 const __le32 cap_mac_info[],
4157 const __le32 cap_phy_info[],
4158 const __le32 supp_mcs[],
4159 const struct ath12k_wmi_ppe_threshold_params *ppet,
4160 __le32 cap_info_internal)
4161 {
4162 struct ath12k_band_cap *cap_band = &pdev->cap.band[band];
4163 u8 i;
4164
4165 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++)
4166 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]);
4167
4168 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++)
4169 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]);
4170
4171 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]);
4172 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]);
4173 if (band != NL80211_BAND_2GHZ) {
4174 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]);
4175 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]);
4176 }
4177
4178 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1);
4179 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info);
4180 for (i = 0; i < WMI_MAX_NUM_SS; i++)
4181 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] =
4182 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]);
4183
4184 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal);
4185 }
4186
4187 static int
ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base * ab,const struct ath12k_wmi_caps_ext_params * caps,struct ath12k_pdev * pdev)4188 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab,
4189 const struct ath12k_wmi_caps_ext_params *caps,
4190 struct ath12k_pdev *pdev)
4191 {
4192 u32 bands;
4193 int i;
4194
4195 if (ab->hw_params->single_pdev_only) {
4196 for (i = 0; i < ab->fw_pdev_count; i++) {
4197 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i];
4198
4199 if (fw_pdev->pdev_id == le32_to_cpu(caps->pdev_id) &&
4200 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) {
4201 bands = fw_pdev->supported_bands;
4202 break;
4203 }
4204 }
4205
4206 if (i == ab->fw_pdev_count)
4207 return -EINVAL;
4208 } else {
4209 bands = pdev->cap.supported_bands;
4210 }
4211
4212 if (bands & WMI_HOST_WLAN_2G_CAP) {
4213 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ,
4214 caps->eht_cap_mac_info_2ghz,
4215 caps->eht_cap_phy_info_2ghz,
4216 caps->eht_supp_mcs_ext_2ghz,
4217 &caps->eht_ppet_2ghz,
4218 caps->eht_cap_info_internal);
4219 }
4220
4221 if (bands & WMI_HOST_WLAN_5G_CAP) {
4222 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ,
4223 caps->eht_cap_mac_info_5ghz,
4224 caps->eht_cap_phy_info_5ghz,
4225 caps->eht_supp_mcs_ext_5ghz,
4226 &caps->eht_ppet_5ghz,
4227 caps->eht_cap_info_internal);
4228
4229 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ,
4230 caps->eht_cap_mac_info_5ghz,
4231 caps->eht_cap_phy_info_5ghz,
4232 caps->eht_supp_mcs_ext_5ghz,
4233 &caps->eht_ppet_5ghz,
4234 caps->eht_cap_info_internal);
4235 }
4236
4237 return 0;
4238 }
4239
ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4240 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag,
4241 u16 len, const void *ptr,
4242 void *data)
4243 {
4244 const struct ath12k_wmi_caps_ext_params *caps = ptr;
4245 int i = 0, ret;
4246
4247 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT)
4248 return -EPROTO;
4249
4250 if (ab->hw_params->single_pdev_only) {
4251 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id))
4252 return 0;
4253 } else {
4254 for (i = 0; i < ab->num_radios; i++) {
4255 if (ab->pdevs[i].pdev_id == le32_to_cpu(caps->pdev_id))
4256 break;
4257 }
4258
4259 if (i == ab->num_radios)
4260 return -EINVAL;
4261 }
4262
4263 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]);
4264 if (ret) {
4265 ath12k_warn(ab,
4266 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n",
4267 ret, ab->pdevs[i].pdev_id);
4268 return ret;
4269 }
4270
4271 return 0;
4272 }
4273
ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4274 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab,
4275 u16 tag, u16 len,
4276 const void *ptr, void *data)
4277 {
4278 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
4279 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data;
4280 int ret;
4281
4282 switch (tag) {
4283 case WMI_TAG_SERVICE_READY_EXT2_EVENT:
4284 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr,
4285 &parse->arg);
4286 if (ret) {
4287 ath12k_warn(ab,
4288 "failed to extract wmi service ready ext2 parameters: %d\n",
4289 ret);
4290 return ret;
4291 }
4292 break;
4293
4294 case WMI_TAG_ARRAY_STRUCT:
4295 if (!parse->dma_ring_cap_done) {
4296 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
4297 &parse->dma_caps_parse);
4298 if (ret)
4299 return ret;
4300
4301 parse->dma_ring_cap_done = true;
4302 } else if (!parse->spectral_bin_scaling_done) {
4303 /* TODO: This is a place-holder as WMI tag for
4304 * spectral scaling is before
4305 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT
4306 */
4307 parse->spectral_bin_scaling_done = true;
4308 } else if (!parse->mac_phy_caps_ext_done) {
4309 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4310 ath12k_wmi_tlv_mac_phy_caps_ext,
4311 parse);
4312 if (ret) {
4313 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n",
4314 ret);
4315 return ret;
4316 }
4317
4318 parse->mac_phy_caps_ext_done = true;
4319 }
4320 break;
4321 default:
4322 break;
4323 }
4324
4325 return 0;
4326 }
4327
ath12k_service_ready_ext2_event(struct ath12k_base * ab,struct sk_buff * skb)4328 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab,
4329 struct sk_buff *skb)
4330 {
4331 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { };
4332 int ret;
4333
4334 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4335 ath12k_wmi_svc_rdy_ext2_parse,
4336 &svc_rdy_ext2);
4337 if (ret) {
4338 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret);
4339 goto err;
4340 }
4341
4342 complete(&ab->wmi_ab.service_ready);
4343
4344 return 0;
4345
4346 err:
4347 ath12k_wmi_free_dbring_caps(ab);
4348 return ret;
4349 }
4350
ath12k_pull_vdev_start_resp_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_start_resp_event * vdev_rsp)4351 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb,
4352 struct wmi_vdev_start_resp_event *vdev_rsp)
4353 {
4354 const void **tb;
4355 const struct wmi_vdev_start_resp_event *ev;
4356 int ret;
4357
4358 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4359 if (IS_ERR(tb)) {
4360 ret = PTR_ERR(tb);
4361 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4362 return ret;
4363 }
4364
4365 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT];
4366 if (!ev) {
4367 ath12k_warn(ab, "failed to fetch vdev start resp ev");
4368 kfree(tb);
4369 return -EPROTO;
4370 }
4371
4372 *vdev_rsp = *ev;
4373
4374 kfree(tb);
4375 return 0;
4376 }
4377
4378 static struct ath12k_reg_rule
create_ext_reg_rules_from_wmi(u32 num_reg_rules,struct ath12k_wmi_reg_rule_ext_params * wmi_reg_rule)4379 *create_ext_reg_rules_from_wmi(u32 num_reg_rules,
4380 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule)
4381 {
4382 struct ath12k_reg_rule *reg_rule_ptr;
4383 u32 count;
4384
4385 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)),
4386 GFP_ATOMIC);
4387
4388 if (!reg_rule_ptr)
4389 return NULL;
4390
4391 for (count = 0; count < num_reg_rules; count++) {
4392 reg_rule_ptr[count].start_freq =
4393 le32_get_bits(wmi_reg_rule[count].freq_info,
4394 REG_RULE_START_FREQ);
4395 reg_rule_ptr[count].end_freq =
4396 le32_get_bits(wmi_reg_rule[count].freq_info,
4397 REG_RULE_END_FREQ);
4398 reg_rule_ptr[count].max_bw =
4399 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4400 REG_RULE_MAX_BW);
4401 reg_rule_ptr[count].reg_power =
4402 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4403 REG_RULE_REG_PWR);
4404 reg_rule_ptr[count].ant_gain =
4405 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4406 REG_RULE_ANT_GAIN);
4407 reg_rule_ptr[count].flags =
4408 le32_get_bits(wmi_reg_rule[count].flag_info,
4409 REG_RULE_FLAGS);
4410 reg_rule_ptr[count].psd_flag =
4411 le32_get_bits(wmi_reg_rule[count].psd_power_info,
4412 REG_RULE_PSD_INFO);
4413 reg_rule_ptr[count].psd_eirp =
4414 le32_get_bits(wmi_reg_rule[count].psd_power_info,
4415 REG_RULE_PSD_EIRP);
4416 }
4417
4418 return reg_rule_ptr;
4419 }
4420
ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params * rule,u32 num_reg_rules)4421 static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule,
4422 u32 num_reg_rules)
4423 {
4424 u8 num_invalid_5ghz_rules = 0;
4425 u32 count, start_freq;
4426
4427 for (count = 0; count < num_reg_rules; count++) {
4428 start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ);
4429
4430 if (start_freq >= ATH12K_MIN_6G_FREQ)
4431 num_invalid_5ghz_rules++;
4432 }
4433
4434 return num_invalid_5ghz_rules;
4435 }
4436
ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_reg_info * reg_info)4437 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab,
4438 struct sk_buff *skb,
4439 struct ath12k_reg_info *reg_info)
4440 {
4441 const void **tb;
4442 const struct wmi_reg_chan_list_cc_ext_event *ev;
4443 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule;
4444 u32 num_2g_reg_rules, num_5g_reg_rules;
4445 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4446 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4447 u8 num_invalid_5ghz_ext_rules;
4448 u32 total_reg_rules = 0;
4449 int ret, i, j;
4450
4451 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n");
4452
4453 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4454 if (IS_ERR(tb)) {
4455 ret = PTR_ERR(tb);
4456 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4457 return ret;
4458 }
4459
4460 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
4461 if (!ev) {
4462 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n");
4463 kfree(tb);
4464 return -EPROTO;
4465 }
4466
4467 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules);
4468 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules);
4469 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] =
4470 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi);
4471 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] =
4472 le32_to_cpu(ev->num_6g_reg_rules_ap_sp);
4473 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] =
4474 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp);
4475
4476 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4477 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
4478 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]);
4479 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
4480 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]);
4481 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
4482 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]);
4483 }
4484
4485 num_2g_reg_rules = reg_info->num_2g_reg_rules;
4486 total_reg_rules += num_2g_reg_rules;
4487 num_5g_reg_rules = reg_info->num_5g_reg_rules;
4488 total_reg_rules += num_5g_reg_rules;
4489
4490 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) {
4491 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n",
4492 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES);
4493 kfree(tb);
4494 return -EINVAL;
4495 }
4496
4497 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
4498 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i];
4499
4500 if (num_6g_reg_rules_ap[i] > MAX_6G_REG_RULES) {
4501 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n",
4502 i, num_6g_reg_rules_ap[i], MAX_6G_REG_RULES);
4503 kfree(tb);
4504 return -EINVAL;
4505 }
4506
4507 total_reg_rules += num_6g_reg_rules_ap[i];
4508 }
4509
4510 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4511 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
4512 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
4513 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
4514
4515 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
4516 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
4517 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
4518
4519 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
4520 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
4521 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
4522
4523 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6G_REG_RULES ||
4524 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6G_REG_RULES ||
4525 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6G_REG_RULES) {
4526 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n",
4527 i);
4528 kfree(tb);
4529 return -EINVAL;
4530 }
4531 }
4532
4533 if (!total_reg_rules) {
4534 ath12k_warn(ab, "No reg rules available\n");
4535 kfree(tb);
4536 return -EINVAL;
4537 }
4538
4539 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
4540
4541 reg_info->dfs_region = le32_to_cpu(ev->dfs_region);
4542 reg_info->phybitmap = le32_to_cpu(ev->phybitmap);
4543 reg_info->num_phy = le32_to_cpu(ev->num_phy);
4544 reg_info->phy_id = le32_to_cpu(ev->phy_id);
4545 reg_info->ctry_code = le32_to_cpu(ev->country_id);
4546 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code);
4547
4548 switch (le32_to_cpu(ev->status_code)) {
4549 case WMI_REG_SET_CC_STATUS_PASS:
4550 reg_info->status_code = REG_SET_CC_STATUS_PASS;
4551 break;
4552 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
4553 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND;
4554 break;
4555 case WMI_REG_INIT_ALPHA2_NOT_FOUND:
4556 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND;
4557 break;
4558 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
4559 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED;
4560 break;
4561 case WMI_REG_SET_CC_STATUS_NO_MEMORY:
4562 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY;
4563 break;
4564 case WMI_REG_SET_CC_STATUS_FAIL:
4565 reg_info->status_code = REG_SET_CC_STATUS_FAIL;
4566 break;
4567 }
4568
4569 reg_info->is_ext_reg_event = true;
4570
4571 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g);
4572 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g);
4573 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g);
4574 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g);
4575 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi);
4576 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi);
4577 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp);
4578 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp);
4579 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp);
4580 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp);
4581
4582 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4583 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] =
4584 le32_to_cpu(ev->min_bw_6g_client_lpi[i]);
4585 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] =
4586 le32_to_cpu(ev->max_bw_6g_client_lpi[i]);
4587 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
4588 le32_to_cpu(ev->min_bw_6g_client_sp[i]);
4589 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
4590 le32_to_cpu(ev->max_bw_6g_client_sp[i]);
4591 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] =
4592 le32_to_cpu(ev->min_bw_6g_client_vlp[i]);
4593 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] =
4594 le32_to_cpu(ev->max_bw_6g_client_vlp[i]);
4595 }
4596
4597 ath12k_dbg(ab, ATH12K_DBG_WMI,
4598 "%s:cc_ext %s dsf %d BW: min_2g %d max_2g %d min_5g %d max_5g %d",
4599 __func__, reg_info->alpha2, reg_info->dfs_region,
4600 reg_info->min_bw_2g, reg_info->max_bw_2g,
4601 reg_info->min_bw_5g, reg_info->max_bw_5g);
4602
4603 ath12k_dbg(ab, ATH12K_DBG_WMI,
4604 "num_2g_reg_rules %d num_5g_reg_rules %d",
4605 num_2g_reg_rules, num_5g_reg_rules);
4606
4607 ath12k_dbg(ab, ATH12K_DBG_WMI,
4608 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d",
4609 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP],
4610 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP],
4611 num_6g_reg_rules_ap[WMI_REG_VLP_AP]);
4612
4613 ath12k_dbg(ab, ATH12K_DBG_WMI,
4614 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
4615 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT],
4616 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT],
4617 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]);
4618
4619 ath12k_dbg(ab, ATH12K_DBG_WMI,
4620 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
4621 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT],
4622 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT],
4623 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]);
4624
4625 ext_wmi_reg_rule =
4626 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev
4627 + sizeof(*ev)
4628 + sizeof(struct wmi_tlv));
4629
4630 if (num_2g_reg_rules) {
4631 reg_info->reg_rules_2g_ptr =
4632 create_ext_reg_rules_from_wmi(num_2g_reg_rules,
4633 ext_wmi_reg_rule);
4634
4635 if (!reg_info->reg_rules_2g_ptr) {
4636 kfree(tb);
4637 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n");
4638 return -ENOMEM;
4639 }
4640 }
4641
4642 ext_wmi_reg_rule += num_2g_reg_rules;
4643
4644 /* Firmware might include 6 GHz reg rule in 5 GHz rule list
4645 * for few countries along with separate 6 GHz rule.
4646 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list
4647 * causes intersect check to be true, and same rules will be
4648 * shown multiple times in iw cmd.
4649 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list
4650 */
4651 num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule,
4652 num_5g_reg_rules);
4653
4654 if (num_invalid_5ghz_ext_rules) {
4655 ath12k_dbg(ab, ATH12K_DBG_WMI,
4656 "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules",
4657 reg_info->alpha2, reg_info->num_5g_reg_rules,
4658 num_invalid_5ghz_ext_rules);
4659
4660 num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules;
4661 reg_info->num_5g_reg_rules = num_5g_reg_rules;
4662 }
4663
4664 if (num_5g_reg_rules) {
4665 reg_info->reg_rules_5g_ptr =
4666 create_ext_reg_rules_from_wmi(num_5g_reg_rules,
4667 ext_wmi_reg_rule);
4668
4669 if (!reg_info->reg_rules_5g_ptr) {
4670 kfree(tb);
4671 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n");
4672 return -ENOMEM;
4673 }
4674 }
4675
4676 /* We have adjusted the number of 5 GHz reg rules above. But still those
4677 * many rules needs to be adjusted in ext_wmi_reg_rule.
4678 *
4679 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases.
4680 */
4681 ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules);
4682
4683 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
4684 reg_info->reg_rules_6g_ap_ptr[i] =
4685 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i],
4686 ext_wmi_reg_rule);
4687
4688 if (!reg_info->reg_rules_6g_ap_ptr[i]) {
4689 kfree(tb);
4690 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n");
4691 return -ENOMEM;
4692 }
4693
4694 ext_wmi_reg_rule += num_6g_reg_rules_ap[i];
4695 }
4696
4697 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
4698 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4699 reg_info->reg_rules_6g_client_ptr[j][i] =
4700 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i],
4701 ext_wmi_reg_rule);
4702
4703 if (!reg_info->reg_rules_6g_client_ptr[j][i]) {
4704 kfree(tb);
4705 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n");
4706 return -ENOMEM;
4707 }
4708
4709 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i];
4710 }
4711 }
4712
4713 reg_info->client_type = le32_to_cpu(ev->client_type);
4714 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable;
4715 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable;
4716 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] =
4717 le32_to_cpu(ev->domain_code_6g_ap_lpi);
4718 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] =
4719 le32_to_cpu(ev->domain_code_6g_ap_sp);
4720 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] =
4721 le32_to_cpu(ev->domain_code_6g_ap_vlp);
4722
4723 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4724 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] =
4725 le32_to_cpu(ev->domain_code_6g_client_lpi[i]);
4726 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] =
4727 le32_to_cpu(ev->domain_code_6g_client_sp[i]);
4728 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] =
4729 le32_to_cpu(ev->domain_code_6g_client_vlp[i]);
4730 }
4731
4732 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id);
4733
4734 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d",
4735 reg_info->client_type, reg_info->domain_code_6g_super_id);
4736
4737 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n");
4738
4739 kfree(tb);
4740 return 0;
4741 }
4742
ath12k_pull_peer_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_delete_resp_event * peer_del_resp)4743 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb,
4744 struct wmi_peer_delete_resp_event *peer_del_resp)
4745 {
4746 const void **tb;
4747 const struct wmi_peer_delete_resp_event *ev;
4748 int ret;
4749
4750 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4751 if (IS_ERR(tb)) {
4752 ret = PTR_ERR(tb);
4753 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4754 return ret;
4755 }
4756
4757 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT];
4758 if (!ev) {
4759 ath12k_warn(ab, "failed to fetch peer delete resp ev");
4760 kfree(tb);
4761 return -EPROTO;
4762 }
4763
4764 memset(peer_del_resp, 0, sizeof(*peer_del_resp));
4765
4766 peer_del_resp->vdev_id = ev->vdev_id;
4767 ether_addr_copy(peer_del_resp->peer_macaddr.addr,
4768 ev->peer_macaddr.addr);
4769
4770 kfree(tb);
4771 return 0;
4772 }
4773
ath12k_pull_vdev_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)4774 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab,
4775 struct sk_buff *skb,
4776 u32 *vdev_id)
4777 {
4778 const void **tb;
4779 const struct wmi_vdev_delete_resp_event *ev;
4780 int ret;
4781
4782 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4783 if (IS_ERR(tb)) {
4784 ret = PTR_ERR(tb);
4785 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4786 return ret;
4787 }
4788
4789 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT];
4790 if (!ev) {
4791 ath12k_warn(ab, "failed to fetch vdev delete resp ev");
4792 kfree(tb);
4793 return -EPROTO;
4794 }
4795
4796 *vdev_id = le32_to_cpu(ev->vdev_id);
4797
4798 kfree(tb);
4799 return 0;
4800 }
4801
ath12k_pull_bcn_tx_status_ev(struct ath12k_base * ab,void * evt_buf,u32 len,u32 * vdev_id,u32 * tx_status)4802 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab, void *evt_buf,
4803 u32 len, u32 *vdev_id,
4804 u32 *tx_status)
4805 {
4806 const void **tb;
4807 const struct wmi_bcn_tx_status_event *ev;
4808 int ret;
4809
4810 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC);
4811 if (IS_ERR(tb)) {
4812 ret = PTR_ERR(tb);
4813 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4814 return ret;
4815 }
4816
4817 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT];
4818 if (!ev) {
4819 ath12k_warn(ab, "failed to fetch bcn tx status ev");
4820 kfree(tb);
4821 return -EPROTO;
4822 }
4823
4824 *vdev_id = le32_to_cpu(ev->vdev_id);
4825 *tx_status = le32_to_cpu(ev->tx_status);
4826
4827 kfree(tb);
4828 return 0;
4829 }
4830
ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)4831 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb,
4832 u32 *vdev_id)
4833 {
4834 const void **tb;
4835 const struct wmi_vdev_stopped_event *ev;
4836 int ret;
4837
4838 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4839 if (IS_ERR(tb)) {
4840 ret = PTR_ERR(tb);
4841 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4842 return ret;
4843 }
4844
4845 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT];
4846 if (!ev) {
4847 ath12k_warn(ab, "failed to fetch vdev stop ev");
4848 kfree(tb);
4849 return -EPROTO;
4850 }
4851
4852 *vdev_id = le32_to_cpu(ev->vdev_id);
4853
4854 kfree(tb);
4855 return 0;
4856 }
4857
ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4858 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab,
4859 u16 tag, u16 len,
4860 const void *ptr, void *data)
4861 {
4862 struct wmi_tlv_mgmt_rx_parse *parse = data;
4863
4864 switch (tag) {
4865 case WMI_TAG_MGMT_RX_HDR:
4866 parse->fixed = ptr;
4867 break;
4868 case WMI_TAG_ARRAY_BYTE:
4869 if (!parse->frame_buf_done) {
4870 parse->frame_buf = ptr;
4871 parse->frame_buf_done = true;
4872 }
4873 break;
4874 }
4875 return 0;
4876 }
4877
ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_wmi_mgmt_rx_arg * hdr)4878 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab,
4879 struct sk_buff *skb,
4880 struct ath12k_wmi_mgmt_rx_arg *hdr)
4881 {
4882 struct wmi_tlv_mgmt_rx_parse parse = { };
4883 const struct ath12k_wmi_mgmt_rx_params *ev;
4884 const u8 *frame;
4885 int i, ret;
4886
4887 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4888 ath12k_wmi_tlv_mgmt_rx_parse,
4889 &parse);
4890 if (ret) {
4891 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret);
4892 return ret;
4893 }
4894
4895 ev = parse.fixed;
4896 frame = parse.frame_buf;
4897
4898 if (!ev || !frame) {
4899 ath12k_warn(ab, "failed to fetch mgmt rx hdr");
4900 return -EPROTO;
4901 }
4902
4903 hdr->pdev_id = le32_to_cpu(ev->pdev_id);
4904 hdr->chan_freq = le32_to_cpu(ev->chan_freq);
4905 hdr->channel = le32_to_cpu(ev->channel);
4906 hdr->snr = le32_to_cpu(ev->snr);
4907 hdr->rate = le32_to_cpu(ev->rate);
4908 hdr->phy_mode = le32_to_cpu(ev->phy_mode);
4909 hdr->buf_len = le32_to_cpu(ev->buf_len);
4910 hdr->status = le32_to_cpu(ev->status);
4911 hdr->flags = le32_to_cpu(ev->flags);
4912 hdr->rssi = a_sle32_to_cpu(ev->rssi);
4913 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta);
4914
4915 for (i = 0; i < ATH_MAX_ANTENNA; i++)
4916 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]);
4917
4918 if (skb->len < (frame - skb->data) + hdr->buf_len) {
4919 ath12k_warn(ab, "invalid length in mgmt rx hdr ev");
4920 return -EPROTO;
4921 }
4922
4923 /* shift the sk_buff to point to `frame` */
4924 skb_trim(skb, 0);
4925 skb_put(skb, frame - skb->data);
4926 skb_pull(skb, frame - skb->data);
4927 skb_put(skb, hdr->buf_len);
4928
4929 return 0;
4930 }
4931
wmi_process_mgmt_tx_comp(struct ath12k * ar,u32 desc_id,u32 status)4932 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id,
4933 u32 status)
4934 {
4935 struct sk_buff *msdu;
4936 struct ieee80211_tx_info *info;
4937 struct ath12k_skb_cb *skb_cb;
4938 int num_mgmt;
4939
4940 spin_lock_bh(&ar->txmgmt_idr_lock);
4941 msdu = idr_find(&ar->txmgmt_idr, desc_id);
4942
4943 if (!msdu) {
4944 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n",
4945 desc_id);
4946 spin_unlock_bh(&ar->txmgmt_idr_lock);
4947 return -ENOENT;
4948 }
4949
4950 idr_remove(&ar->txmgmt_idr, desc_id);
4951 spin_unlock_bh(&ar->txmgmt_idr_lock);
4952
4953 skb_cb = ATH12K_SKB_CB(msdu);
4954 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
4955
4956 info = IEEE80211_SKB_CB(msdu);
4957 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status)
4958 info->flags |= IEEE80211_TX_STAT_ACK;
4959
4960 ieee80211_tx_status_irqsafe(ar->hw, msdu);
4961
4962 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx);
4963
4964 /* WARN when we received this event without doing any mgmt tx */
4965 if (num_mgmt < 0)
4966 WARN_ON_ONCE(1);
4967
4968 if (!num_mgmt)
4969 wake_up(&ar->txmgmt_empty_waitq);
4970
4971 return 0;
4972 }
4973
ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_mgmt_tx_compl_event * param)4974 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab,
4975 struct sk_buff *skb,
4976 struct wmi_mgmt_tx_compl_event *param)
4977 {
4978 const void **tb;
4979 const struct wmi_mgmt_tx_compl_event *ev;
4980 int ret;
4981
4982 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4983 if (IS_ERR(tb)) {
4984 ret = PTR_ERR(tb);
4985 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4986 return ret;
4987 }
4988
4989 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT];
4990 if (!ev) {
4991 ath12k_warn(ab, "failed to fetch mgmt tx compl ev");
4992 kfree(tb);
4993 return -EPROTO;
4994 }
4995
4996 param->pdev_id = ev->pdev_id;
4997 param->desc_id = ev->desc_id;
4998 param->status = ev->status;
4999
5000 kfree(tb);
5001 return 0;
5002 }
5003
ath12k_wmi_event_scan_started(struct ath12k * ar)5004 static void ath12k_wmi_event_scan_started(struct ath12k *ar)
5005 {
5006 lockdep_assert_held(&ar->data_lock);
5007
5008 switch (ar->scan.state) {
5009 case ATH12K_SCAN_IDLE:
5010 case ATH12K_SCAN_RUNNING:
5011 case ATH12K_SCAN_ABORTING:
5012 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n",
5013 ath12k_scan_state_str(ar->scan.state),
5014 ar->scan.state);
5015 break;
5016 case ATH12K_SCAN_STARTING:
5017 ar->scan.state = ATH12K_SCAN_RUNNING;
5018 complete(&ar->scan.started);
5019 break;
5020 }
5021 }
5022
ath12k_wmi_event_scan_start_failed(struct ath12k * ar)5023 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar)
5024 {
5025 lockdep_assert_held(&ar->data_lock);
5026
5027 switch (ar->scan.state) {
5028 case ATH12K_SCAN_IDLE:
5029 case ATH12K_SCAN_RUNNING:
5030 case ATH12K_SCAN_ABORTING:
5031 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n",
5032 ath12k_scan_state_str(ar->scan.state),
5033 ar->scan.state);
5034 break;
5035 case ATH12K_SCAN_STARTING:
5036 complete(&ar->scan.started);
5037 __ath12k_mac_scan_finish(ar);
5038 break;
5039 }
5040 }
5041
ath12k_wmi_event_scan_completed(struct ath12k * ar)5042 static void ath12k_wmi_event_scan_completed(struct ath12k *ar)
5043 {
5044 lockdep_assert_held(&ar->data_lock);
5045
5046 switch (ar->scan.state) {
5047 case ATH12K_SCAN_IDLE:
5048 case ATH12K_SCAN_STARTING:
5049 /* One suspected reason scan can be completed while starting is
5050 * if firmware fails to deliver all scan events to the host,
5051 * e.g. when transport pipe is full. This has been observed
5052 * with spectral scan phyerr events starving wmi transport
5053 * pipe. In such case the "scan completed" event should be (and
5054 * is) ignored by the host as it may be just firmware's scan
5055 * state machine recovering.
5056 */
5057 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n",
5058 ath12k_scan_state_str(ar->scan.state),
5059 ar->scan.state);
5060 break;
5061 case ATH12K_SCAN_RUNNING:
5062 case ATH12K_SCAN_ABORTING:
5063 __ath12k_mac_scan_finish(ar);
5064 break;
5065 }
5066 }
5067
ath12k_wmi_event_scan_bss_chan(struct ath12k * ar)5068 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar)
5069 {
5070 lockdep_assert_held(&ar->data_lock);
5071
5072 switch (ar->scan.state) {
5073 case ATH12K_SCAN_IDLE:
5074 case ATH12K_SCAN_STARTING:
5075 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5076 ath12k_scan_state_str(ar->scan.state),
5077 ar->scan.state);
5078 break;
5079 case ATH12K_SCAN_RUNNING:
5080 case ATH12K_SCAN_ABORTING:
5081 ar->scan_channel = NULL;
5082 break;
5083 }
5084 }
5085
ath12k_wmi_event_scan_foreign_chan(struct ath12k * ar,u32 freq)5086 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq)
5087 {
5088 lockdep_assert_held(&ar->data_lock);
5089
5090 switch (ar->scan.state) {
5091 case ATH12K_SCAN_IDLE:
5092 case ATH12K_SCAN_STARTING:
5093 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5094 ath12k_scan_state_str(ar->scan.state),
5095 ar->scan.state);
5096 break;
5097 case ATH12K_SCAN_RUNNING:
5098 case ATH12K_SCAN_ABORTING:
5099 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
5100 break;
5101 }
5102 }
5103
5104 static const char *
ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)5105 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
5106 enum wmi_scan_completion_reason reason)
5107 {
5108 switch (type) {
5109 case WMI_SCAN_EVENT_STARTED:
5110 return "started";
5111 case WMI_SCAN_EVENT_COMPLETED:
5112 switch (reason) {
5113 case WMI_SCAN_REASON_COMPLETED:
5114 return "completed";
5115 case WMI_SCAN_REASON_CANCELLED:
5116 return "completed [cancelled]";
5117 case WMI_SCAN_REASON_PREEMPTED:
5118 return "completed [preempted]";
5119 case WMI_SCAN_REASON_TIMEDOUT:
5120 return "completed [timedout]";
5121 case WMI_SCAN_REASON_INTERNAL_FAILURE:
5122 return "completed [internal err]";
5123 case WMI_SCAN_REASON_MAX:
5124 break;
5125 }
5126 return "completed [unknown]";
5127 case WMI_SCAN_EVENT_BSS_CHANNEL:
5128 return "bss channel";
5129 case WMI_SCAN_EVENT_FOREIGN_CHAN:
5130 return "foreign channel";
5131 case WMI_SCAN_EVENT_DEQUEUED:
5132 return "dequeued";
5133 case WMI_SCAN_EVENT_PREEMPTED:
5134 return "preempted";
5135 case WMI_SCAN_EVENT_START_FAILED:
5136 return "start failed";
5137 case WMI_SCAN_EVENT_RESTARTED:
5138 return "restarted";
5139 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
5140 return "foreign channel exit";
5141 default:
5142 return "unknown";
5143 }
5144 }
5145
ath12k_pull_scan_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_scan_event * scan_evt_param)5146 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb,
5147 struct wmi_scan_event *scan_evt_param)
5148 {
5149 const void **tb;
5150 const struct wmi_scan_event *ev;
5151 int ret;
5152
5153 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5154 if (IS_ERR(tb)) {
5155 ret = PTR_ERR(tb);
5156 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5157 return ret;
5158 }
5159
5160 ev = tb[WMI_TAG_SCAN_EVENT];
5161 if (!ev) {
5162 ath12k_warn(ab, "failed to fetch scan ev");
5163 kfree(tb);
5164 return -EPROTO;
5165 }
5166
5167 scan_evt_param->event_type = ev->event_type;
5168 scan_evt_param->reason = ev->reason;
5169 scan_evt_param->channel_freq = ev->channel_freq;
5170 scan_evt_param->scan_req_id = ev->scan_req_id;
5171 scan_evt_param->scan_id = ev->scan_id;
5172 scan_evt_param->vdev_id = ev->vdev_id;
5173 scan_evt_param->tsf_timestamp = ev->tsf_timestamp;
5174
5175 kfree(tb);
5176 return 0;
5177 }
5178
ath12k_pull_peer_sta_kickout_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_sta_kickout_arg * arg)5179 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb,
5180 struct wmi_peer_sta_kickout_arg *arg)
5181 {
5182 const void **tb;
5183 const struct wmi_peer_sta_kickout_event *ev;
5184 int ret;
5185
5186 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5187 if (IS_ERR(tb)) {
5188 ret = PTR_ERR(tb);
5189 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5190 return ret;
5191 }
5192
5193 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT];
5194 if (!ev) {
5195 ath12k_warn(ab, "failed to fetch peer sta kickout ev");
5196 kfree(tb);
5197 return -EPROTO;
5198 }
5199
5200 arg->mac_addr = ev->peer_macaddr.addr;
5201
5202 kfree(tb);
5203 return 0;
5204 }
5205
ath12k_pull_roam_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_roam_event * roam_ev)5206 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb,
5207 struct wmi_roam_event *roam_ev)
5208 {
5209 const void **tb;
5210 const struct wmi_roam_event *ev;
5211 int ret;
5212
5213 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5214 if (IS_ERR(tb)) {
5215 ret = PTR_ERR(tb);
5216 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5217 return ret;
5218 }
5219
5220 ev = tb[WMI_TAG_ROAM_EVENT];
5221 if (!ev) {
5222 ath12k_warn(ab, "failed to fetch roam ev");
5223 kfree(tb);
5224 return -EPROTO;
5225 }
5226
5227 roam_ev->vdev_id = ev->vdev_id;
5228 roam_ev->reason = ev->reason;
5229 roam_ev->rssi = ev->rssi;
5230
5231 kfree(tb);
5232 return 0;
5233 }
5234
freq_to_idx(struct ath12k * ar,int freq)5235 static int freq_to_idx(struct ath12k *ar, int freq)
5236 {
5237 struct ieee80211_supported_band *sband;
5238 int band, ch, idx = 0;
5239
5240 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
5241 if (!ar->mac.sbands[band].channels)
5242 continue;
5243
5244 sband = ar->hw->wiphy->bands[band];
5245 if (!sband)
5246 continue;
5247
5248 for (ch = 0; ch < sband->n_channels; ch++, idx++)
5249 if (sband->channels[ch].center_freq == freq)
5250 goto exit;
5251 }
5252
5253 exit:
5254 return idx;
5255 }
5256
ath12k_pull_chan_info_ev(struct ath12k_base * ab,u8 * evt_buf,u32 len,struct wmi_chan_info_event * ch_info_ev)5257 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, u8 *evt_buf,
5258 u32 len, struct wmi_chan_info_event *ch_info_ev)
5259 {
5260 const void **tb;
5261 const struct wmi_chan_info_event *ev;
5262 int ret;
5263
5264 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC);
5265 if (IS_ERR(tb)) {
5266 ret = PTR_ERR(tb);
5267 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5268 return ret;
5269 }
5270
5271 ev = tb[WMI_TAG_CHAN_INFO_EVENT];
5272 if (!ev) {
5273 ath12k_warn(ab, "failed to fetch chan info ev");
5274 kfree(tb);
5275 return -EPROTO;
5276 }
5277
5278 ch_info_ev->err_code = ev->err_code;
5279 ch_info_ev->freq = ev->freq;
5280 ch_info_ev->cmd_flags = ev->cmd_flags;
5281 ch_info_ev->noise_floor = ev->noise_floor;
5282 ch_info_ev->rx_clear_count = ev->rx_clear_count;
5283 ch_info_ev->cycle_count = ev->cycle_count;
5284 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range;
5285 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
5286 ch_info_ev->rx_frame_count = ev->rx_frame_count;
5287 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt;
5288 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz;
5289 ch_info_ev->vdev_id = ev->vdev_id;
5290
5291 kfree(tb);
5292 return 0;
5293 }
5294
5295 static int
ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_pdev_bss_chan_info_event * bss_ch_info_ev)5296 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
5297 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev)
5298 {
5299 const void **tb;
5300 const struct wmi_pdev_bss_chan_info_event *ev;
5301 int ret;
5302
5303 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5304 if (IS_ERR(tb)) {
5305 ret = PTR_ERR(tb);
5306 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5307 return ret;
5308 }
5309
5310 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT];
5311 if (!ev) {
5312 ath12k_warn(ab, "failed to fetch pdev bss chan info ev");
5313 kfree(tb);
5314 return -EPROTO;
5315 }
5316
5317 bss_ch_info_ev->pdev_id = ev->pdev_id;
5318 bss_ch_info_ev->freq = ev->freq;
5319 bss_ch_info_ev->noise_floor = ev->noise_floor;
5320 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low;
5321 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high;
5322 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low;
5323 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high;
5324 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low;
5325 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high;
5326 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low;
5327 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high;
5328 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low;
5329 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high;
5330
5331 kfree(tb);
5332 return 0;
5333 }
5334
5335 static int
ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_install_key_complete_arg * arg)5336 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb,
5337 struct wmi_vdev_install_key_complete_arg *arg)
5338 {
5339 const void **tb;
5340 const struct wmi_vdev_install_key_compl_event *ev;
5341 int ret;
5342
5343 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5344 if (IS_ERR(tb)) {
5345 ret = PTR_ERR(tb);
5346 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5347 return ret;
5348 }
5349
5350 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT];
5351 if (!ev) {
5352 ath12k_warn(ab, "failed to fetch vdev install key compl ev");
5353 kfree(tb);
5354 return -EPROTO;
5355 }
5356
5357 arg->vdev_id = le32_to_cpu(ev->vdev_id);
5358 arg->macaddr = ev->peer_macaddr.addr;
5359 arg->key_idx = le32_to_cpu(ev->key_idx);
5360 arg->key_flags = le32_to_cpu(ev->key_flags);
5361 arg->status = le32_to_cpu(ev->status);
5362
5363 kfree(tb);
5364 return 0;
5365 }
5366
ath12k_pull_peer_assoc_conf_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_assoc_conf_arg * peer_assoc_conf)5367 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb,
5368 struct wmi_peer_assoc_conf_arg *peer_assoc_conf)
5369 {
5370 const void **tb;
5371 const struct wmi_peer_assoc_conf_event *ev;
5372 int ret;
5373
5374 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5375 if (IS_ERR(tb)) {
5376 ret = PTR_ERR(tb);
5377 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5378 return ret;
5379 }
5380
5381 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT];
5382 if (!ev) {
5383 ath12k_warn(ab, "failed to fetch peer assoc conf ev");
5384 kfree(tb);
5385 return -EPROTO;
5386 }
5387
5388 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id);
5389 peer_assoc_conf->macaddr = ev->peer_macaddr.addr;
5390
5391 kfree(tb);
5392 return 0;
5393 }
5394
5395 static int
ath12k_pull_pdev_temp_ev(struct ath12k_base * ab,u8 * evt_buf,u32 len,const struct wmi_pdev_temperature_event * ev)5396 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, u8 *evt_buf,
5397 u32 len, const struct wmi_pdev_temperature_event *ev)
5398 {
5399 const void **tb;
5400 int ret;
5401
5402 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC);
5403 if (IS_ERR(tb)) {
5404 ret = PTR_ERR(tb);
5405 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5406 return ret;
5407 }
5408
5409 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT];
5410 if (!ev) {
5411 ath12k_warn(ab, "failed to fetch pdev temp ev");
5412 kfree(tb);
5413 return -EPROTO;
5414 }
5415
5416 kfree(tb);
5417 return 0;
5418 }
5419
ath12k_wmi_op_ep_tx_credits(struct ath12k_base * ab)5420 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab)
5421 {
5422 /* try to send pending beacons first. they take priority */
5423 wake_up(&ab->wmi_ab.tx_credits_wq);
5424 }
5425
ath12k_wmi_htc_tx_complete(struct ath12k_base * ab,struct sk_buff * skb)5426 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab,
5427 struct sk_buff *skb)
5428 {
5429 dev_kfree_skb(skb);
5430 }
5431
ath12k_reg_is_world_alpha(char * alpha)5432 static bool ath12k_reg_is_world_alpha(char *alpha)
5433 {
5434 return alpha[0] == '0' && alpha[1] == '0';
5435 }
5436
ath12k_reg_chan_list_event(struct ath12k_base * ab,struct sk_buff * skb)5437 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb)
5438 {
5439 struct ath12k_reg_info *reg_info = NULL;
5440 struct ieee80211_regdomain *regd = NULL;
5441 bool intersect = false;
5442 int ret = 0, pdev_idx, i, j;
5443 struct ath12k *ar;
5444
5445 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC);
5446 if (!reg_info) {
5447 ret = -ENOMEM;
5448 goto fallback;
5449 }
5450
5451 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info);
5452
5453 if (ret) {
5454 ath12k_warn(ab, "failed to extract regulatory info from received event\n");
5455 goto fallback;
5456 }
5457
5458 if (reg_info->status_code != REG_SET_CC_STATUS_PASS) {
5459 /* In case of failure to set the requested ctry,
5460 * fw retains the current regd. We print a failure info
5461 * and return from here.
5462 */
5463 ath12k_warn(ab, "Failed to set the requested Country regulatory setting\n");
5464 goto mem_free;
5465 }
5466
5467 pdev_idx = reg_info->phy_id;
5468
5469 if (pdev_idx >= ab->num_radios) {
5470 /* Process the event for phy0 only if single_pdev_only
5471 * is true. If pdev_idx is valid but not 0, discard the
5472 * event. Otherwise, it goes to fallback.
5473 */
5474 if (ab->hw_params->single_pdev_only &&
5475 pdev_idx < ab->hw_params->num_rxmda_per_pdev)
5476 goto mem_free;
5477 else
5478 goto fallback;
5479 }
5480
5481 /* Avoid multiple overwrites to default regd, during core
5482 * stop-start after mac registration.
5483 */
5484 if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] &&
5485 !memcmp(ab->default_regd[pdev_idx]->alpha2,
5486 reg_info->alpha2, 2))
5487 goto mem_free;
5488
5489 /* Intersect new rules with default regd if a new country setting was
5490 * requested, i.e a default regd was already set during initialization
5491 * and the regd coming from this event has a valid country info.
5492 */
5493 if (ab->default_regd[pdev_idx] &&
5494 !ath12k_reg_is_world_alpha((char *)
5495 ab->default_regd[pdev_idx]->alpha2) &&
5496 !ath12k_reg_is_world_alpha((char *)reg_info->alpha2))
5497 intersect = true;
5498
5499 regd = ath12k_reg_build_regd(ab, reg_info, intersect);
5500 if (!regd) {
5501 ath12k_warn(ab, "failed to build regd from reg_info\n");
5502 goto fallback;
5503 }
5504
5505 spin_lock(&ab->base_lock);
5506 if (test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)) {
5507 /* Once mac is registered, ar is valid and all CC events from
5508 * fw is considered to be received due to user requests
5509 * currently.
5510 * Free previously built regd before assigning the newly
5511 * generated regd to ar. NULL pointer handling will be
5512 * taken care by kfree itself.
5513 */
5514 ar = ab->pdevs[pdev_idx].ar;
5515 kfree(ab->new_regd[pdev_idx]);
5516 ab->new_regd[pdev_idx] = regd;
5517 queue_work(ab->workqueue, &ar->regd_update_work);
5518 } else {
5519 /* Multiple events for the same *ar is not expected. But we
5520 * can still clear any previously stored default_regd if we
5521 * are receiving this event for the same radio by mistake.
5522 * NULL pointer handling will be taken care by kfree itself.
5523 */
5524 kfree(ab->default_regd[pdev_idx]);
5525 /* This regd would be applied during mac registration */
5526 ab->default_regd[pdev_idx] = regd;
5527 }
5528 ab->dfs_region = reg_info->dfs_region;
5529 spin_unlock(&ab->base_lock);
5530
5531 goto mem_free;
5532
5533 fallback:
5534 /* Fallback to older reg (by sending previous country setting
5535 * again if fw has succeeded and we failed to process here.
5536 * The Regdomain should be uniform across driver and fw. Since the
5537 * FW has processed the command and sent a success status, we expect
5538 * this function to succeed as well. If it doesn't, CTRY needs to be
5539 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent.
5540 */
5541 /* TODO: This is rare, but still should also be handled */
5542 WARN_ON(1);
5543 mem_free:
5544 if (reg_info) {
5545 kfree(reg_info->reg_rules_2g_ptr);
5546 kfree(reg_info->reg_rules_5g_ptr);
5547 if (reg_info->is_ext_reg_event) {
5548 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++)
5549 kfree(reg_info->reg_rules_6g_ap_ptr[i]);
5550
5551 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++)
5552 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++)
5553 kfree(reg_info->reg_rules_6g_client_ptr[j][i]);
5554 }
5555 kfree(reg_info);
5556 }
5557 return ret;
5558 }
5559
ath12k_wmi_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5560 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
5561 const void *ptr, void *data)
5562 {
5563 struct ath12k_wmi_rdy_parse *rdy_parse = data;
5564 struct wmi_ready_event fixed_param;
5565 struct ath12k_wmi_mac_addr_params *addr_list;
5566 struct ath12k_pdev *pdev;
5567 u32 num_mac_addr;
5568 int i;
5569
5570 switch (tag) {
5571 case WMI_TAG_READY_EVENT:
5572 memset(&fixed_param, 0, sizeof(fixed_param));
5573 memcpy(&fixed_param, (struct wmi_ready_event *)ptr,
5574 min_t(u16, sizeof(fixed_param), len));
5575 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status);
5576 rdy_parse->num_extra_mac_addr =
5577 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr);
5578
5579 ether_addr_copy(ab->mac_addr,
5580 fixed_param.ready_event_min.mac_addr.addr);
5581 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum);
5582 ab->wmi_ready = true;
5583 break;
5584 case WMI_TAG_ARRAY_FIXED_STRUCT:
5585 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr;
5586 num_mac_addr = rdy_parse->num_extra_mac_addr;
5587
5588 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios))
5589 break;
5590
5591 for (i = 0; i < ab->num_radios; i++) {
5592 pdev = &ab->pdevs[i];
5593 ether_addr_copy(pdev->mac_addr, addr_list[i].addr);
5594 }
5595 ab->pdevs_macaddr_valid = true;
5596 break;
5597 default:
5598 break;
5599 }
5600
5601 return 0;
5602 }
5603
ath12k_ready_event(struct ath12k_base * ab,struct sk_buff * skb)5604 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
5605 {
5606 struct ath12k_wmi_rdy_parse rdy_parse = { };
5607 int ret;
5608
5609 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5610 ath12k_wmi_rdy_parse, &rdy_parse);
5611 if (ret) {
5612 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
5613 return ret;
5614 }
5615
5616 complete(&ab->wmi_ab.unified_ready);
5617 return 0;
5618 }
5619
ath12k_peer_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)5620 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
5621 {
5622 struct wmi_peer_delete_resp_event peer_del_resp;
5623 struct ath12k *ar;
5624
5625 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) {
5626 ath12k_warn(ab, "failed to extract peer delete resp");
5627 return;
5628 }
5629
5630 rcu_read_lock();
5631 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id));
5632 if (!ar) {
5633 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d",
5634 peer_del_resp.vdev_id);
5635 rcu_read_unlock();
5636 return;
5637 }
5638
5639 complete(&ar->peer_delete_done);
5640 rcu_read_unlock();
5641 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n",
5642 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr);
5643 }
5644
ath12k_vdev_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)5645 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab,
5646 struct sk_buff *skb)
5647 {
5648 struct ath12k *ar;
5649 u32 vdev_id = 0;
5650
5651 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) {
5652 ath12k_warn(ab, "failed to extract vdev delete resp");
5653 return;
5654 }
5655
5656 rcu_read_lock();
5657 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
5658 if (!ar) {
5659 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d",
5660 vdev_id);
5661 rcu_read_unlock();
5662 return;
5663 }
5664
5665 complete(&ar->vdev_delete_done);
5666
5667 rcu_read_unlock();
5668
5669 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n",
5670 vdev_id);
5671 }
5672
ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)5673 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)
5674 {
5675 switch (vdev_resp_status) {
5676 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID:
5677 return "invalid vdev id";
5678 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED:
5679 return "not supported";
5680 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION:
5681 return "dfs violation";
5682 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN:
5683 return "invalid regdomain";
5684 default:
5685 return "unknown";
5686 }
5687 }
5688
ath12k_vdev_start_resp_event(struct ath12k_base * ab,struct sk_buff * skb)5689 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
5690 {
5691 struct wmi_vdev_start_resp_event vdev_start_resp;
5692 struct ath12k *ar;
5693 u32 status;
5694
5695 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) {
5696 ath12k_warn(ab, "failed to extract vdev start resp");
5697 return;
5698 }
5699
5700 rcu_read_lock();
5701 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id));
5702 if (!ar) {
5703 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d",
5704 vdev_start_resp.vdev_id);
5705 rcu_read_unlock();
5706 return;
5707 }
5708
5709 ar->last_wmi_vdev_start_status = 0;
5710
5711 status = le32_to_cpu(vdev_start_resp.status);
5712
5713 if (WARN_ON_ONCE(status)) {
5714 ath12k_warn(ab, "vdev start resp error status %d (%s)\n",
5715 status, ath12k_wmi_vdev_resp_print(status));
5716 ar->last_wmi_vdev_start_status = status;
5717 }
5718
5719 complete(&ar->vdev_setup_done);
5720
5721 rcu_read_unlock();
5722
5723 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d",
5724 vdev_start_resp.vdev_id);
5725 }
5726
ath12k_bcn_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)5727 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb)
5728 {
5729 u32 vdev_id, tx_status;
5730
5731 if (ath12k_pull_bcn_tx_status_ev(ab, skb->data, skb->len,
5732 &vdev_id, &tx_status) != 0) {
5733 ath12k_warn(ab, "failed to extract bcn tx status");
5734 return;
5735 }
5736 }
5737
ath12k_vdev_stopped_event(struct ath12k_base * ab,struct sk_buff * skb)5738 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb)
5739 {
5740 struct ath12k *ar;
5741 u32 vdev_id = 0;
5742
5743 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) {
5744 ath12k_warn(ab, "failed to extract vdev stopped event");
5745 return;
5746 }
5747
5748 rcu_read_lock();
5749 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
5750 if (!ar) {
5751 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d",
5752 vdev_id);
5753 rcu_read_unlock();
5754 return;
5755 }
5756
5757 complete(&ar->vdev_setup_done);
5758
5759 rcu_read_unlock();
5760
5761 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id);
5762 }
5763
ath12k_mgmt_rx_event(struct ath12k_base * ab,struct sk_buff * skb)5764 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb)
5765 {
5766 struct ath12k_wmi_mgmt_rx_arg rx_ev = {0};
5767 struct ath12k *ar;
5768 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
5769 struct ieee80211_hdr *hdr;
5770 u16 fc;
5771 struct ieee80211_supported_band *sband;
5772
5773 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) {
5774 ath12k_warn(ab, "failed to extract mgmt rx event");
5775 dev_kfree_skb(skb);
5776 return;
5777 }
5778
5779 memset(status, 0, sizeof(*status));
5780
5781 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n",
5782 rx_ev.status);
5783
5784 rcu_read_lock();
5785 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id);
5786
5787 if (!ar) {
5788 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n",
5789 rx_ev.pdev_id);
5790 dev_kfree_skb(skb);
5791 goto exit;
5792 }
5793
5794 if ((test_bit(ATH12K_CAC_RUNNING, &ar->dev_flags)) ||
5795 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT |
5796 WMI_RX_STATUS_ERR_KEY_CACHE_MISS |
5797 WMI_RX_STATUS_ERR_CRC))) {
5798 dev_kfree_skb(skb);
5799 goto exit;
5800 }
5801
5802 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC)
5803 status->flag |= RX_FLAG_MMIC_ERROR;
5804
5805 if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ &&
5806 rx_ev.chan_freq <= ATH12K_MAX_6G_FREQ) {
5807 status->band = NL80211_BAND_6GHZ;
5808 status->freq = rx_ev.chan_freq;
5809 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) {
5810 status->band = NL80211_BAND_2GHZ;
5811 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) {
5812 status->band = NL80211_BAND_5GHZ;
5813 } else {
5814 /* Shouldn't happen unless list of advertised channels to
5815 * mac80211 has been changed.
5816 */
5817 WARN_ON_ONCE(1);
5818 dev_kfree_skb(skb);
5819 goto exit;
5820 }
5821
5822 if (rx_ev.phy_mode == MODE_11B &&
5823 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ))
5824 ath12k_dbg(ab, ATH12K_DBG_WMI,
5825 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band);
5826
5827 sband = &ar->mac.sbands[status->band];
5828
5829 if (status->band != NL80211_BAND_6GHZ)
5830 status->freq = ieee80211_channel_to_frequency(rx_ev.channel,
5831 status->band);
5832
5833 status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR;
5834 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100);
5835
5836 hdr = (struct ieee80211_hdr *)skb->data;
5837 fc = le16_to_cpu(hdr->frame_control);
5838
5839 /* Firmware is guaranteed to report all essential management frames via
5840 * WMI while it can deliver some extra via HTT. Since there can be
5841 * duplicates split the reporting wrt monitor/sniffing.
5842 */
5843 status->flag |= RX_FLAG_SKIP_MONITOR;
5844
5845 /* In case of PMF, FW delivers decrypted frames with Protected Bit set
5846 * including group privacy action frames.
5847 */
5848 if (ieee80211_has_protected(hdr->frame_control)) {
5849 status->flag |= RX_FLAG_DECRYPTED;
5850
5851 if (!ieee80211_is_robust_mgmt_frame(skb)) {
5852 status->flag |= RX_FLAG_IV_STRIPPED |
5853 RX_FLAG_MMIC_STRIPPED;
5854 hdr->frame_control = __cpu_to_le16(fc &
5855 ~IEEE80211_FCTL_PROTECTED);
5856 }
5857 }
5858
5859 /* TODO: Pending handle beacon implementation
5860 *if (ieee80211_is_beacon(hdr->frame_control))
5861 * ath12k_mac_handle_beacon(ar, skb);
5862 */
5863
5864 ath12k_dbg(ab, ATH12K_DBG_MGMT,
5865 "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
5866 skb, skb->len,
5867 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
5868
5869 ath12k_dbg(ab, ATH12K_DBG_MGMT,
5870 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
5871 status->freq, status->band, status->signal,
5872 status->rate_idx);
5873
5874 ieee80211_rx_ni(ar->hw, skb);
5875
5876 exit:
5877 rcu_read_unlock();
5878 }
5879
ath12k_mgmt_tx_compl_event(struct ath12k_base * ab,struct sk_buff * skb)5880 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb)
5881 {
5882 struct wmi_mgmt_tx_compl_event tx_compl_param = {0};
5883 struct ath12k *ar;
5884
5885 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) {
5886 ath12k_warn(ab, "failed to extract mgmt tx compl event");
5887 return;
5888 }
5889
5890 rcu_read_lock();
5891 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id));
5892 if (!ar) {
5893 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n",
5894 tx_compl_param.pdev_id);
5895 goto exit;
5896 }
5897
5898 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id),
5899 le32_to_cpu(tx_compl_param.status));
5900
5901 ath12k_dbg(ab, ATH12K_DBG_MGMT,
5902 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
5903 tx_compl_param.pdev_id, tx_compl_param.desc_id,
5904 tx_compl_param.status);
5905
5906 exit:
5907 rcu_read_unlock();
5908 }
5909
ath12k_get_ar_on_scan_abort(struct ath12k_base * ab,u32 vdev_id)5910 static struct ath12k *ath12k_get_ar_on_scan_abort(struct ath12k_base *ab,
5911 u32 vdev_id)
5912 {
5913 int i;
5914 struct ath12k_pdev *pdev;
5915 struct ath12k *ar;
5916
5917 for (i = 0; i < ab->num_radios; i++) {
5918 pdev = rcu_dereference(ab->pdevs_active[i]);
5919 if (pdev && pdev->ar) {
5920 ar = pdev->ar;
5921
5922 spin_lock_bh(&ar->data_lock);
5923 if (ar->scan.state == ATH12K_SCAN_ABORTING &&
5924 ar->scan.vdev_id == vdev_id) {
5925 spin_unlock_bh(&ar->data_lock);
5926 return ar;
5927 }
5928 spin_unlock_bh(&ar->data_lock);
5929 }
5930 }
5931 return NULL;
5932 }
5933
ath12k_scan_event(struct ath12k_base * ab,struct sk_buff * skb)5934 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb)
5935 {
5936 struct ath12k *ar;
5937 struct wmi_scan_event scan_ev = {0};
5938
5939 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) {
5940 ath12k_warn(ab, "failed to extract scan event");
5941 return;
5942 }
5943
5944 rcu_read_lock();
5945
5946 /* In case the scan was cancelled, ex. during interface teardown,
5947 * the interface will not be found in active interfaces.
5948 * Rather, in such scenarios, iterate over the active pdev's to
5949 * search 'ar' if the corresponding 'ar' scan is ABORTING and the
5950 * aborting scan's vdev id matches this event info.
5951 */
5952 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED &&
5953 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED)
5954 ar = ath12k_get_ar_on_scan_abort(ab, le32_to_cpu(scan_ev.vdev_id));
5955 else
5956 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id));
5957
5958 if (!ar) {
5959 ath12k_warn(ab, "Received scan event for unknown vdev");
5960 rcu_read_unlock();
5961 return;
5962 }
5963
5964 spin_lock_bh(&ar->data_lock);
5965
5966 ath12k_dbg(ab, ATH12K_DBG_WMI,
5967 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
5968 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type),
5969 le32_to_cpu(scan_ev.reason)),
5970 le32_to_cpu(scan_ev.event_type),
5971 le32_to_cpu(scan_ev.reason),
5972 le32_to_cpu(scan_ev.channel_freq),
5973 le32_to_cpu(scan_ev.scan_req_id),
5974 le32_to_cpu(scan_ev.scan_id),
5975 le32_to_cpu(scan_ev.vdev_id),
5976 ath12k_scan_state_str(ar->scan.state), ar->scan.state);
5977
5978 switch (le32_to_cpu(scan_ev.event_type)) {
5979 case WMI_SCAN_EVENT_STARTED:
5980 ath12k_wmi_event_scan_started(ar);
5981 break;
5982 case WMI_SCAN_EVENT_COMPLETED:
5983 ath12k_wmi_event_scan_completed(ar);
5984 break;
5985 case WMI_SCAN_EVENT_BSS_CHANNEL:
5986 ath12k_wmi_event_scan_bss_chan(ar);
5987 break;
5988 case WMI_SCAN_EVENT_FOREIGN_CHAN:
5989 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq));
5990 break;
5991 case WMI_SCAN_EVENT_START_FAILED:
5992 ath12k_warn(ab, "received scan start failure event\n");
5993 ath12k_wmi_event_scan_start_failed(ar);
5994 break;
5995 case WMI_SCAN_EVENT_DEQUEUED:
5996 __ath12k_mac_scan_finish(ar);
5997 break;
5998 case WMI_SCAN_EVENT_PREEMPTED:
5999 case WMI_SCAN_EVENT_RESTARTED:
6000 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
6001 default:
6002 break;
6003 }
6004
6005 spin_unlock_bh(&ar->data_lock);
6006
6007 rcu_read_unlock();
6008 }
6009
ath12k_peer_sta_kickout_event(struct ath12k_base * ab,struct sk_buff * skb)6010 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb)
6011 {
6012 struct wmi_peer_sta_kickout_arg arg = {};
6013 struct ieee80211_sta *sta;
6014 struct ath12k_peer *peer;
6015 struct ath12k *ar;
6016
6017 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) {
6018 ath12k_warn(ab, "failed to extract peer sta kickout event");
6019 return;
6020 }
6021
6022 rcu_read_lock();
6023
6024 spin_lock_bh(&ab->base_lock);
6025
6026 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr);
6027
6028 if (!peer) {
6029 ath12k_warn(ab, "peer not found %pM\n",
6030 arg.mac_addr);
6031 goto exit;
6032 }
6033
6034 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id);
6035 if (!ar) {
6036 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d",
6037 peer->vdev_id);
6038 goto exit;
6039 }
6040
6041 sta = ieee80211_find_sta_by_ifaddr(ar->hw,
6042 arg.mac_addr, NULL);
6043 if (!sta) {
6044 ath12k_warn(ab, "Spurious quick kickout for STA %pM\n",
6045 arg.mac_addr);
6046 goto exit;
6047 }
6048
6049 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM",
6050 arg.mac_addr);
6051
6052 ieee80211_report_low_ack(sta, 10);
6053
6054 exit:
6055 spin_unlock_bh(&ab->base_lock);
6056 rcu_read_unlock();
6057 }
6058
ath12k_roam_event(struct ath12k_base * ab,struct sk_buff * skb)6059 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb)
6060 {
6061 struct wmi_roam_event roam_ev = {};
6062 struct ath12k *ar;
6063
6064 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) {
6065 ath12k_warn(ab, "failed to extract roam event");
6066 return;
6067 }
6068
6069 ath12k_dbg(ab, ATH12K_DBG_WMI,
6070 "wmi roam event vdev %u reason 0x%08x rssi %d\n",
6071 roam_ev.vdev_id, roam_ev.reason, roam_ev.rssi);
6072
6073 rcu_read_lock();
6074 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(roam_ev.vdev_id));
6075 if (!ar) {
6076 ath12k_warn(ab, "invalid vdev id in roam ev %d",
6077 roam_ev.vdev_id);
6078 rcu_read_unlock();
6079 return;
6080 }
6081
6082 if (le32_to_cpu(roam_ev.reason) >= WMI_ROAM_REASON_MAX)
6083 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n",
6084 roam_ev.reason, roam_ev.vdev_id);
6085
6086 switch (le32_to_cpu(roam_ev.reason)) {
6087 case WMI_ROAM_REASON_BEACON_MISS:
6088 /* TODO: Pending beacon miss and connection_loss_work
6089 * implementation
6090 * ath12k_mac_handle_beacon_miss(ar, vdev_id);
6091 */
6092 break;
6093 case WMI_ROAM_REASON_BETTER_AP:
6094 case WMI_ROAM_REASON_LOW_RSSI:
6095 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
6096 case WMI_ROAM_REASON_HO_FAILED:
6097 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n",
6098 roam_ev.reason, roam_ev.vdev_id);
6099 break;
6100 }
6101
6102 rcu_read_unlock();
6103 }
6104
ath12k_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)6105 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
6106 {
6107 struct wmi_chan_info_event ch_info_ev = {0};
6108 struct ath12k *ar;
6109 struct survey_info *survey;
6110 int idx;
6111 /* HW channel counters frequency value in hertz */
6112 u32 cc_freq_hz = ab->cc_freq_hz;
6113
6114 if (ath12k_pull_chan_info_ev(ab, skb->data, skb->len, &ch_info_ev) != 0) {
6115 ath12k_warn(ab, "failed to extract chan info event");
6116 return;
6117 }
6118
6119 ath12k_dbg(ab, ATH12K_DBG_WMI,
6120 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n",
6121 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq,
6122 ch_info_ev.cmd_flags, ch_info_ev.noise_floor,
6123 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count,
6124 ch_info_ev.mac_clk_mhz);
6125
6126 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) {
6127 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n");
6128 return;
6129 }
6130
6131 rcu_read_lock();
6132 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id));
6133 if (!ar) {
6134 ath12k_warn(ab, "invalid vdev id in chan info ev %d",
6135 ch_info_ev.vdev_id);
6136 rcu_read_unlock();
6137 return;
6138 }
6139 spin_lock_bh(&ar->data_lock);
6140
6141 switch (ar->scan.state) {
6142 case ATH12K_SCAN_IDLE:
6143 case ATH12K_SCAN_STARTING:
6144 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n");
6145 goto exit;
6146 case ATH12K_SCAN_RUNNING:
6147 case ATH12K_SCAN_ABORTING:
6148 break;
6149 }
6150
6151 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq));
6152 if (idx >= ARRAY_SIZE(ar->survey)) {
6153 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n",
6154 ch_info_ev.freq, idx);
6155 goto exit;
6156 }
6157
6158 /* If FW provides MAC clock frequency in Mhz, overriding the initialized
6159 * HW channel counters frequency value
6160 */
6161 if (ch_info_ev.mac_clk_mhz)
6162 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000);
6163
6164 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) {
6165 survey = &ar->survey[idx];
6166 memset(survey, 0, sizeof(*survey));
6167 survey->noise = le32_to_cpu(ch_info_ev.noise_floor);
6168 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
6169 SURVEY_INFO_TIME_BUSY;
6170 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz);
6171 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count),
6172 cc_freq_hz);
6173 }
6174 exit:
6175 spin_unlock_bh(&ar->data_lock);
6176 rcu_read_unlock();
6177 }
6178
6179 static void
ath12k_pdev_bss_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)6180 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
6181 {
6182 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {};
6183 struct survey_info *survey;
6184 struct ath12k *ar;
6185 u32 cc_freq_hz = ab->cc_freq_hz;
6186 u64 busy, total, tx, rx, rx_bss;
6187 int idx;
6188
6189 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) {
6190 ath12k_warn(ab, "failed to extract pdev bss chan info event");
6191 return;
6192 }
6193
6194 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 |
6195 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low);
6196
6197 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 |
6198 le32_to_cpu(bss_ch_info_ev.cycle_count_low);
6199
6200 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 |
6201 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low);
6202
6203 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 |
6204 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low);
6205
6206 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 |
6207 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low);
6208
6209 ath12k_dbg(ab, ATH12K_DBG_WMI,
6210 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
6211 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq,
6212 bss_ch_info_ev.noise_floor, busy, total,
6213 tx, rx, rx_bss);
6214
6215 rcu_read_lock();
6216 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id));
6217
6218 if (!ar) {
6219 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n",
6220 bss_ch_info_ev.pdev_id);
6221 rcu_read_unlock();
6222 return;
6223 }
6224
6225 spin_lock_bh(&ar->data_lock);
6226 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq));
6227 if (idx >= ARRAY_SIZE(ar->survey)) {
6228 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
6229 bss_ch_info_ev.freq, idx);
6230 goto exit;
6231 }
6232
6233 survey = &ar->survey[idx];
6234
6235 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor);
6236 survey->time = div_u64(total, cc_freq_hz);
6237 survey->time_busy = div_u64(busy, cc_freq_hz);
6238 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
6239 survey->time_tx = div_u64(tx, cc_freq_hz);
6240 survey->filled |= (SURVEY_INFO_NOISE_DBM |
6241 SURVEY_INFO_TIME |
6242 SURVEY_INFO_TIME_BUSY |
6243 SURVEY_INFO_TIME_RX |
6244 SURVEY_INFO_TIME_TX);
6245 exit:
6246 spin_unlock_bh(&ar->data_lock);
6247 complete(&ar->bss_survey_done);
6248
6249 rcu_read_unlock();
6250 }
6251
ath12k_vdev_install_key_compl_event(struct ath12k_base * ab,struct sk_buff * skb)6252 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab,
6253 struct sk_buff *skb)
6254 {
6255 struct wmi_vdev_install_key_complete_arg install_key_compl = {0};
6256 struct ath12k *ar;
6257
6258 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) {
6259 ath12k_warn(ab, "failed to extract install key compl event");
6260 return;
6261 }
6262
6263 ath12k_dbg(ab, ATH12K_DBG_WMI,
6264 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n",
6265 install_key_compl.key_idx, install_key_compl.key_flags,
6266 install_key_compl.macaddr, install_key_compl.status);
6267
6268 rcu_read_lock();
6269 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id);
6270 if (!ar) {
6271 ath12k_warn(ab, "invalid vdev id in install key compl ev %d",
6272 install_key_compl.vdev_id);
6273 rcu_read_unlock();
6274 return;
6275 }
6276
6277 ar->install_key_status = 0;
6278
6279 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) {
6280 ath12k_warn(ab, "install key failed for %pM status %d\n",
6281 install_key_compl.macaddr, install_key_compl.status);
6282 ar->install_key_status = install_key_compl.status;
6283 }
6284
6285 complete(&ar->install_key_done);
6286 rcu_read_unlock();
6287 }
6288
ath12k_wmi_tlv_services_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6289 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab,
6290 u16 tag, u16 len,
6291 const void *ptr,
6292 void *data)
6293 {
6294 const struct wmi_service_available_event *ev;
6295 u32 *wmi_ext2_service_bitmap;
6296 int i, j;
6297 u16 expected_len;
6298
6299 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32);
6300 if (len < expected_len) {
6301 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n",
6302 len, tag);
6303 return -EINVAL;
6304 }
6305
6306 switch (tag) {
6307 case WMI_TAG_SERVICE_AVAILABLE_EVENT:
6308 ev = (struct wmi_service_available_event *)ptr;
6309 for (i = 0, j = WMI_MAX_SERVICE;
6310 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE;
6311 i++) {
6312 do {
6313 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) &
6314 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
6315 set_bit(j, ab->wmi_ab.svc_map);
6316 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
6317 }
6318
6319 ath12k_dbg(ab, ATH12K_DBG_WMI,
6320 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x",
6321 ev->wmi_service_segment_bitmap[0],
6322 ev->wmi_service_segment_bitmap[1],
6323 ev->wmi_service_segment_bitmap[2],
6324 ev->wmi_service_segment_bitmap[3]);
6325 break;
6326 case WMI_TAG_ARRAY_UINT32:
6327 wmi_ext2_service_bitmap = (u32 *)ptr;
6328 for (i = 0, j = WMI_MAX_EXT_SERVICE;
6329 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE;
6330 i++) {
6331 do {
6332 if (wmi_ext2_service_bitmap[i] &
6333 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
6334 set_bit(j, ab->wmi_ab.svc_map);
6335 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
6336 }
6337
6338 ath12k_dbg(ab, ATH12K_DBG_WMI,
6339 "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x",
6340 wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1],
6341 wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]);
6342 break;
6343 }
6344 return 0;
6345 }
6346
ath12k_service_available_event(struct ath12k_base * ab,struct sk_buff * skb)6347 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb)
6348 {
6349 int ret;
6350
6351 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6352 ath12k_wmi_tlv_services_parser,
6353 NULL);
6354 return ret;
6355 }
6356
ath12k_peer_assoc_conf_event(struct ath12k_base * ab,struct sk_buff * skb)6357 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb)
6358 {
6359 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0};
6360 struct ath12k *ar;
6361
6362 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) {
6363 ath12k_warn(ab, "failed to extract peer assoc conf event");
6364 return;
6365 }
6366
6367 ath12k_dbg(ab, ATH12K_DBG_WMI,
6368 "peer assoc conf ev vdev id %d macaddr %pM\n",
6369 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr);
6370
6371 rcu_read_lock();
6372 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id);
6373
6374 if (!ar) {
6375 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d",
6376 peer_assoc_conf.vdev_id);
6377 rcu_read_unlock();
6378 return;
6379 }
6380
6381 complete(&ar->peer_assoc_done);
6382 rcu_read_unlock();
6383 }
6384
ath12k_update_stats_event(struct ath12k_base * ab,struct sk_buff * skb)6385 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb)
6386 {
6387 }
6388
6389 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned
6390 * is not part of BDF CTL(Conformance test limits) table entries.
6391 */
ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base * ab,struct sk_buff * skb)6392 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab,
6393 struct sk_buff *skb)
6394 {
6395 const void **tb;
6396 const struct wmi_pdev_ctl_failsafe_chk_event *ev;
6397 int ret;
6398
6399 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
6400 if (IS_ERR(tb)) {
6401 ret = PTR_ERR(tb);
6402 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6403 return;
6404 }
6405
6406 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT];
6407 if (!ev) {
6408 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev");
6409 kfree(tb);
6410 return;
6411 }
6412
6413 ath12k_dbg(ab, ATH12K_DBG_WMI,
6414 "pdev ctl failsafe check ev status %d\n",
6415 ev->ctl_failsafe_status);
6416
6417 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power
6418 * to 10 dBm else the CTL power entry in the BDF would be picked up.
6419 */
6420 if (ev->ctl_failsafe_status != 0)
6421 ath12k_warn(ab, "pdev ctl failsafe failure status %d",
6422 ev->ctl_failsafe_status);
6423
6424 kfree(tb);
6425 }
6426
6427 static void
ath12k_wmi_process_csa_switch_count_event(struct ath12k_base * ab,const struct ath12k_wmi_pdev_csa_event * ev,const u32 * vdev_ids)6428 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab,
6429 const struct ath12k_wmi_pdev_csa_event *ev,
6430 const u32 *vdev_ids)
6431 {
6432 int i;
6433 struct ath12k_vif *arvif;
6434
6435 /* Finish CSA once the switch count becomes NULL */
6436 if (ev->current_switch_count)
6437 return;
6438
6439 rcu_read_lock();
6440 for (i = 0; i < le32_to_cpu(ev->num_vdevs); i++) {
6441 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]);
6442
6443 if (!arvif) {
6444 ath12k_warn(ab, "Recvd csa status for unknown vdev %d",
6445 vdev_ids[i]);
6446 continue;
6447 }
6448
6449 if (arvif->is_up && arvif->vif->bss_conf.csa_active)
6450 ieee80211_csa_finish(arvif->vif);
6451 }
6452 rcu_read_unlock();
6453 }
6454
6455 static void
ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base * ab,struct sk_buff * skb)6456 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab,
6457 struct sk_buff *skb)
6458 {
6459 const void **tb;
6460 const struct ath12k_wmi_pdev_csa_event *ev;
6461 const u32 *vdev_ids;
6462 int ret;
6463
6464 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
6465 if (IS_ERR(tb)) {
6466 ret = PTR_ERR(tb);
6467 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6468 return;
6469 }
6470
6471 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT];
6472 vdev_ids = tb[WMI_TAG_ARRAY_UINT32];
6473
6474 if (!ev || !vdev_ids) {
6475 ath12k_warn(ab, "failed to fetch pdev csa switch count ev");
6476 kfree(tb);
6477 return;
6478 }
6479
6480 ath12k_dbg(ab, ATH12K_DBG_WMI,
6481 "pdev csa switch count %d for pdev %d, num_vdevs %d",
6482 ev->current_switch_count, ev->pdev_id,
6483 ev->num_vdevs);
6484
6485 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids);
6486
6487 kfree(tb);
6488 }
6489
6490 static void
ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base * ab,struct sk_buff * skb)6491 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb)
6492 {
6493 const void **tb;
6494 const struct ath12k_wmi_pdev_radar_event *ev;
6495 struct ath12k *ar;
6496 int ret;
6497
6498 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
6499 if (IS_ERR(tb)) {
6500 ret = PTR_ERR(tb);
6501 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6502 return;
6503 }
6504
6505 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT];
6506
6507 if (!ev) {
6508 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev");
6509 kfree(tb);
6510 return;
6511 }
6512
6513 ath12k_dbg(ab, ATH12K_DBG_WMI,
6514 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d",
6515 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width,
6516 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp,
6517 ev->freq_offset, ev->sidx);
6518
6519 rcu_read_lock();
6520
6521 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id));
6522
6523 if (!ar) {
6524 ath12k_warn(ab, "radar detected in invalid pdev %d\n",
6525 ev->pdev_id);
6526 goto exit;
6527 }
6528
6529 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n",
6530 ev->pdev_id);
6531
6532 if (ar->dfs_block_radar_events)
6533 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n");
6534 else
6535 ieee80211_radar_detected(ar->hw);
6536
6537 exit:
6538 rcu_read_unlock();
6539
6540 kfree(tb);
6541 }
6542
6543 static void
ath12k_wmi_pdev_temperature_event(struct ath12k_base * ab,struct sk_buff * skb)6544 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab,
6545 struct sk_buff *skb)
6546 {
6547 struct ath12k *ar;
6548 struct wmi_pdev_temperature_event ev = {0};
6549
6550 if (ath12k_pull_pdev_temp_ev(ab, skb->data, skb->len, &ev) != 0) {
6551 ath12k_warn(ab, "failed to extract pdev temperature event");
6552 return;
6553 }
6554
6555 ath12k_dbg(ab, ATH12K_DBG_WMI,
6556 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id);
6557
6558 rcu_read_lock();
6559
6560 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id));
6561 if (!ar) {
6562 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id);
6563 goto exit;
6564 }
6565
6566 exit:
6567 rcu_read_unlock();
6568 }
6569
ath12k_fils_discovery_event(struct ath12k_base * ab,struct sk_buff * skb)6570 static void ath12k_fils_discovery_event(struct ath12k_base *ab,
6571 struct sk_buff *skb)
6572 {
6573 const void **tb;
6574 const struct wmi_fils_discovery_event *ev;
6575 int ret;
6576
6577 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
6578 if (IS_ERR(tb)) {
6579 ret = PTR_ERR(tb);
6580 ath12k_warn(ab,
6581 "failed to parse FILS discovery event tlv %d\n",
6582 ret);
6583 return;
6584 }
6585
6586 ev = tb[WMI_TAG_HOST_SWFDA_EVENT];
6587 if (!ev) {
6588 ath12k_warn(ab, "failed to fetch FILS discovery event\n");
6589 kfree(tb);
6590 return;
6591 }
6592
6593 ath12k_warn(ab,
6594 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n",
6595 ev->vdev_id, ev->fils_tt, ev->tbtt);
6596
6597 kfree(tb);
6598 }
6599
ath12k_probe_resp_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)6600 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab,
6601 struct sk_buff *skb)
6602 {
6603 const void **tb;
6604 const struct wmi_probe_resp_tx_status_event *ev;
6605 int ret;
6606
6607 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
6608 if (IS_ERR(tb)) {
6609 ret = PTR_ERR(tb);
6610 ath12k_warn(ab,
6611 "failed to parse probe response transmission status event tlv: %d\n",
6612 ret);
6613 return;
6614 }
6615
6616 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT];
6617 if (!ev) {
6618 ath12k_warn(ab,
6619 "failed to fetch probe response transmission status event");
6620 kfree(tb);
6621 return;
6622 }
6623
6624 if (ev->tx_status)
6625 ath12k_warn(ab,
6626 "Probe response transmission failed for vdev_id %u, status %u\n",
6627 ev->vdev_id, ev->tx_status);
6628
6629 kfree(tb);
6630 }
6631
ath12k_wmi_op_rx(struct ath12k_base * ab,struct sk_buff * skb)6632 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb)
6633 {
6634 struct wmi_cmd_hdr *cmd_hdr;
6635 enum wmi_tlv_event_id id;
6636
6637 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6638 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID);
6639
6640 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
6641 goto out;
6642
6643 switch (id) {
6644 /* Process all the WMI events here */
6645 case WMI_SERVICE_READY_EVENTID:
6646 ath12k_service_ready_event(ab, skb);
6647 break;
6648 case WMI_SERVICE_READY_EXT_EVENTID:
6649 ath12k_service_ready_ext_event(ab, skb);
6650 break;
6651 case WMI_SERVICE_READY_EXT2_EVENTID:
6652 ath12k_service_ready_ext2_event(ab, skb);
6653 break;
6654 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID:
6655 ath12k_reg_chan_list_event(ab, skb);
6656 break;
6657 case WMI_READY_EVENTID:
6658 ath12k_ready_event(ab, skb);
6659 break;
6660 case WMI_PEER_DELETE_RESP_EVENTID:
6661 ath12k_peer_delete_resp_event(ab, skb);
6662 break;
6663 case WMI_VDEV_START_RESP_EVENTID:
6664 ath12k_vdev_start_resp_event(ab, skb);
6665 break;
6666 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID:
6667 ath12k_bcn_tx_status_event(ab, skb);
6668 break;
6669 case WMI_VDEV_STOPPED_EVENTID:
6670 ath12k_vdev_stopped_event(ab, skb);
6671 break;
6672 case WMI_MGMT_RX_EVENTID:
6673 ath12k_mgmt_rx_event(ab, skb);
6674 /* mgmt_rx_event() owns the skb now! */
6675 return;
6676 case WMI_MGMT_TX_COMPLETION_EVENTID:
6677 ath12k_mgmt_tx_compl_event(ab, skb);
6678 break;
6679 case WMI_SCAN_EVENTID:
6680 ath12k_scan_event(ab, skb);
6681 break;
6682 case WMI_PEER_STA_KICKOUT_EVENTID:
6683 ath12k_peer_sta_kickout_event(ab, skb);
6684 break;
6685 case WMI_ROAM_EVENTID:
6686 ath12k_roam_event(ab, skb);
6687 break;
6688 case WMI_CHAN_INFO_EVENTID:
6689 ath12k_chan_info_event(ab, skb);
6690 break;
6691 case WMI_PDEV_BSS_CHAN_INFO_EVENTID:
6692 ath12k_pdev_bss_chan_info_event(ab, skb);
6693 break;
6694 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
6695 ath12k_vdev_install_key_compl_event(ab, skb);
6696 break;
6697 case WMI_SERVICE_AVAILABLE_EVENTID:
6698 ath12k_service_available_event(ab, skb);
6699 break;
6700 case WMI_PEER_ASSOC_CONF_EVENTID:
6701 ath12k_peer_assoc_conf_event(ab, skb);
6702 break;
6703 case WMI_UPDATE_STATS_EVENTID:
6704 ath12k_update_stats_event(ab, skb);
6705 break;
6706 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID:
6707 ath12k_pdev_ctl_failsafe_check_event(ab, skb);
6708 break;
6709 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
6710 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb);
6711 break;
6712 case WMI_PDEV_TEMPERATURE_EVENTID:
6713 ath12k_wmi_pdev_temperature_event(ab, skb);
6714 break;
6715 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID:
6716 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb);
6717 break;
6718 case WMI_HOST_FILS_DISCOVERY_EVENTID:
6719 ath12k_fils_discovery_event(ab, skb);
6720 break;
6721 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID:
6722 ath12k_probe_resp_tx_status_event(ab, skb);
6723 break;
6724 /* add Unsupported events here */
6725 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
6726 case WMI_PEER_OPER_MODE_CHANGE_EVENTID:
6727 case WMI_TWT_ENABLE_EVENTID:
6728 case WMI_TWT_DISABLE_EVENTID:
6729 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID:
6730 ath12k_dbg(ab, ATH12K_DBG_WMI,
6731 "ignoring unsupported event 0x%x\n", id);
6732 break;
6733 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID:
6734 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb);
6735 break;
6736 case WMI_VDEV_DELETE_RESP_EVENTID:
6737 ath12k_vdev_delete_resp_event(ab, skb);
6738 break;
6739 /* TODO: Add remaining events */
6740 default:
6741 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id);
6742 break;
6743 }
6744
6745 out:
6746 dev_kfree_skb(skb);
6747 }
6748
ath12k_connect_pdev_htc_service(struct ath12k_base * ab,u32 pdev_idx)6749 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab,
6750 u32 pdev_idx)
6751 {
6752 int status;
6753 u32 svc_id[] = { ATH12K_HTC_SVC_ID_WMI_CONTROL,
6754 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1,
6755 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2 };
6756 struct ath12k_htc_svc_conn_req conn_req = {};
6757 struct ath12k_htc_svc_conn_resp conn_resp = {};
6758
6759 /* these fields are the same for all service endpoints */
6760 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete;
6761 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx;
6762 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits;
6763
6764 /* connect to control service */
6765 conn_req.service_id = svc_id[pdev_idx];
6766
6767 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp);
6768 if (status) {
6769 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n",
6770 status);
6771 return status;
6772 }
6773
6774 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid;
6775 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid;
6776 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len;
6777
6778 return 0;
6779 }
6780
6781 static int
ath12k_wmi_send_unit_test_cmd(struct ath12k * ar,struct wmi_unit_test_cmd ut_cmd,u32 * test_args)6782 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar,
6783 struct wmi_unit_test_cmd ut_cmd,
6784 u32 *test_args)
6785 {
6786 struct ath12k_wmi_pdev *wmi = ar->wmi;
6787 struct wmi_unit_test_cmd *cmd;
6788 struct sk_buff *skb;
6789 struct wmi_tlv *tlv;
6790 void *ptr;
6791 u32 *ut_cmd_args;
6792 int buf_len, arg_len;
6793 int ret;
6794 int i;
6795
6796 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args);
6797 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE;
6798
6799 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
6800 if (!skb)
6801 return -ENOMEM;
6802
6803 cmd = (struct wmi_unit_test_cmd *)skb->data;
6804 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD,
6805 sizeof(ut_cmd));
6806
6807 cmd->vdev_id = ut_cmd.vdev_id;
6808 cmd->module_id = ut_cmd.module_id;
6809 cmd->num_args = ut_cmd.num_args;
6810 cmd->diag_token = ut_cmd.diag_token;
6811
6812 ptr = skb->data + sizeof(ut_cmd);
6813
6814 tlv = ptr;
6815 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
6816
6817 ptr += TLV_HDR_SIZE;
6818
6819 ut_cmd_args = ptr;
6820 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++)
6821 ut_cmd_args[i] = test_args[i];
6822
6823 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
6824 "WMI unit test : module %d vdev %d n_args %d token %d\n",
6825 cmd->module_id, cmd->vdev_id, cmd->num_args,
6826 cmd->diag_token);
6827
6828 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID);
6829
6830 if (ret) {
6831 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n",
6832 ret);
6833 dev_kfree_skb(skb);
6834 }
6835
6836 return ret;
6837 }
6838
ath12k_wmi_simulate_radar(struct ath12k * ar)6839 int ath12k_wmi_simulate_radar(struct ath12k *ar)
6840 {
6841 struct ath12k_vif *arvif;
6842 u32 dfs_args[DFS_MAX_TEST_ARGS];
6843 struct wmi_unit_test_cmd wmi_ut;
6844 bool arvif_found = false;
6845
6846 list_for_each_entry(arvif, &ar->arvifs, list) {
6847 if (arvif->is_started && arvif->vdev_type == WMI_VDEV_TYPE_AP) {
6848 arvif_found = true;
6849 break;
6850 }
6851 }
6852
6853 if (!arvif_found)
6854 return -EINVAL;
6855
6856 dfs_args[DFS_TEST_CMDID] = 0;
6857 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id;
6858 /* Currently we could pass segment_id(b0 - b1), chirp(b2)
6859 * freq offset (b3 - b10) to unit test. For simulation
6860 * purpose this can be set to 0 which is valid.
6861 */
6862 dfs_args[DFS_TEST_RADAR_PARAM] = 0;
6863
6864 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id);
6865 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE);
6866 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS);
6867 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN);
6868
6869 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n");
6870
6871 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args);
6872 }
6873
ath12k_wmi_connect(struct ath12k_base * ab)6874 int ath12k_wmi_connect(struct ath12k_base *ab)
6875 {
6876 u32 i;
6877 u8 wmi_ep_count;
6878
6879 wmi_ep_count = ab->htc.wmi_ep_count;
6880 if (wmi_ep_count > ab->hw_params->max_radios)
6881 return -1;
6882
6883 for (i = 0; i < wmi_ep_count; i++)
6884 ath12k_connect_pdev_htc_service(ab, i);
6885
6886 return 0;
6887 }
6888
ath12k_wmi_pdev_detach(struct ath12k_base * ab,u8 pdev_id)6889 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id)
6890 {
6891 if (WARN_ON(pdev_id >= MAX_RADIOS))
6892 return;
6893
6894 /* TODO: Deinit any pdev specific wmi resource */
6895 }
6896
ath12k_wmi_pdev_attach(struct ath12k_base * ab,u8 pdev_id)6897 int ath12k_wmi_pdev_attach(struct ath12k_base *ab,
6898 u8 pdev_id)
6899 {
6900 struct ath12k_wmi_pdev *wmi_handle;
6901
6902 if (pdev_id >= ab->hw_params->max_radios)
6903 return -EINVAL;
6904
6905 wmi_handle = &ab->wmi_ab.wmi[pdev_id];
6906
6907 wmi_handle->wmi_ab = &ab->wmi_ab;
6908
6909 ab->wmi_ab.ab = ab;
6910 /* TODO: Init remaining resource specific to pdev */
6911
6912 return 0;
6913 }
6914
ath12k_wmi_attach(struct ath12k_base * ab)6915 int ath12k_wmi_attach(struct ath12k_base *ab)
6916 {
6917 int ret;
6918
6919 ret = ath12k_wmi_pdev_attach(ab, 0);
6920 if (ret)
6921 return ret;
6922
6923 ab->wmi_ab.ab = ab;
6924 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX;
6925
6926 /* It's overwritten when service_ext_ready is handled */
6927 if (ab->hw_params->single_pdev_only)
6928 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE;
6929
6930 /* TODO: Init remaining wmi soc resources required */
6931 init_completion(&ab->wmi_ab.service_ready);
6932 init_completion(&ab->wmi_ab.unified_ready);
6933
6934 return 0;
6935 }
6936
ath12k_wmi_detach(struct ath12k_base * ab)6937 void ath12k_wmi_detach(struct ath12k_base *ab)
6938 {
6939 int i;
6940
6941 /* TODO: Deinit wmi resource specific to SOC as required */
6942
6943 for (i = 0; i < ab->htc.wmi_ep_count; i++)
6944 ath12k_wmi_pdev_detach(ab, i);
6945
6946 ath12k_wmi_free_dbring_caps(ab);
6947 }
6948