1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // aw88395_device.h --  AW88395 function for ALSA Audio Driver
4 //
5 // Copyright (c) 2022-2023 AWINIC Technology CO., LTD
6 //
7 // Author: Bruce zhao <zhaolei@awinic.com>
8 //
9 
10 #ifndef __AW88395_DEVICE_FILE_H__
11 #define __AW88395_DEVICE_FILE_H__
12 
13 #include "aw88395.h"
14 #include "aw88395_data_type.h"
15 #include "aw88395_lib.h"
16 
17 #define AW88395_DEV_DEFAULT_CH				(0)
18 #define AW88395_DEV_DSP_CHECK_MAX			(5)
19 #define AW88395_DSP_I2C_WRITES
20 #define AW88395_MAX_RAM_WRITE_BYTE_SIZE		(128)
21 #define AW88395_DSP_ODD_NUM_BIT_TEST			(0x5555)
22 #define AW88395_DSP_EVEN_NUM_BIT_TEST			(0xAAAA)
23 #define AW88395_DSP_ST_CHECK_MAX			(2)
24 #define AW88395_FADE_IN_OUT_DEFAULT			(0)
25 #define AW88395_CALI_RE_MAX				(15000)
26 #define AW88395_CALI_RE_MIN				(4000)
27 #define AW88395_CALI_DELAY_CACL(value)			((value * 32) / 48)
28 
29 #define AW88395_DSP_RE_TO_SHOW_RE(re, shift)		(((re) * (1000)) >> (shift))
30 #define AW88395_SHOW_RE_TO_DSP_RE(re, shift)		(((re) << shift) / (1000))
31 
32 #define AW88395_ACF_FILE				"aw88395_acf.bin"
33 #define AW88395_DEV_SYSST_CHECK_MAX			(10)
34 
35 enum {
36 	AW88395_DEV_VDSEL_DAC = 0,
37 	AW88395_DEV_VDSEL_VSENSE = 1,
38 };
39 
40 enum {
41 	AW88395_DSP_CRC_NA = 0,
42 	AW88395_DSP_CRC_OK = 1,
43 };
44 
45 enum {
46 	AW88395_DSP_FW_UPDATE_OFF = 0,
47 	AW88395_DSP_FW_UPDATE_ON = 1,
48 };
49 
50 enum {
51 	AW88395_FORCE_UPDATE_OFF = 0,
52 	AW88395_FORCE_UPDATE_ON = 1,
53 };
54 
55 enum {
56 	AW88395_1000_US = 1000,
57 	AW88395_2000_US = 2000,
58 	AW88395_3000_US = 3000,
59 	AW88395_4000_US = 4000,
60 	AW88395_5000_US = 5000,
61 	AW88395_10000_US = 10000,
62 	AW88395_100000_US = 100000,
63 };
64 
65 enum {
66 	AW88395_DEV_TYPE_OK = 0,
67 	AW88395_DEV_TYPE_NONE = 1,
68 };
69 
70 
71 enum AW88395_DEV_STATUS {
72 	AW88395_DEV_PW_OFF = 0,
73 	AW88395_DEV_PW_ON,
74 };
75 
76 enum AW88395_DEV_FW_STATUS {
77 	AW88395_DEV_FW_FAILED = 0,
78 	AW88395_DEV_FW_OK,
79 };
80 
81 enum AW88395_DEV_MEMCLK {
82 	AW88395_DEV_MEMCLK_OSC = 0,
83 	AW88395_DEV_MEMCLK_PLL = 1,
84 };
85 
86 enum AW88395_DEV_DSP_CFG {
87 	AW88395_DEV_DSP_WORK = 0,
88 	AW88395_DEV_DSP_BYPASS = 1,
89 };
90 
91 enum {
92 	AW88395_DSP_16_DATA = 0,
93 	AW88395_DSP_32_DATA = 1,
94 };
95 
96 enum {
97 	AW88395_NOT_RCV_MODE = 0,
98 	AW88395_RCV_MODE = 1,
99 };
100 
101 struct aw_profctrl_desc {
102 	unsigned int cur_mode;
103 };
104 
105 struct aw_volume_desc {
106 	unsigned int init_volume;
107 	unsigned int mute_volume;
108 	unsigned int ctl_volume;
109 	unsigned int max_volume;
110 };
111 
112 struct aw_dsp_mem_desc {
113 	unsigned int dsp_madd_reg;
114 	unsigned int dsp_mdat_reg;
115 	unsigned int dsp_fw_base_addr;
116 	unsigned int dsp_cfg_base_addr;
117 };
118 
119 struct aw_vmax_desc {
120 	unsigned int init_vmax;
121 };
122 
123 struct aw_cali_delay_desc {
124 	unsigned int delay;
125 };
126 
127 struct aw_cali_desc {
128 	u32 cali_re;
129 	u32 ra;
130 };
131 
132 struct aw_container {
133 	int len;
134 	u8 data[];
135 };
136 
137 struct aw_device {
138 	int status;
139 	struct mutex dsp_lock;
140 
141 	unsigned char prof_cur;
142 	unsigned char prof_index;
143 	unsigned char dsp_crc_st;
144 	u16 chip_id;
145 
146 	unsigned int channel;
147 	unsigned int fade_step;
148 
149 	struct i2c_client *i2c;
150 	struct device *dev;
151 	struct regmap *regmap;
152 	char *acf;
153 
154 	u32 fade_en;
155 	unsigned char dsp_cfg;
156 
157 	u32 dsp_fw_len;
158 	u32 dsp_cfg_len;
159 	u8 platform;
160 	u8 fw_status;
161 
162 	unsigned int fade_in_time;
163 	unsigned int fade_out_time;
164 
165 	struct aw_prof_info prof_info;
166 	struct aw_sec_data_desc crc_dsp_cfg;
167 	struct aw_profctrl_desc profctrl_desc;
168 	struct aw_volume_desc volume_desc;
169 	struct aw_dsp_mem_desc dsp_mem_desc;
170 	struct aw_vmax_desc vmax_desc;
171 
172 	struct aw_cali_delay_desc cali_delay_desc;
173 	struct aw_cali_desc cali_desc;
174 
175 };
176 
177 int aw88395_init(struct aw_device **aw_dev, struct i2c_client *i2c, struct regmap *regmap);
178 int aw88395_dev_init(struct aw_device *aw_dev, struct aw_container *aw_cfg);
179 int aw88395_dev_start(struct aw_device *aw_dev);
180 int aw88395_dev_stop(struct aw_device *aw_dev);
181 int aw88395_dev_fw_update(struct aw_device *aw_dev, bool up_dsp_fw_en, bool force_up_en);
182 
183 void aw88395_dev_set_volume(struct aw_device *aw_dev, unsigned short set_vol);
184 int aw88395_dev_get_prof_data(struct aw_device *aw_dev, int index,
185 			struct aw_prof_desc **prof_desc);
186 char *aw88395_dev_get_prof_name(struct aw_device *aw_dev, int index);
187 int aw88395_dev_set_profile_index(struct aw_device *aw_dev, int index);
188 int aw88395_dev_get_profile_index(struct aw_device *aw_dev);
189 int aw88395_dev_get_profile_count(struct aw_device *aw_dev);
190 int aw88395_dev_load_acf_check(struct aw_device *aw_dev, struct aw_container *aw_cfg);
191 int aw88395_dev_cfg_load(struct aw_device *aw_dev, struct aw_container *aw_cfg);
192 void aw88395_dev_mute(struct aw_device *aw_dev, bool is_mute);
193 
194 #endif
195