xref: /openbmc/linux/drivers/usb/gadget/udc/net2280.h (revision b42e8090)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * NetChip 2280 high/full speed USB device controller.
4  * Unlike many such controllers, this one talks PCI.
5  */
6 
7 /*
8  * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com)
9  * Copyright (C) 2003 David Brownell
10  * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
11  */
12 
13 #include <linux/usb/net2280.h>
14 #include <linux/usb/usb338x.h>
15 
16 /*-------------------------------------------------------------------------*/
17 
18 #ifdef	__KERNEL__
19 
20 /* indexed registers [11.10] are accessed indirectly
21  * caller must own the device lock.
22  */
23 
get_idx_reg(struct net2280_regs __iomem * regs,u32 index)24 static inline u32 get_idx_reg(struct net2280_regs __iomem *regs, u32 index)
25 {
26 	writel(index, &regs->idxaddr);
27 	/* NOTE:  synchs device/cpu memory views */
28 	return readl(&regs->idxdata);
29 }
30 
31 static inline void
set_idx_reg(struct net2280_regs __iomem * regs,u32 index,u32 value)32 set_idx_reg(struct net2280_regs __iomem *regs, u32 index, u32 value)
33 {
34 	writel(index, &regs->idxaddr);
35 	writel(value, &regs->idxdata);
36 	/* posted, may not be visible yet */
37 }
38 
39 #endif	/* __KERNEL__ */
40 
41 #define PCI_VENDOR_ID_PLX_LEGACY 0x17cc
42 
43 #define PLX_LEGACY		BIT(0)
44 #define PLX_2280		BIT(1)
45 #define PLX_SUPERSPEED		BIT(2)
46 #define PLX_PCIE		BIT(3)
47 
48 #define REG_DIAG		0x0
49 #define     RETRY_COUNTER                                       16
50 #define     FORCE_PCI_SERR                                      11
51 #define     FORCE_PCI_INTERRUPT                                 10
52 #define     FORCE_USB_INTERRUPT                                 9
53 #define     FORCE_CPU_INTERRUPT                                 8
54 #define     ILLEGAL_BYTE_ENABLES                                5
55 #define     FAST_TIMES                                          4
56 #define     FORCE_RECEIVE_ERROR                                 2
57 #define     FORCE_TRANSMIT_CRC_ERROR                            0
58 #define REG_FRAME		0x02	/* from last sof */
59 #define REG_CHIPREV		0x03	/* in bcd */
60 #define	REG_HS_NAK_RATE		0x0a	/* NAK per N uframes */
61 
62 #define	CHIPREV_1	0x0100
63 #define	CHIPREV_1A	0x0110
64 
65 /* DEFECT 7374 */
66 #define DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS         200
67 #define DEFECT_7374_PROCESSOR_WAIT_TIME             10
68 
69 /* ep0 max packet size */
70 #define EP0_SS_MAX_PACKET_SIZE  0x200
71 #define EP0_HS_MAX_PACKET_SIZE  0x40
72 #ifdef	__KERNEL__
73 
74 /*-------------------------------------------------------------------------*/
75 
76 /* [8.3] for scatter/gather i/o
77  * use struct net2280_dma_regs bitfields
78  */
79 struct net2280_dma {
80 	__le32		dmacount;
81 	__le32		dmaaddr;		/* the buffer */
82 	__le32		dmadesc;		/* next dma descriptor */
83 	__le32		_reserved;
84 } __aligned(16);
85 
86 /*-------------------------------------------------------------------------*/
87 
88 /* DRIVER DATA STRUCTURES and UTILITIES */
89 
90 struct net2280_ep {
91 	struct usb_ep				ep;
92 	struct net2280_ep_regs __iomem *cfg;
93 	struct net2280_ep_regs			__iomem *regs;
94 	struct net2280_dma_regs			__iomem *dma;
95 	struct net2280_dma			*dummy;
96 	dma_addr_t				td_dma;	/* of dummy */
97 	struct net2280				*dev;
98 	unsigned long				irqs;
99 
100 	/* analogous to a host-side qh */
101 	struct list_head			queue;
102 	const struct usb_endpoint_descriptor	*desc;
103 	unsigned				num : 8,
104 						fifo_size : 12,
105 						in_fifo_validate : 1,
106 						out_overflow : 1,
107 						stopped : 1,
108 						wedged : 1,
109 						is_in : 1,
110 						is_iso : 1,
111 						responded : 1;
112 };
113 
allow_status(struct net2280_ep * ep)114 static inline void allow_status(struct net2280_ep *ep)
115 {
116 	/* ep0 only */
117 	writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
118 		BIT(CLEAR_NAK_OUT_PACKETS) |
119 		BIT(CLEAR_NAK_OUT_PACKETS_MODE),
120 		&ep->regs->ep_rsp);
121 	ep->stopped = 1;
122 }
123 
allow_status_338x(struct net2280_ep * ep)124 static inline void allow_status_338x(struct net2280_ep *ep)
125 {
126 	/*
127 	 * Control Status Phase Handshake was set by the chip when the setup
128 	 * packet arrived. While set, the chip automatically NAKs the host's
129 	 * Status Phase tokens.
130 	 */
131 	writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE), &ep->regs->ep_rsp);
132 
133 	ep->stopped = 1;
134 
135 	/* TD 9.9 Halt Endpoint test.  TD 9.22 set feature test. */
136 	ep->responded = 0;
137 }
138 
139 struct net2280_request {
140 	struct usb_request		req;
141 	struct net2280_dma		*td;
142 	dma_addr_t			td_dma;
143 	struct list_head		queue;
144 	unsigned			mapped : 1,
145 					valid : 1;
146 };
147 
148 struct net2280 {
149 	/* each pci device provides one gadget, several endpoints */
150 	struct usb_gadget		gadget;
151 	spinlock_t			lock;
152 	struct net2280_ep		ep[9];
153 	struct usb_gadget_driver	*driver;
154 	unsigned			enabled : 1,
155 					protocol_stall : 1,
156 					softconnect : 1,
157 					got_irq : 1,
158 					region:1,
159 					added:1,
160 					u1_enable:1,
161 					u2_enable:1,
162 					ltm_enable:1,
163 					wakeup_enable:1,
164 					addressed_state:1,
165 					async_callbacks:1,
166 					bug7734_patched:1;
167 	u16				chiprev;
168 	int enhanced_mode;
169 	int n_ep;
170 	kernel_ulong_t			quirks;
171 
172 
173 	/* pci state used to access those endpoints */
174 	struct pci_dev			*pdev;
175 	struct net2280_regs		__iomem *regs;
176 	struct net2280_usb_regs		__iomem *usb;
177 	struct usb338x_usb_ext_regs	__iomem *usb_ext;
178 	struct net2280_pci_regs		__iomem *pci;
179 	struct net2280_dma_regs		__iomem *dma;
180 	struct net2280_dep_regs		__iomem *dep;
181 	struct net2280_ep_regs		__iomem *epregs;
182 	struct usb338x_ll_regs		__iomem *llregs;
183 	struct usb338x_pl_regs		__iomem *plregs;
184 
185 	struct dma_pool			*requests;
186 	/* statistics...*/
187 };
188 
set_halt(struct net2280_ep * ep)189 static inline void set_halt(struct net2280_ep *ep)
190 {
191 	/* ep0 and bulk/intr endpoints */
192 	writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
193 		/* set NAK_OUT for erratum 0114 */
194 		((ep->dev->chiprev == CHIPREV_1) << SET_NAK_OUT_PACKETS) |
195 		BIT(SET_ENDPOINT_HALT),
196 		&ep->regs->ep_rsp);
197 }
198 
clear_halt(struct net2280_ep * ep)199 static inline void clear_halt(struct net2280_ep *ep)
200 {
201 	/* ep0 and bulk/intr endpoints */
202 	writel(BIT(CLEAR_ENDPOINT_HALT) |
203 		BIT(CLEAR_ENDPOINT_TOGGLE) |
204 		    /*
205 		     * unless the gadget driver left a short packet in the
206 		     * fifo, this reverses the erratum 0114 workaround.
207 		     */
208 		((ep->dev->chiprev == CHIPREV_1) << CLEAR_NAK_OUT_PACKETS),
209 		&ep->regs->ep_rsp);
210 }
211 
212 /*
213  * FSM value for Defect 7374 (U1U2 Test) is managed in
214  * chip's SCRATCH register:
215  */
216 #define DEFECT7374_FSM_FIELD    28
217 
218 /* Waiting for Control Read:
219  *  - A transition to this state indicates a fresh USB connection,
220  *    before the first Setup Packet. The connection speed is not
221  *    known. Firmware is waiting for the first Control Read.
222  *  - Starting state: This state can be thought of as the FSM's typical
223  *    starting state.
224  *  - Tip: Upon the first SS Control Read the FSM never
225  *    returns to this state.
226  */
227 #define DEFECT7374_FSM_WAITING_FOR_CONTROL_READ BIT(DEFECT7374_FSM_FIELD)
228 
229 /* Non-SS Control Read:
230  *  - A transition to this state indicates detection of the first HS
231  *    or FS Control Read.
232  *  - Tip: Upon the first SS Control Read the FSM never
233  *    returns to this state.
234  */
235 #define	DEFECT7374_FSM_NON_SS_CONTROL_READ (2 << DEFECT7374_FSM_FIELD)
236 
237 /* SS Control Read:
238  *  - A transition to this state indicates detection of the
239  *    first SS Control Read.
240  *  - This state indicates workaround completion. Workarounds no longer
241  *    need to be applied (as long as the chip remains powered up).
242  *  - Tip: Once in this state the FSM state does not change (until
243  *    the chip's power is lost and restored).
244  *  - This can be thought of as the final state of the FSM;
245  *    the FSM 'locks-up' in this state until the chip loses power.
246  */
247 #define DEFECT7374_FSM_SS_CONTROL_READ (3 << DEFECT7374_FSM_FIELD)
248 
249 #ifdef USE_RDK_LEDS
250 
net2280_led_init(struct net2280 * dev)251 static inline void net2280_led_init(struct net2280 *dev)
252 {
253 	/* LED3 (green) is on during USB activity. note erratum 0113. */
254 	writel(BIT(GPIO3_LED_SELECT) |
255 		BIT(GPIO3_OUTPUT_ENABLE) |
256 		BIT(GPIO2_OUTPUT_ENABLE) |
257 		BIT(GPIO1_OUTPUT_ENABLE) |
258 		BIT(GPIO0_OUTPUT_ENABLE),
259 		&dev->regs->gpioctl);
260 }
261 
262 /* indicate speed with bi-color LED 0/1 */
263 static inline
net2280_led_speed(struct net2280 * dev,enum usb_device_speed speed)264 void net2280_led_speed(struct net2280 *dev, enum usb_device_speed speed)
265 {
266 	u32	val = readl(&dev->regs->gpioctl);
267 	switch (speed) {
268 	case USB_SPEED_SUPER:		/* green + red */
269 		val |= BIT(GPIO0_DATA) | BIT(GPIO1_DATA);
270 		break;
271 	case USB_SPEED_HIGH:		/* green */
272 		val &= ~BIT(GPIO0_DATA);
273 		val |= BIT(GPIO1_DATA);
274 		break;
275 	case USB_SPEED_FULL:		/* red */
276 		val &= ~BIT(GPIO1_DATA);
277 		val |= BIT(GPIO0_DATA);
278 		break;
279 	default:			/* (off/black) */
280 		val &= ~(BIT(GPIO1_DATA) | BIT(GPIO0_DATA));
281 		break;
282 	}
283 	writel(val, &dev->regs->gpioctl);
284 }
285 
286 /* indicate power with LED 2 */
net2280_led_active(struct net2280 * dev,int is_active)287 static inline void net2280_led_active(struct net2280 *dev, int is_active)
288 {
289 	u32	val = readl(&dev->regs->gpioctl);
290 
291 	/* FIXME this LED never seems to turn on.*/
292 	if (is_active)
293 		val |= GPIO2_DATA;
294 	else
295 		val &= ~GPIO2_DATA;
296 	writel(val, &dev->regs->gpioctl);
297 }
298 
net2280_led_shutdown(struct net2280 * dev)299 static inline void net2280_led_shutdown(struct net2280 *dev)
300 {
301 	/* turn off all four GPIO*_DATA bits */
302 	writel(readl(&dev->regs->gpioctl) & ~0x0f,
303 			&dev->regs->gpioctl);
304 }
305 
306 #else
307 
308 #define net2280_led_init(dev)		do { } while (0)
309 #define net2280_led_speed(dev, speed)	do { } while (0)
310 #define net2280_led_shutdown(dev)	do { } while (0)
311 
312 #endif
313 
314 /*-------------------------------------------------------------------------*/
315 
316 #define ep_dbg(ndev, fmt, args...) \
317 	dev_dbg((&((ndev)->pdev->dev)), fmt, ##args)
318 
319 #define ep_vdbg(ndev, fmt, args...) \
320 	dev_vdbg((&((ndev)->pdev->dev)), fmt, ##args)
321 
322 #define ep_info(ndev, fmt, args...) \
323 	dev_info((&((ndev)->pdev->dev)), fmt, ##args)
324 
325 #define ep_warn(ndev, fmt, args...) \
326 	dev_warn((&((ndev)->pdev->dev)), fmt, ##args)
327 
328 #define ep_err(ndev, fmt, args...) \
329 	dev_err((&((ndev)->pdev->dev)), fmt, ##args)
330 
331 /*-------------------------------------------------------------------------*/
332 
set_fifo_bytecount(struct net2280_ep * ep,unsigned count)333 static inline void set_fifo_bytecount(struct net2280_ep *ep, unsigned count)
334 {
335 	if (ep->dev->pdev->vendor == 0x17cc)
336 		writeb(count, 2 + (u8 __iomem *) &ep->regs->ep_cfg);
337 	else{
338 		u32 tmp = readl(&ep->cfg->ep_cfg) &
339 					(~(0x07 << EP_FIFO_BYTE_COUNT));
340 		writel(tmp | (count << EP_FIFO_BYTE_COUNT), &ep->cfg->ep_cfg);
341 	}
342 }
343 
start_out_naking(struct net2280_ep * ep)344 static inline void start_out_naking(struct net2280_ep *ep)
345 {
346 	/* NOTE:  hardware races lurk here, and PING protocol issues */
347 	writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
348 	/* synch with device */
349 	readl(&ep->regs->ep_rsp);
350 }
351 
stop_out_naking(struct net2280_ep * ep)352 static inline void stop_out_naking(struct net2280_ep *ep)
353 {
354 	u32	tmp;
355 
356 	tmp = readl(&ep->regs->ep_stat);
357 	if ((tmp & BIT(NAK_OUT_PACKETS)) != 0)
358 		writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
359 }
360 
361 
set_max_speed(struct net2280_ep * ep,u32 max)362 static inline void set_max_speed(struct net2280_ep *ep, u32 max)
363 {
364 	u32 reg;
365 	static const u32 ep_enhanced[9] = { 0x10, 0x60, 0x30, 0x80,
366 					  0x50, 0x20, 0x70, 0x40, 0x90 };
367 
368 	if (ep->dev->enhanced_mode) {
369 		reg = ep_enhanced[ep->num];
370 		switch (ep->dev->gadget.speed) {
371 		case USB_SPEED_SUPER:
372 			reg += 2;
373 			break;
374 		case USB_SPEED_FULL:
375 			reg += 1;
376 			break;
377 		case USB_SPEED_HIGH:
378 		default:
379 			break;
380 		}
381 	} else {
382 		reg = (ep->num + 1) * 0x10;
383 		if (ep->dev->gadget.speed != USB_SPEED_HIGH)
384 			reg += 1;
385 	}
386 
387 	set_idx_reg(ep->dev->regs, reg, max);
388 }
389 
390 #endif	/* __KERNEL__ */
391