xref: /openbmc/qemu/tests/tcg/hexagon/v68_scalar.c (revision 860132e2)
1 /*
2  *  Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
3  *
4  *  This program is free software; you can redistribute it and/or modify
5  *  it under the terms of the GNU General Public License as published by
6  *  the Free Software Foundation; either version 2 of the License, or
7  *  (at your option) any later version.
8  *
9  *  This program is distributed in the hope that it will be useful,
10  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
11  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  *  GNU General Public License for more details.
13  *
14  *  You should have received a copy of the GNU General Public License
15  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #include <stdio.h>
19 #include <stdbool.h>
20 #include <stdint.h>
21 
22 /*
23  *  Test the scalar core instructions that are new in v68
24  */
25 
26 int err;
27 
28 static int buffer32[] = { 1, 2, 3, 4 };
29 static long long buffer64[] = { 5, 6, 7, 8 };
30 
__check32(int line,uint32_t result,uint32_t expect)31 static void __check32(int line, uint32_t result, uint32_t expect)
32 {
33     if (result != expect) {
34         printf("ERROR at line %d: 0x%08x != 0x%08x\n",
35                line, result, expect);
36         err++;
37     }
38 }
39 
40 #define check32(RES, EXP) __check32(__LINE__, RES, EXP)
41 
__check64(int line,uint64_t result,uint64_t expect)42 static void __check64(int line, uint64_t result, uint64_t expect)
43 {
44     if (result != expect) {
45         printf("ERROR at line %d: 0x%016llx != 0x%016llx\n",
46                line, result, expect);
47         err++;
48     }
49 }
50 
51 #define check64(RES, EXP) __check64(__LINE__, RES, EXP)
52 
loadw_aq(int * p)53 static inline int loadw_aq(int *p)
54 {
55     int res;
56     asm volatile("%0 = memw_aq(%1)\n\t"
57                  : "=r"(res) : "r"(p));
58     return res;
59 }
60 
test_loadw_aq(void)61 static void test_loadw_aq(void)
62 {
63     int res;
64 
65     res = loadw_aq(&buffer32[0]);
66     check32(res, 1);
67     res = loadw_aq(&buffer32[1]);
68     check32(res, 2);
69 }
70 
loadd_aq(long long * p)71 static inline long long loadd_aq(long long *p)
72 {
73     long long res;
74     asm volatile("%0 = memd_aq(%1)\n\t"
75                  : "=r"(res) : "r"(p));
76     return res;
77 }
78 
test_loadd_aq(void)79 static void test_loadd_aq(void)
80 {
81     long long res;
82 
83     res = loadd_aq(&buffer64[2]);
84     check64(res, 7);
85     res = loadd_aq(&buffer64[3]);
86     check64(res, 8);
87 }
88 
release_at(int * p)89 static inline void release_at(int *p)
90 {
91     asm volatile("release(%0):at\n\t"
92                  : : "r"(p));
93 }
94 
test_release_at(void)95 static void test_release_at(void)
96 {
97     release_at(&buffer32[2]);
98     check64(buffer32[2], 3);
99     release_at(&buffer32[3]);
100     check64(buffer32[3], 4);
101 }
102 
release_st(int * p)103 static inline void release_st(int *p)
104 {
105     asm volatile("release(%0):st\n\t"
106                  : : "r"(p));
107 }
108 
test_release_st(void)109 static void test_release_st(void)
110 {
111     release_st(&buffer32[2]);
112     check64(buffer32[2], 3);
113     release_st(&buffer32[3]);
114     check64(buffer32[3], 4);
115 }
116 
storew_rl_at(int * p,int val)117 static inline void storew_rl_at(int *p, int val)
118 {
119     asm volatile("memw_rl(%0):at = %1\n\t"
120                  : : "r"(p), "r"(val) : "memory");
121 }
122 
test_storew_rl_at(void)123 static void test_storew_rl_at(void)
124 {
125     storew_rl_at(&buffer32[2], 9);
126     check64(buffer32[2], 9);
127     storew_rl_at(&buffer32[3], 10);
128     check64(buffer32[3], 10);
129 }
130 
stored_rl_at(long long * p,long long val)131 static inline void stored_rl_at(long long *p, long long val)
132 {
133     asm volatile("memd_rl(%0):at = %1\n\t"
134                  : : "r"(p), "r"(val) : "memory");
135 }
136 
test_stored_rl_at(void)137 static void test_stored_rl_at(void)
138 {
139     stored_rl_at(&buffer64[2], 11);
140     check64(buffer64[2], 11);
141     stored_rl_at(&buffer64[3], 12);
142     check64(buffer64[3], 12);
143 }
144 
storew_rl_st(int * p,int val)145 static inline void storew_rl_st(int *p, int val)
146 {
147     asm volatile("memw_rl(%0):st = %1\n\t"
148                  : : "r"(p), "r"(val) : "memory");
149 }
150 
test_storew_rl_st(void)151 static void test_storew_rl_st(void)
152 {
153     storew_rl_st(&buffer32[0], 13);
154     check64(buffer32[0], 13);
155     storew_rl_st(&buffer32[1], 14);
156     check64(buffer32[1], 14);
157 }
158 
stored_rl_st(long long * p,long long val)159 static inline void stored_rl_st(long long *p, long long val)
160 {
161     asm volatile("memd_rl(%0):st = %1\n\t"
162                  : : "r"(p), "r"(val) : "memory");
163 }
164 
test_stored_rl_st(void)165 static void test_stored_rl_st(void)
166 {
167     stored_rl_st(&buffer64[0], 15);
168     check64(buffer64[0], 15);
169     stored_rl_st(&buffer64[1], 15);
170     check64(buffer64[1], 15);
171 }
172 
main()173 int main()
174 {
175     test_loadw_aq();
176     test_loadd_aq();
177     test_release_at();
178     test_release_st();
179     test_storew_rl_at();
180     test_stored_rl_at();
181     test_storew_rl_st();
182     test_stored_rl_st();
183 
184     puts(err ? "FAIL" : "PASS");
185     return err ? 1 : 0;
186 }
187