xref: /openbmc/linux/sound/soc/intel/avs/ipc.c (revision 44ad3baf1cca483e418b6aadf2d3994f69e0f16a)
1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
4 //
5 // Authors: Cezary Rojewski <cezary.rojewski@intel.com>
6 //          Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
7 //
8 
9 #include <linux/io-64-nonatomic-lo-hi.h>
10 #include <linux/slab.h>
11 #include <sound/hdaudio_ext.h>
12 #include "avs.h"
13 #include "messages.h"
14 #include "registers.h"
15 #include "trace.h"
16 
17 #define AVS_IPC_TIMEOUT_MS	300
18 #define AVS_D0IX_DELAY_MS	300
19 
20 static int
avs_dsp_set_d0ix(struct avs_dev * adev,bool enable)21 avs_dsp_set_d0ix(struct avs_dev *adev, bool enable)
22 {
23 	struct avs_ipc *ipc = adev->ipc;
24 	int ret;
25 
26 	/* Is transition required? */
27 	if (ipc->in_d0ix == enable)
28 		return 0;
29 
30 	ret = avs_dsp_op(adev, set_d0ix, enable);
31 	if (ret) {
32 		/* Prevent further d0ix attempts on conscious IPC failure. */
33 		if (ret == -AVS_EIPC)
34 			atomic_inc(&ipc->d0ix_disable_depth);
35 
36 		ipc->in_d0ix = false;
37 		return ret;
38 	}
39 
40 	ipc->in_d0ix = enable;
41 	return 0;
42 }
43 
avs_dsp_schedule_d0ix(struct avs_dev * adev,struct avs_ipc_msg * tx)44 static void avs_dsp_schedule_d0ix(struct avs_dev *adev, struct avs_ipc_msg *tx)
45 {
46 	if (atomic_read(&adev->ipc->d0ix_disable_depth))
47 		return;
48 
49 	mod_delayed_work(system_power_efficient_wq, &adev->ipc->d0ix_work,
50 			 msecs_to_jiffies(AVS_D0IX_DELAY_MS));
51 }
52 
avs_dsp_d0ix_work(struct work_struct * work)53 static void avs_dsp_d0ix_work(struct work_struct *work)
54 {
55 	struct avs_ipc *ipc = container_of(work, struct avs_ipc, d0ix_work.work);
56 
57 	avs_dsp_set_d0ix(to_avs_dev(ipc->dev), true);
58 }
59 
avs_dsp_wake_d0i0(struct avs_dev * adev,struct avs_ipc_msg * tx)60 static int avs_dsp_wake_d0i0(struct avs_dev *adev, struct avs_ipc_msg *tx)
61 {
62 	struct avs_ipc *ipc = adev->ipc;
63 
64 	if (!atomic_read(&ipc->d0ix_disable_depth)) {
65 		cancel_delayed_work_sync(&ipc->d0ix_work);
66 		return avs_dsp_set_d0ix(adev, false);
67 	}
68 
69 	return 0;
70 }
71 
avs_dsp_disable_d0ix(struct avs_dev * adev)72 int avs_dsp_disable_d0ix(struct avs_dev *adev)
73 {
74 	struct avs_ipc *ipc = adev->ipc;
75 
76 	/* Prevent PG only on the first disable. */
77 	if (atomic_inc_return(&ipc->d0ix_disable_depth) == 1) {
78 		cancel_delayed_work_sync(&ipc->d0ix_work);
79 		return avs_dsp_set_d0ix(adev, false);
80 	}
81 
82 	return 0;
83 }
84 
avs_dsp_enable_d0ix(struct avs_dev * adev)85 int avs_dsp_enable_d0ix(struct avs_dev *adev)
86 {
87 	struct avs_ipc *ipc = adev->ipc;
88 
89 	if (atomic_dec_and_test(&ipc->d0ix_disable_depth))
90 		queue_delayed_work(system_power_efficient_wq, &ipc->d0ix_work,
91 				   msecs_to_jiffies(AVS_D0IX_DELAY_MS));
92 	return 0;
93 }
94 
avs_dsp_recovery(struct avs_dev * adev)95 static void avs_dsp_recovery(struct avs_dev *adev)
96 {
97 	struct avs_soc_component *acomp;
98 	unsigned int core_mask;
99 	int ret;
100 
101 	mutex_lock(&adev->comp_list_mutex);
102 	/* disconnect all running streams */
103 	list_for_each_entry(acomp, &adev->comp_list, node) {
104 		struct snd_soc_pcm_runtime *rtd;
105 		struct snd_soc_card *card;
106 
107 		card = acomp->base.card;
108 		if (!card)
109 			continue;
110 
111 		for_each_card_rtds(card, rtd) {
112 			struct snd_pcm *pcm;
113 			int dir;
114 
115 			pcm = rtd->pcm;
116 			if (!pcm || rtd->dai_link->no_pcm)
117 				continue;
118 
119 			for_each_pcm_streams(dir) {
120 				struct snd_pcm_substream *substream;
121 
122 				substream = pcm->streams[dir].substream;
123 				if (!substream || !substream->runtime)
124 					continue;
125 
126 				/* No need for _irq() as we are in nonatomic context. */
127 				snd_pcm_stream_lock(substream);
128 				snd_pcm_stop(substream, SNDRV_PCM_STATE_DISCONNECTED);
129 				snd_pcm_stream_unlock(substream);
130 			}
131 		}
132 	}
133 	mutex_unlock(&adev->comp_list_mutex);
134 
135 	/* forcibly shutdown all cores */
136 	core_mask = GENMASK(adev->hw_cfg.dsp_cores - 1, 0);
137 	avs_dsp_core_disable(adev, core_mask);
138 
139 	/* attempt dsp reboot */
140 	ret = avs_dsp_boot_firmware(adev, true);
141 	if (ret < 0)
142 		dev_err(adev->dev, "dsp reboot failed: %d\n", ret);
143 
144 	pm_runtime_mark_last_busy(adev->dev);
145 	pm_runtime_enable(adev->dev);
146 	pm_request_autosuspend(adev->dev);
147 
148 	atomic_set(&adev->ipc->recovering, 0);
149 }
150 
avs_dsp_recovery_work(struct work_struct * work)151 static void avs_dsp_recovery_work(struct work_struct *work)
152 {
153 	struct avs_ipc *ipc = container_of(work, struct avs_ipc, recovery_work);
154 
155 	avs_dsp_recovery(to_avs_dev(ipc->dev));
156 }
157 
avs_dsp_exception_caught(struct avs_dev * adev,union avs_notify_msg * msg)158 static void avs_dsp_exception_caught(struct avs_dev *adev, union avs_notify_msg *msg)
159 {
160 	struct avs_ipc *ipc = adev->ipc;
161 
162 	/* Account for the double-exception case. */
163 	ipc->ready = false;
164 
165 	if (!atomic_add_unless(&ipc->recovering, 1, 1)) {
166 		dev_err(adev->dev, "dsp recovery is already in progress\n");
167 		return;
168 	}
169 
170 	dev_crit(adev->dev, "communication severed, rebooting dsp..\n");
171 
172 	/* Avoid deadlock as the exception may be the response to SET_D0IX. */
173 	if (current_work() != &ipc->d0ix_work.work)
174 		cancel_delayed_work_sync(&ipc->d0ix_work);
175 	ipc->in_d0ix = false;
176 	/* Re-enabled on recovery completion. */
177 	pm_runtime_disable(adev->dev);
178 
179 	/* Process received notification. */
180 	avs_dsp_op(adev, coredump, msg);
181 
182 	schedule_work(&ipc->recovery_work);
183 }
184 
avs_dsp_receive_rx(struct avs_dev * adev,u64 header)185 static void avs_dsp_receive_rx(struct avs_dev *adev, u64 header)
186 {
187 	struct avs_ipc *ipc = adev->ipc;
188 	union avs_reply_msg msg = AVS_MSG(header);
189 	u64 reg;
190 
191 	reg = readq(avs_sram_addr(adev, AVS_FW_REGS_WINDOW));
192 	trace_avs_ipc_reply_msg(header, reg);
193 
194 	ipc->rx.header = header;
195 	/* Abort copying payload if request processing was unsuccessful. */
196 	if (!msg.status) {
197 		/* update size in case of LARGE_CONFIG_GET */
198 		if (msg.msg_target == AVS_MOD_MSG &&
199 		    msg.global_msg_type == AVS_MOD_LARGE_CONFIG_GET)
200 			ipc->rx.size = min_t(u32, AVS_MAILBOX_SIZE,
201 					     msg.ext.large_config.data_off_size);
202 
203 		memcpy_fromio(ipc->rx.data, avs_uplink_addr(adev), ipc->rx.size);
204 		trace_avs_msg_payload(ipc->rx.data, ipc->rx.size);
205 	}
206 }
207 
avs_dsp_process_notification(struct avs_dev * adev,u64 header)208 static void avs_dsp_process_notification(struct avs_dev *adev, u64 header)
209 {
210 	struct avs_notify_mod_data mod_data;
211 	union avs_notify_msg msg = AVS_MSG(header);
212 	size_t data_size = 0;
213 	void *data = NULL;
214 	u64 reg;
215 
216 	reg = readq(avs_sram_addr(adev, AVS_FW_REGS_WINDOW));
217 	trace_avs_ipc_notify_msg(header, reg);
218 
219 	/* Ignore spurious notifications until handshake is established. */
220 	if (!adev->ipc->ready && msg.notify_msg_type != AVS_NOTIFY_FW_READY) {
221 		dev_dbg(adev->dev, "FW not ready, skip notification: 0x%08x\n", msg.primary);
222 		return;
223 	}
224 
225 	/* Calculate notification payload size. */
226 	switch (msg.notify_msg_type) {
227 	case AVS_NOTIFY_FW_READY:
228 		break;
229 
230 	case AVS_NOTIFY_PHRASE_DETECTED:
231 		data_size = sizeof(struct avs_notify_voice_data);
232 		break;
233 
234 	case AVS_NOTIFY_RESOURCE_EVENT:
235 		data_size = sizeof(struct avs_notify_res_data);
236 		break;
237 
238 	case AVS_NOTIFY_LOG_BUFFER_STATUS:
239 	case AVS_NOTIFY_EXCEPTION_CAUGHT:
240 		break;
241 
242 	case AVS_NOTIFY_MODULE_EVENT:
243 		/* To know the total payload size, header needs to be read first. */
244 		memcpy_fromio(&mod_data, avs_uplink_addr(adev), sizeof(mod_data));
245 		data_size = sizeof(mod_data) + mod_data.data_size;
246 		break;
247 
248 	default:
249 		dev_info(adev->dev, "unknown notification: 0x%08x\n", msg.primary);
250 		break;
251 	}
252 
253 	if (data_size) {
254 		data = kmalloc(data_size, GFP_KERNEL);
255 		if (!data)
256 			return;
257 
258 		memcpy_fromio(data, avs_uplink_addr(adev), data_size);
259 		trace_avs_msg_payload(data, data_size);
260 	}
261 
262 	/* Perform notification-specific operations. */
263 	switch (msg.notify_msg_type) {
264 	case AVS_NOTIFY_FW_READY:
265 		dev_dbg(adev->dev, "FW READY 0x%08x\n", msg.primary);
266 		adev->ipc->ready = true;
267 		complete(&adev->fw_ready);
268 		break;
269 
270 	case AVS_NOTIFY_LOG_BUFFER_STATUS:
271 		avs_log_buffer_status_locked(adev, &msg);
272 		break;
273 
274 	case AVS_NOTIFY_EXCEPTION_CAUGHT:
275 		avs_dsp_exception_caught(adev, &msg);
276 		break;
277 
278 	default:
279 		break;
280 	}
281 
282 	kfree(data);
283 }
284 
avs_dsp_process_response(struct avs_dev * adev,u64 header)285 void avs_dsp_process_response(struct avs_dev *adev, u64 header)
286 {
287 	struct avs_ipc *ipc = adev->ipc;
288 
289 	/*
290 	 * Response may either be solicited - a reply for a request that has
291 	 * been sent beforehand - or unsolicited (notification).
292 	 */
293 	if (avs_msg_is_reply(header)) {
294 		/* Response processing is invoked from IRQ thread. */
295 		spin_lock_irq(&ipc->rx_lock);
296 		avs_dsp_receive_rx(adev, header);
297 		ipc->rx_completed = true;
298 		spin_unlock_irq(&ipc->rx_lock);
299 	} else {
300 		avs_dsp_process_notification(adev, header);
301 	}
302 
303 	complete(&ipc->busy_completion);
304 }
305 
avs_dsp_irq_handler(int irq,void * dev_id)306 irqreturn_t avs_dsp_irq_handler(int irq, void *dev_id)
307 {
308 	struct avs_dev *adev = dev_id;
309 	struct avs_ipc *ipc = adev->ipc;
310 	const struct avs_spec *const spec = adev->spec;
311 	u32 adspis, hipc_rsp, hipc_ack;
312 	irqreturn_t ret = IRQ_NONE;
313 
314 	adspis = snd_hdac_adsp_readl(adev, AVS_ADSP_REG_ADSPIS);
315 	if (adspis == UINT_MAX || !(adspis & AVS_ADSP_ADSPIS_IPC))
316 		return ret;
317 
318 	hipc_ack = snd_hdac_adsp_readl(adev, spec->hipc->ack_offset);
319 	hipc_rsp = snd_hdac_adsp_readl(adev, spec->hipc->rsp_offset);
320 
321 	/* DSP acked host's request */
322 	if (hipc_ack & spec->hipc->ack_done_mask) {
323 		/*
324 		 * As an extra precaution, mask done interrupt. Code executed
325 		 * due to complete() found below does not assume any masking.
326 		 */
327 		snd_hdac_adsp_updatel(adev, spec->hipc->ctl_offset,
328 				      AVS_ADSP_HIPCCTL_DONE, 0);
329 
330 		complete(&ipc->done_completion);
331 
332 		/* tell DSP it has our attention */
333 		snd_hdac_adsp_updatel(adev, spec->hipc->ack_offset,
334 				      spec->hipc->ack_done_mask,
335 				      spec->hipc->ack_done_mask);
336 		/* unmask done interrupt */
337 		snd_hdac_adsp_updatel(adev, spec->hipc->ctl_offset,
338 				      AVS_ADSP_HIPCCTL_DONE,
339 				      AVS_ADSP_HIPCCTL_DONE);
340 		ret = IRQ_HANDLED;
341 	}
342 
343 	/* DSP sent new response to process */
344 	if (hipc_rsp & spec->hipc->rsp_busy_mask) {
345 		/* mask busy interrupt */
346 		snd_hdac_adsp_updatel(adev, spec->hipc->ctl_offset,
347 				      AVS_ADSP_HIPCCTL_BUSY, 0);
348 
349 		ret = IRQ_WAKE_THREAD;
350 	}
351 
352 	return ret;
353 }
354 
avs_dsp_irq_thread(int irq,void * dev_id)355 irqreturn_t avs_dsp_irq_thread(int irq, void *dev_id)
356 {
357 	struct avs_dev *adev = dev_id;
358 	union avs_reply_msg msg;
359 	u32 hipct, hipcte;
360 
361 	hipct = snd_hdac_adsp_readl(adev, SKL_ADSP_REG_HIPCT);
362 	hipcte = snd_hdac_adsp_readl(adev, SKL_ADSP_REG_HIPCTE);
363 
364 	/* ensure DSP sent new response to process */
365 	if (!(hipct & SKL_ADSP_HIPCT_BUSY))
366 		return IRQ_NONE;
367 
368 	msg.primary = hipct;
369 	msg.ext.val = hipcte;
370 	avs_dsp_process_response(adev, msg.val);
371 
372 	/* tell DSP we accepted its message */
373 	snd_hdac_adsp_updatel(adev, SKL_ADSP_REG_HIPCT,
374 			      SKL_ADSP_HIPCT_BUSY, SKL_ADSP_HIPCT_BUSY);
375 	/* unmask busy interrupt */
376 	snd_hdac_adsp_updatel(adev, SKL_ADSP_REG_HIPCCTL,
377 			      AVS_ADSP_HIPCCTL_BUSY, AVS_ADSP_HIPCCTL_BUSY);
378 
379 	return IRQ_HANDLED;
380 }
381 
avs_ipc_is_busy(struct avs_ipc * ipc)382 static bool avs_ipc_is_busy(struct avs_ipc *ipc)
383 {
384 	struct avs_dev *adev = to_avs_dev(ipc->dev);
385 	const struct avs_spec *const spec = adev->spec;
386 	u32 hipc_rsp;
387 
388 	hipc_rsp = snd_hdac_adsp_readl(adev, spec->hipc->rsp_offset);
389 	return hipc_rsp & spec->hipc->rsp_busy_mask;
390 }
391 
avs_ipc_wait_busy_completion(struct avs_ipc * ipc,int timeout)392 static int avs_ipc_wait_busy_completion(struct avs_ipc *ipc, int timeout)
393 {
394 	u32 repeats_left = 128; /* to avoid infinite looping */
395 	int ret;
396 
397 again:
398 	ret = wait_for_completion_timeout(&ipc->busy_completion, msecs_to_jiffies(timeout));
399 
400 	/* DSP could be unresponsive at this point. */
401 	if (!ipc->ready)
402 		return -EPERM;
403 
404 	if (!ret) {
405 		if (!avs_ipc_is_busy(ipc))
406 			return -ETIMEDOUT;
407 		/*
408 		 * Firmware did its job, either notification or reply
409 		 * has been received - now wait until it's processed.
410 		 */
411 		wait_for_completion_killable(&ipc->busy_completion);
412 	}
413 
414 	/* Ongoing notification's bottom-half may cause early wakeup */
415 	spin_lock(&ipc->rx_lock);
416 	if (!ipc->rx_completed) {
417 		if (repeats_left) {
418 			/* Reply delayed due to notification. */
419 			repeats_left--;
420 			reinit_completion(&ipc->busy_completion);
421 			spin_unlock(&ipc->rx_lock);
422 			goto again;
423 		}
424 
425 		spin_unlock(&ipc->rx_lock);
426 		return -ETIMEDOUT;
427 	}
428 
429 	spin_unlock(&ipc->rx_lock);
430 	return 0;
431 }
432 
avs_ipc_msg_init(struct avs_ipc * ipc,struct avs_ipc_msg * reply)433 static void avs_ipc_msg_init(struct avs_ipc *ipc, struct avs_ipc_msg *reply)
434 {
435 	lockdep_assert_held(&ipc->rx_lock);
436 
437 	ipc->rx.header = 0;
438 	ipc->rx.size = reply ? reply->size : 0;
439 	ipc->rx_completed = false;
440 
441 	reinit_completion(&ipc->done_completion);
442 	reinit_completion(&ipc->busy_completion);
443 }
444 
avs_dsp_send_tx(struct avs_dev * adev,struct avs_ipc_msg * tx,bool read_fwregs)445 static void avs_dsp_send_tx(struct avs_dev *adev, struct avs_ipc_msg *tx, bool read_fwregs)
446 {
447 	const struct avs_spec *const spec = adev->spec;
448 	u64 reg = ULONG_MAX;
449 
450 	tx->header |= spec->hipc->req_busy_mask;
451 	if (read_fwregs)
452 		reg = readq(avs_sram_addr(adev, AVS_FW_REGS_WINDOW));
453 
454 	trace_avs_request(tx, reg);
455 
456 	if (tx->size)
457 		memcpy_toio(avs_downlink_addr(adev), tx->data, tx->size);
458 	snd_hdac_adsp_writel(adev, spec->hipc->req_ext_offset, tx->header >> 32);
459 	snd_hdac_adsp_writel(adev, spec->hipc->req_offset, tx->header & UINT_MAX);
460 }
461 
avs_dsp_do_send_msg(struct avs_dev * adev,struct avs_ipc_msg * request,struct avs_ipc_msg * reply,int timeout)462 static int avs_dsp_do_send_msg(struct avs_dev *adev, struct avs_ipc_msg *request,
463 			       struct avs_ipc_msg *reply, int timeout)
464 {
465 	struct avs_ipc *ipc = adev->ipc;
466 	int ret;
467 
468 	if (!ipc->ready)
469 		return -EPERM;
470 
471 	mutex_lock(&ipc->msg_mutex);
472 
473 	spin_lock(&ipc->rx_lock);
474 	avs_ipc_msg_init(ipc, reply);
475 	avs_dsp_send_tx(adev, request, true);
476 	spin_unlock(&ipc->rx_lock);
477 
478 	ret = avs_ipc_wait_busy_completion(ipc, timeout);
479 	if (ret) {
480 		if (ret == -ETIMEDOUT) {
481 			union avs_notify_msg msg = AVS_NOTIFICATION(EXCEPTION_CAUGHT);
482 
483 			/* Same treatment as on exception, just stack_dump=0. */
484 			avs_dsp_exception_caught(adev, &msg);
485 		}
486 		goto exit;
487 	}
488 
489 	ret = ipc->rx.rsp.status;
490 	if (reply) {
491 		reply->header = ipc->rx.header;
492 		reply->size = ipc->rx.size;
493 		if (reply->data && ipc->rx.size)
494 			memcpy(reply->data, ipc->rx.data, reply->size);
495 	}
496 
497 exit:
498 	mutex_unlock(&ipc->msg_mutex);
499 	return ret;
500 }
501 
avs_dsp_send_msg_sequence(struct avs_dev * adev,struct avs_ipc_msg * request,struct avs_ipc_msg * reply,int timeout,bool wake_d0i0,bool schedule_d0ix)502 static int avs_dsp_send_msg_sequence(struct avs_dev *adev, struct avs_ipc_msg *request,
503 				     struct avs_ipc_msg *reply, int timeout, bool wake_d0i0,
504 				     bool schedule_d0ix)
505 {
506 	int ret;
507 
508 	trace_avs_d0ix("wake", wake_d0i0, request->header);
509 	if (wake_d0i0) {
510 		ret = avs_dsp_wake_d0i0(adev, request);
511 		if (ret)
512 			return ret;
513 	}
514 
515 	ret = avs_dsp_do_send_msg(adev, request, reply, timeout);
516 	if (ret)
517 		return ret;
518 
519 	trace_avs_d0ix("schedule", schedule_d0ix, request->header);
520 	if (schedule_d0ix)
521 		avs_dsp_schedule_d0ix(adev, request);
522 
523 	return 0;
524 }
525 
avs_dsp_send_msg_timeout(struct avs_dev * adev,struct avs_ipc_msg * request,struct avs_ipc_msg * reply,int timeout)526 int avs_dsp_send_msg_timeout(struct avs_dev *adev, struct avs_ipc_msg *request,
527 			     struct avs_ipc_msg *reply, int timeout)
528 {
529 	bool wake_d0i0 = avs_dsp_op(adev, d0ix_toggle, request, true);
530 	bool schedule_d0ix = avs_dsp_op(adev, d0ix_toggle, request, false);
531 
532 	return avs_dsp_send_msg_sequence(adev, request, reply, timeout, wake_d0i0, schedule_d0ix);
533 }
534 
avs_dsp_send_msg(struct avs_dev * adev,struct avs_ipc_msg * request,struct avs_ipc_msg * reply)535 int avs_dsp_send_msg(struct avs_dev *adev, struct avs_ipc_msg *request,
536 		     struct avs_ipc_msg *reply)
537 {
538 	return avs_dsp_send_msg_timeout(adev, request, reply, adev->ipc->default_timeout_ms);
539 }
540 
avs_dsp_send_pm_msg_timeout(struct avs_dev * adev,struct avs_ipc_msg * request,struct avs_ipc_msg * reply,int timeout,bool wake_d0i0)541 int avs_dsp_send_pm_msg_timeout(struct avs_dev *adev, struct avs_ipc_msg *request,
542 				struct avs_ipc_msg *reply, int timeout, bool wake_d0i0)
543 {
544 	return avs_dsp_send_msg_sequence(adev, request, reply, timeout, wake_d0i0, false);
545 }
546 
avs_dsp_send_pm_msg(struct avs_dev * adev,struct avs_ipc_msg * request,struct avs_ipc_msg * reply,bool wake_d0i0)547 int avs_dsp_send_pm_msg(struct avs_dev *adev, struct avs_ipc_msg *request,
548 			struct avs_ipc_msg *reply, bool wake_d0i0)
549 {
550 	return avs_dsp_send_pm_msg_timeout(adev, request, reply, adev->ipc->default_timeout_ms,
551 					   wake_d0i0);
552 }
553 
avs_dsp_do_send_rom_msg(struct avs_dev * adev,struct avs_ipc_msg * request,int timeout)554 static int avs_dsp_do_send_rom_msg(struct avs_dev *adev, struct avs_ipc_msg *request, int timeout)
555 {
556 	struct avs_ipc *ipc = adev->ipc;
557 	int ret;
558 
559 	mutex_lock(&ipc->msg_mutex);
560 
561 	spin_lock(&ipc->rx_lock);
562 	avs_ipc_msg_init(ipc, NULL);
563 	/*
564 	 * with hw still stalled, memory windows may not be
565 	 * configured properly so avoid accessing SRAM
566 	 */
567 	avs_dsp_send_tx(adev, request, false);
568 	spin_unlock(&ipc->rx_lock);
569 
570 	/* ROM messages must be sent before main core is unstalled */
571 	ret = avs_dsp_op(adev, stall, AVS_MAIN_CORE_MASK, false);
572 	if (!ret) {
573 		ret = wait_for_completion_timeout(&ipc->done_completion, msecs_to_jiffies(timeout));
574 		ret = ret ? 0 : -ETIMEDOUT;
575 	}
576 
577 	mutex_unlock(&ipc->msg_mutex);
578 
579 	return ret;
580 }
581 
avs_dsp_send_rom_msg_timeout(struct avs_dev * adev,struct avs_ipc_msg * request,int timeout)582 int avs_dsp_send_rom_msg_timeout(struct avs_dev *adev, struct avs_ipc_msg *request, int timeout)
583 {
584 	return avs_dsp_do_send_rom_msg(adev, request, timeout);
585 }
586 
avs_dsp_send_rom_msg(struct avs_dev * adev,struct avs_ipc_msg * request)587 int avs_dsp_send_rom_msg(struct avs_dev *adev, struct avs_ipc_msg *request)
588 {
589 	return avs_dsp_send_rom_msg_timeout(adev, request, adev->ipc->default_timeout_ms);
590 }
591 
avs_dsp_interrupt_control(struct avs_dev * adev,bool enable)592 void avs_dsp_interrupt_control(struct avs_dev *adev, bool enable)
593 {
594 	const struct avs_spec *const spec = adev->spec;
595 	u32 value, mask;
596 
597 	/*
598 	 * No particular bit setting order. All of these are required
599 	 * to have a functional SW <-> FW communication.
600 	 */
601 	value = enable ? AVS_ADSP_ADSPIC_IPC : 0;
602 	snd_hdac_adsp_updatel(adev, AVS_ADSP_REG_ADSPIC, AVS_ADSP_ADSPIC_IPC, value);
603 
604 	mask = AVS_ADSP_HIPCCTL_DONE | AVS_ADSP_HIPCCTL_BUSY;
605 	value = enable ? mask : 0;
606 	snd_hdac_adsp_updatel(adev, spec->hipc->ctl_offset, mask, value);
607 }
608 
avs_ipc_init(struct avs_ipc * ipc,struct device * dev)609 int avs_ipc_init(struct avs_ipc *ipc, struct device *dev)
610 {
611 	ipc->rx.data = devm_kzalloc(dev, AVS_MAILBOX_SIZE, GFP_KERNEL);
612 	if (!ipc->rx.data)
613 		return -ENOMEM;
614 
615 	ipc->dev = dev;
616 	ipc->ready = false;
617 	ipc->default_timeout_ms = AVS_IPC_TIMEOUT_MS;
618 	INIT_WORK(&ipc->recovery_work, avs_dsp_recovery_work);
619 	INIT_DELAYED_WORK(&ipc->d0ix_work, avs_dsp_d0ix_work);
620 	init_completion(&ipc->done_completion);
621 	init_completion(&ipc->busy_completion);
622 	spin_lock_init(&ipc->rx_lock);
623 	mutex_init(&ipc->msg_mutex);
624 
625 	return 0;
626 }
627 
avs_ipc_block(struct avs_ipc * ipc)628 void avs_ipc_block(struct avs_ipc *ipc)
629 {
630 	ipc->ready = false;
631 	cancel_work_sync(&ipc->recovery_work);
632 	cancel_delayed_work_sync(&ipc->d0ix_work);
633 	ipc->in_d0ix = false;
634 }
635