1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6 #include <linux/skbuff.h>
7 #include <linux/ctype.h>
8 #include <net/mac80211.h>
9 #include <net/cfg80211.h>
10 #include <linux/completion.h>
11 #include <linux/if_ether.h>
12 #include <linux/types.h>
13 #include <linux/pci.h>
14 #include <linux/uuid.h>
15 #include <linux/time.h>
16 #include <linux/of.h>
17 #include "core.h"
18 #include "debug.h"
19 #include "mac.h"
20 #include "hw.h"
21 #include "peer.h"
22
23 struct ath12k_wmi_svc_ready_parse {
24 bool wmi_svc_bitmap_done;
25 };
26
27 struct ath12k_wmi_dma_ring_caps_parse {
28 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps;
29 u32 n_dma_ring_caps;
30 };
31
32 struct ath12k_wmi_service_ext_arg {
33 u32 default_conc_scan_config_bits;
34 u32 default_fw_config_bits;
35 struct ath12k_wmi_ppe_threshold_arg ppet;
36 u32 he_cap_info;
37 u32 mpdu_density;
38 u32 max_bssid_rx_filters;
39 u32 num_hw_modes;
40 u32 num_phy;
41 };
42
43 struct ath12k_wmi_svc_rdy_ext_parse {
44 struct ath12k_wmi_service_ext_arg arg;
45 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps;
46 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
47 u32 n_hw_mode_caps;
48 u32 tot_phy_id;
49 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps;
50 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps;
51 u32 n_mac_phy_caps;
52 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps;
53 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps;
54 u32 n_ext_hal_reg_caps;
55 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
56 bool hw_mode_done;
57 bool mac_phy_done;
58 bool ext_hal_reg_done;
59 bool mac_phy_chainmask_combo_done;
60 bool mac_phy_chainmask_cap_done;
61 bool oem_dma_ring_cap_done;
62 bool dma_ring_cap_done;
63 };
64
65 struct ath12k_wmi_svc_rdy_ext2_arg {
66 u32 reg_db_version;
67 u32 hw_min_max_tx_power_2ghz;
68 u32 hw_min_max_tx_power_5ghz;
69 u32 chwidth_num_peer_caps;
70 u32 preamble_puncture_bw;
71 u32 max_user_per_ppdu_ofdma;
72 u32 max_user_per_ppdu_mumimo;
73 u32 target_cap_flags;
74 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
75 u32 max_num_linkview_peers;
76 u32 max_num_msduq_supported_per_tid;
77 u32 default_num_msduq_supported_per_tid;
78 };
79
80 struct ath12k_wmi_svc_rdy_ext2_parse {
81 struct ath12k_wmi_svc_rdy_ext2_arg arg;
82 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
83 bool dma_ring_cap_done;
84 bool spectral_bin_scaling_done;
85 bool mac_phy_caps_ext_done;
86 };
87
88 struct ath12k_wmi_rdy_parse {
89 u32 num_extra_mac_addr;
90 };
91
92 struct ath12k_wmi_dma_buf_release_arg {
93 struct ath12k_wmi_dma_buf_release_fixed_params fixed;
94 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry;
95 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data;
96 u32 num_buf_entry;
97 u32 num_meta;
98 bool buf_entry_done;
99 bool meta_data_done;
100 };
101
102 struct ath12k_wmi_tlv_policy {
103 size_t min_len;
104 };
105
106 struct wmi_tlv_mgmt_rx_parse {
107 const struct ath12k_wmi_mgmt_rx_params *fixed;
108 const u8 *frame_buf;
109 bool frame_buf_done;
110 };
111
112 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = {
113 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 },
114 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 },
115 [WMI_TAG_SERVICE_READY_EVENT] = {
116 .min_len = sizeof(struct wmi_service_ready_event) },
117 [WMI_TAG_SERVICE_READY_EXT_EVENT] = {
118 .min_len = sizeof(struct wmi_service_ready_ext_event) },
119 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = {
120 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) },
121 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = {
122 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) },
123 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = {
124 .min_len = sizeof(struct wmi_vdev_start_resp_event) },
125 [WMI_TAG_PEER_DELETE_RESP_EVENT] = {
126 .min_len = sizeof(struct wmi_peer_delete_resp_event) },
127 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = {
128 .min_len = sizeof(struct wmi_bcn_tx_status_event) },
129 [WMI_TAG_VDEV_STOPPED_EVENT] = {
130 .min_len = sizeof(struct wmi_vdev_stopped_event) },
131 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = {
132 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) },
133 [WMI_TAG_MGMT_RX_HDR] = {
134 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) },
135 [WMI_TAG_MGMT_TX_COMPL_EVENT] = {
136 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) },
137 [WMI_TAG_SCAN_EVENT] = {
138 .min_len = sizeof(struct wmi_scan_event) },
139 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = {
140 .min_len = sizeof(struct wmi_peer_sta_kickout_event) },
141 [WMI_TAG_ROAM_EVENT] = {
142 .min_len = sizeof(struct wmi_roam_event) },
143 [WMI_TAG_CHAN_INFO_EVENT] = {
144 .min_len = sizeof(struct wmi_chan_info_event) },
145 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = {
146 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) },
147 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = {
148 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) },
149 [WMI_TAG_READY_EVENT] = {
150 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) },
151 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = {
152 .min_len = sizeof(struct wmi_service_available_event) },
153 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = {
154 .min_len = sizeof(struct wmi_peer_assoc_conf_event) },
155 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = {
156 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) },
157 [WMI_TAG_HOST_SWFDA_EVENT] = {
158 .min_len = sizeof(struct wmi_fils_discovery_event) },
159 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = {
160 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) },
161 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = {
162 .min_len = sizeof(struct wmi_vdev_delete_resp_event) },
163 };
164
ath12k_wmi_tlv_hdr(u32 cmd,u32 len)165 static __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len)
166 {
167 return le32_encode_bits(cmd, WMI_TLV_TAG) |
168 le32_encode_bits(len, WMI_TLV_LEN);
169 }
170
ath12k_wmi_tlv_cmd_hdr(u32 cmd,u32 len)171 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len)
172 {
173 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE);
174 }
175
ath12k_wmi_init_qcn9274(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)176 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
177 struct ath12k_wmi_resource_config_arg *config)
178 {
179 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS;
180
181 if (ab->num_radios == 2) {
182 config->num_peers = TARGET_NUM_PEERS(DBS);
183 config->num_tids = TARGET_NUM_TIDS(DBS);
184 } else if (ab->num_radios == 3) {
185 config->num_peers = TARGET_NUM_PEERS(DBS_SBS);
186 config->num_tids = TARGET_NUM_TIDS(DBS_SBS);
187 } else {
188 /* Control should not reach here */
189 config->num_peers = TARGET_NUM_PEERS(SINGLE);
190 config->num_tids = TARGET_NUM_TIDS(SINGLE);
191 }
192 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS;
193 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS;
194 config->num_peer_keys = TARGET_NUM_PEER_KEYS;
195 config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
196 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
197 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
198 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
199 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
200 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
201 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
202
203 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags))
204 config->rx_decap_mode = TARGET_DECAP_MODE_RAW;
205 else
206 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
207
208 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
209 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
210 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
211 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
212 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS;
213 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS;
214 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE;
215 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
216 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES;
217 config->dma_burst_size = TARGET_DMA_BURST_SIZE;
218 config->rx_skip_defrag_timeout_dup_detection_check =
219 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
220 config->vow_config = TARGET_VOW_CONFIG;
221 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV;
222 config->num_msdu_desc = TARGET_NUM_MSDU_DESC;
223 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD;
224 config->rx_batchmode = TARGET_RX_BATCHMODE;
225 /* Indicates host supports peer map v3 and unmap v2 support */
226 config->peer_map_unmap_version = 0x32;
227 config->twt_ap_pdev_count = ab->num_radios;
228 config->twt_ap_sta_count = 1000;
229 }
230
ath12k_wmi_init_wcn7850(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)231 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
232 struct ath12k_wmi_resource_config_arg *config)
233 {
234 config->num_vdevs = 4;
235 config->num_peers = 16;
236 config->num_tids = 32;
237
238 config->num_offload_peers = 3;
239 config->num_offload_reorder_buffs = 3;
240 config->num_peer_keys = TARGET_NUM_PEER_KEYS;
241 config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
242 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
243 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
244 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
245 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
246 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
247 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
248 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
249 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
250 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
251 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
252 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
253 config->num_mcast_groups = 0;
254 config->num_mcast_table_elems = 0;
255 config->mcast2ucast_mode = 0;
256 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
257 config->num_wds_entries = 0;
258 config->dma_burst_size = 0;
259 config->rx_skip_defrag_timeout_dup_detection_check = 0;
260 config->vow_config = TARGET_VOW_CONFIG;
261 config->gtk_offload_max_vdev = 2;
262 config->num_msdu_desc = 0x400;
263 config->beacon_tx_offload_max_vdev = 2;
264 config->rx_batchmode = TARGET_RX_BATCHMODE;
265
266 config->peer_map_unmap_version = 0x1;
267 config->use_pdev_id = 1;
268 config->max_frag_entries = 0xa;
269 config->num_tdls_vdevs = 0x1;
270 config->num_tdls_conn_table_entries = 8;
271 config->beacon_tx_offload_max_vdev = 0x2;
272 config->num_multicast_filter_entries = 0x20;
273 config->num_wow_filters = 0x16;
274 config->num_keep_alive_pattern = 0;
275 }
276
277 #define PRIMAP(_hw_mode_) \
278 [_hw_mode_] = _hw_mode_##_PRI
279
280 static const int ath12k_hw_mode_pri_map[] = {
281 PRIMAP(WMI_HOST_HW_MODE_SINGLE),
282 PRIMAP(WMI_HOST_HW_MODE_DBS),
283 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE),
284 PRIMAP(WMI_HOST_HW_MODE_SBS),
285 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS),
286 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS),
287 /* keep last */
288 PRIMAP(WMI_HOST_HW_MODE_MAX),
289 };
290
291 static int
ath12k_wmi_tlv_iter(struct ath12k_base * ab,const void * ptr,size_t len,int (* iter)(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data),void * data)292 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len,
293 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len,
294 const void *ptr, void *data),
295 void *data)
296 {
297 const void *begin = ptr;
298 const struct wmi_tlv *tlv;
299 u16 tlv_tag, tlv_len;
300 int ret;
301
302 while (len > 0) {
303 if (len < sizeof(*tlv)) {
304 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",
305 ptr - begin, len, sizeof(*tlv));
306 return -EINVAL;
307 }
308
309 tlv = ptr;
310 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
311 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN);
312 ptr += sizeof(*tlv);
313 len -= sizeof(*tlv);
314
315 if (tlv_len > len) {
316 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n",
317 tlv_tag, ptr - begin, len, tlv_len);
318 return -EINVAL;
319 }
320
321 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) &&
322 ath12k_wmi_tlv_policies[tlv_tag].min_len &&
323 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) {
324 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n",
325 tlv_tag, ptr - begin, tlv_len,
326 ath12k_wmi_tlv_policies[tlv_tag].min_len);
327 return -EINVAL;
328 }
329
330 ret = iter(ab, tlv_tag, tlv_len, ptr, data);
331 if (ret)
332 return ret;
333
334 ptr += tlv_len;
335 len -= tlv_len;
336 }
337
338 return 0;
339 }
340
ath12k_wmi_tlv_iter_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)341 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len,
342 const void *ptr, void *data)
343 {
344 const void **tb = data;
345
346 if (tag < WMI_TAG_MAX)
347 tb[tag] = ptr;
348
349 return 0;
350 }
351
ath12k_wmi_tlv_parse(struct ath12k_base * ar,const void ** tb,const void * ptr,size_t len)352 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb,
353 const void *ptr, size_t len)
354 {
355 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse,
356 (void *)tb);
357 }
358
359 static const void **
ath12k_wmi_tlv_parse_alloc(struct ath12k_base * ab,const void * ptr,size_t len,gfp_t gfp)360 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab, const void *ptr,
361 size_t len, gfp_t gfp)
362 {
363 const void **tb;
364 int ret;
365
366 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp);
367 if (!tb)
368 return ERR_PTR(-ENOMEM);
369
370 ret = ath12k_wmi_tlv_parse(ab, tb, ptr, len);
371 if (ret) {
372 kfree(tb);
373 return ERR_PTR(ret);
374 }
375
376 return tb;
377 }
378
ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)379 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
380 u32 cmd_id)
381 {
382 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb);
383 struct ath12k_base *ab = wmi->wmi_ab->ab;
384 struct wmi_cmd_hdr *cmd_hdr;
385 int ret;
386
387 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr)))
388 return -ENOMEM;
389
390 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
391 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID);
392
393 memset(skb_cb, 0, sizeof(*skb_cb));
394 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb);
395
396 if (ret)
397 goto err_pull;
398
399 return 0;
400
401 err_pull:
402 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
403 return ret;
404 }
405
ath12k_wmi_cmd_send(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)406 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
407 u32 cmd_id)
408 {
409 struct ath12k_wmi_base *wmi_sc = wmi->wmi_ab;
410 int ret = -EOPNOTSUPP;
411
412 might_sleep();
413
414 wait_event_timeout(wmi_sc->tx_credits_wq, ({
415 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
416
417 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_sc->ab->dev_flags))
418 ret = -ESHUTDOWN;
419
420 (ret != -EAGAIN);
421 }), WMI_SEND_TIMEOUT_HZ);
422
423 if (ret == -EAGAIN)
424 ath12k_warn(wmi_sc->ab, "wmi command %d timeout\n", cmd_id);
425
426 return ret;
427 }
428
ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_service_ext_arg * arg)429 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
430 const void *ptr,
431 struct ath12k_wmi_service_ext_arg *arg)
432 {
433 const struct wmi_service_ready_ext_event *ev = ptr;
434 int i;
435
436 if (!ev)
437 return -EINVAL;
438
439 /* Move this to host based bitmap */
440 arg->default_conc_scan_config_bits =
441 le32_to_cpu(ev->default_conc_scan_config_bits);
442 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits);
443 arg->he_cap_info = le32_to_cpu(ev->he_cap_info);
444 arg->mpdu_density = le32_to_cpu(ev->mpdu_density);
445 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters);
446 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1);
447 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info);
448
449 for (i = 0; i < WMI_MAX_NUM_SS; i++)
450 arg->ppet.ppet16_ppet8_ru3_ru0[i] =
451 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]);
452
453 return 0;
454 }
455
456 static int
ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,struct ath12k_wmi_svc_rdy_ext_parse * svc,u8 hw_mode_id,u8 phy_id,struct ath12k_pdev * pdev)457 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
458 struct ath12k_wmi_svc_rdy_ext_parse *svc,
459 u8 hw_mode_id, u8 phy_id,
460 struct ath12k_pdev *pdev)
461 {
462 const struct ath12k_wmi_mac_phy_caps_params *mac_caps;
463 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps;
464 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps;
465 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps;
466 struct ath12k_base *ab = wmi_handle->wmi_ab->ab;
467 struct ath12k_band_cap *cap_band;
468 struct ath12k_pdev_cap *pdev_cap = &pdev->cap;
469 struct ath12k_fw_pdev *fw_pdev;
470 u32 phy_map;
471 u32 hw_idx, phy_idx = 0;
472 int i;
473
474 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps)
475 return -EINVAL;
476
477 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) {
478 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id))
479 break;
480
481 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map);
482 phy_idx = fls(phy_map);
483 }
484
485 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes))
486 return -EINVAL;
487
488 phy_idx += phy_id;
489 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy))
490 return -EINVAL;
491
492 mac_caps = wmi_mac_phy_caps + phy_idx;
493
494 pdev->pdev_id = le32_to_cpu(mac_caps->pdev_id);
495 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands);
496 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density);
497
498 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count];
499 fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands);
500 fw_pdev->pdev_id = le32_to_cpu(mac_caps->pdev_id);
501 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id);
502 ab->fw_pdev_count++;
503
504 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from
505 * band to band for a single radio, need to see how this should be
506 * handled.
507 */
508 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) {
509 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g);
510 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g);
511 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) {
512 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g);
513 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g);
514 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
515 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g);
516 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g);
517 } else {
518 return -EINVAL;
519 }
520
521 /* tx/rx chainmask reported from fw depends on the actual hw chains used,
522 * For example, for 4x4 capable macphys, first 4 chains can be used for first
523 * mac and the remaining 4 chains can be used for the second mac or vice-versa.
524 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0
525 * will be advertised for second mac or vice-versa. Compute the shift value
526 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to
527 * mac80211.
528 */
529 pdev_cap->tx_chain_mask_shift =
530 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32);
531 pdev_cap->rx_chain_mask_shift =
532 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32);
533
534 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) {
535 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ];
536 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
537 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g);
538 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g);
539 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g);
540 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext);
541 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g);
542 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
543 cap_band->he_cap_phy_info[i] =
544 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]);
545
546 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1);
547 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info);
548
549 for (i = 0; i < WMI_MAX_NUM_SS; i++)
550 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
551 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]);
552 }
553
554 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) {
555 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ];
556 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
557 cap_band->max_bw_supported =
558 le32_to_cpu(mac_caps->max_bw_supported_5g);
559 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
560 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
561 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
562 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
563 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
564 cap_band->he_cap_phy_info[i] =
565 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
566
567 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
568 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
569
570 for (i = 0; i < WMI_MAX_NUM_SS; i++)
571 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
572 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
573
574 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ];
575 cap_band->max_bw_supported =
576 le32_to_cpu(mac_caps->max_bw_supported_5g);
577 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
578 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
579 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
580 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
581 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
582 cap_band->he_cap_phy_info[i] =
583 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
584
585 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
586 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
587
588 for (i = 0; i < WMI_MAX_NUM_SS; i++)
589 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
590 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
591 }
592
593 return 0;
594 }
595
596 static int
ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev * wmi_handle,const struct ath12k_wmi_soc_hal_reg_caps_params * reg_caps,const struct ath12k_wmi_hal_reg_caps_ext_params * ext_caps,u8 phy_idx,struct ath12k_wmi_hal_reg_capabilities_ext_arg * param)597 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle,
598 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps,
599 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps,
600 u8 phy_idx,
601 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param)
602 {
603 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap;
604
605 if (!reg_caps || !ext_caps)
606 return -EINVAL;
607
608 if (phy_idx >= le32_to_cpu(reg_caps->num_phy))
609 return -EINVAL;
610
611 ext_reg_cap = &ext_caps[phy_idx];
612
613 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id);
614 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain);
615 param->eeprom_reg_domain_ext =
616 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext);
617 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1);
618 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2);
619 /* check if param->wireless_mode is needed */
620 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan);
621 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan);
622 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan);
623 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan);
624
625 return 0;
626 }
627
ath12k_pull_service_ready_tlv(struct ath12k_base * ab,const void * evt_buf,struct ath12k_wmi_target_cap_arg * cap)628 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab,
629 const void *evt_buf,
630 struct ath12k_wmi_target_cap_arg *cap)
631 {
632 const struct wmi_service_ready_event *ev = evt_buf;
633
634 if (!ev) {
635 ath12k_err(ab, "%s: failed by NULL param\n",
636 __func__);
637 return -EINVAL;
638 }
639
640 cap->phy_capability = le32_to_cpu(ev->phy_capability);
641 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry);
642 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains);
643 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info);
644 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info);
645 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs);
646 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power);
647 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power);
648 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info);
649 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable);
650 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size);
651 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels);
652 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs);
653 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps);
654 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask);
655 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index);
656 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc);
657
658 return 0;
659 }
660
661 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in
662 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each
663 * 4-byte word.
664 */
ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev * wmi,const u32 * wmi_svc_bm)665 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi,
666 const u32 *wmi_svc_bm)
667 {
668 int i, j;
669
670 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) {
671 do {
672 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32))
673 set_bit(j, wmi->wmi_ab->svc_map);
674 } while (++j % WMI_SERVICE_BITS_IN_SIZE32);
675 }
676 }
677
ath12k_wmi_svc_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)678 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
679 const void *ptr, void *data)
680 {
681 struct ath12k_wmi_svc_ready_parse *svc_ready = data;
682 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
683 u16 expect_len;
684
685 switch (tag) {
686 case WMI_TAG_SERVICE_READY_EVENT:
687 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps))
688 return -EINVAL;
689 break;
690
691 case WMI_TAG_ARRAY_UINT32:
692 if (!svc_ready->wmi_svc_bitmap_done) {
693 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32);
694 if (len < expect_len) {
695 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n",
696 len, tag);
697 return -EINVAL;
698 }
699
700 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr);
701
702 svc_ready->wmi_svc_bitmap_done = true;
703 }
704 break;
705 default:
706 break;
707 }
708
709 return 0;
710 }
711
ath12k_service_ready_event(struct ath12k_base * ab,struct sk_buff * skb)712 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
713 {
714 struct ath12k_wmi_svc_ready_parse svc_ready = { };
715 int ret;
716
717 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
718 ath12k_wmi_svc_rdy_parse,
719 &svc_ready);
720 if (ret) {
721 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
722 return ret;
723 }
724
725 return 0;
726 }
727
ath12k_wmi_alloc_skb(struct ath12k_wmi_base * wmi_sc,u32 len)728 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len)
729 {
730 struct sk_buff *skb;
731 struct ath12k_base *ab = wmi_sc->ab;
732 u32 round_len = roundup(len, 4);
733
734 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len);
735 if (!skb)
736 return NULL;
737
738 skb_reserve(skb, WMI_SKB_HEADROOM);
739 if (!IS_ALIGNED((unsigned long)skb->data, 4))
740 ath12k_warn(ab, "unaligned WMI skb data\n");
741
742 skb_put(skb, round_len);
743 memset(skb->data, 0, round_len);
744
745 return skb;
746 }
747
ath12k_wmi_mgmt_send(struct ath12k * ar,u32 vdev_id,u32 buf_id,struct sk_buff * frame)748 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id,
749 struct sk_buff *frame)
750 {
751 struct ath12k_wmi_pdev *wmi = ar->wmi;
752 struct wmi_mgmt_send_cmd *cmd;
753 struct wmi_tlv *frame_tlv;
754 struct sk_buff *skb;
755 u32 buf_len;
756 int ret, len;
757
758 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN);
759
760 len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4);
761
762 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
763 if (!skb)
764 return -ENOMEM;
765
766 cmd = (struct wmi_mgmt_send_cmd *)skb->data;
767 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD,
768 sizeof(*cmd));
769 cmd->vdev_id = cpu_to_le32(vdev_id);
770 cmd->desc_id = cpu_to_le32(buf_id);
771 cmd->chanfreq = 0;
772 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr));
773 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr));
774 cmd->frame_len = cpu_to_le32(frame->len);
775 cmd->buf_len = cpu_to_le32(buf_len);
776 cmd->tx_params_valid = 0;
777
778 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
779 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len);
780
781 memcpy(frame_tlv->value, frame->data, buf_len);
782
783 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID);
784 if (ret) {
785 ath12k_warn(ar->ab,
786 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n");
787 dev_kfree_skb(skb);
788 }
789
790 return ret;
791 }
792
ath12k_wmi_vdev_create(struct ath12k * ar,u8 * macaddr,struct ath12k_wmi_vdev_create_arg * args)793 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr,
794 struct ath12k_wmi_vdev_create_arg *args)
795 {
796 struct ath12k_wmi_pdev *wmi = ar->wmi;
797 struct wmi_vdev_create_cmd *cmd;
798 struct sk_buff *skb;
799 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams;
800 struct wmi_tlv *tlv;
801 int ret, len;
802 void *ptr;
803
804 /* It can be optimized my sending tx/rx chain configuration
805 * only for supported bands instead of always sending it for
806 * both the bands.
807 */
808 len = sizeof(*cmd) + TLV_HDR_SIZE +
809 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams));
810
811 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
812 if (!skb)
813 return -ENOMEM;
814
815 cmd = (struct wmi_vdev_create_cmd *)skb->data;
816 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD,
817 sizeof(*cmd));
818
819 cmd->vdev_id = cpu_to_le32(args->if_id);
820 cmd->vdev_type = cpu_to_le32(args->type);
821 cmd->vdev_subtype = cpu_to_le32(args->subtype);
822 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX);
823 cmd->pdev_id = cpu_to_le32(args->pdev_id);
824 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id);
825 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
826
827 ptr = skb->data + sizeof(*cmd);
828 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
829
830 tlv = ptr;
831 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
832
833 ptr += TLV_HDR_SIZE;
834 txrx_streams = ptr;
835 len = sizeof(*txrx_streams);
836 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
837 len);
838 txrx_streams->band = WMI_TPC_CHAINMASK_CONFIG_BAND_2G;
839 txrx_streams->supported_tx_streams =
840 args->chains[NL80211_BAND_2GHZ].tx;
841 txrx_streams->supported_rx_streams =
842 args->chains[NL80211_BAND_2GHZ].rx;
843
844 txrx_streams++;
845 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
846 len);
847 txrx_streams->band = WMI_TPC_CHAINMASK_CONFIG_BAND_5G;
848 txrx_streams->supported_tx_streams =
849 args->chains[NL80211_BAND_5GHZ].tx;
850 txrx_streams->supported_rx_streams =
851 args->chains[NL80211_BAND_5GHZ].rx;
852
853 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
854 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n",
855 args->if_id, args->type, args->subtype,
856 macaddr, args->pdev_id);
857
858 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID);
859 if (ret) {
860 ath12k_warn(ar->ab,
861 "failed to submit WMI_VDEV_CREATE_CMDID\n");
862 dev_kfree_skb(skb);
863 }
864
865 return ret;
866 }
867
ath12k_wmi_vdev_delete(struct ath12k * ar,u8 vdev_id)868 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id)
869 {
870 struct ath12k_wmi_pdev *wmi = ar->wmi;
871 struct wmi_vdev_delete_cmd *cmd;
872 struct sk_buff *skb;
873 int ret;
874
875 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
876 if (!skb)
877 return -ENOMEM;
878
879 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
880 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD,
881 sizeof(*cmd));
882 cmd->vdev_id = cpu_to_le32(vdev_id);
883
884 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id);
885
886 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID);
887 if (ret) {
888 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n");
889 dev_kfree_skb(skb);
890 }
891
892 return ret;
893 }
894
ath12k_wmi_vdev_stop(struct ath12k * ar,u8 vdev_id)895 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id)
896 {
897 struct ath12k_wmi_pdev *wmi = ar->wmi;
898 struct wmi_vdev_stop_cmd *cmd;
899 struct sk_buff *skb;
900 int ret;
901
902 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
903 if (!skb)
904 return -ENOMEM;
905
906 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
907
908 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD,
909 sizeof(*cmd));
910 cmd->vdev_id = cpu_to_le32(vdev_id);
911
912 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id);
913
914 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID);
915 if (ret) {
916 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n");
917 dev_kfree_skb(skb);
918 }
919
920 return ret;
921 }
922
ath12k_wmi_vdev_down(struct ath12k * ar,u8 vdev_id)923 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id)
924 {
925 struct ath12k_wmi_pdev *wmi = ar->wmi;
926 struct wmi_vdev_down_cmd *cmd;
927 struct sk_buff *skb;
928 int ret;
929
930 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
931 if (!skb)
932 return -ENOMEM;
933
934 cmd = (struct wmi_vdev_down_cmd *)skb->data;
935
936 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD,
937 sizeof(*cmd));
938 cmd->vdev_id = cpu_to_le32(vdev_id);
939
940 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id);
941
942 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID);
943 if (ret) {
944 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n");
945 dev_kfree_skb(skb);
946 }
947
948 return ret;
949 }
950
ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params * chan,struct wmi_vdev_start_req_arg * arg)951 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan,
952 struct wmi_vdev_start_req_arg *arg)
953 {
954 memset(chan, 0, sizeof(*chan));
955
956 chan->mhz = cpu_to_le32(arg->freq);
957 chan->band_center_freq1 = cpu_to_le32(arg->band_center_freq1);
958 if (arg->mode == MODE_11AC_VHT80_80)
959 chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2);
960 else
961 chan->band_center_freq2 = 0;
962
963 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE);
964 if (arg->passive)
965 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
966 if (arg->allow_ibss)
967 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED);
968 if (arg->allow_ht)
969 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
970 if (arg->allow_vht)
971 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
972 if (arg->allow_he)
973 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
974 if (arg->ht40plus)
975 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS);
976 if (arg->chan_radar)
977 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
978 if (arg->freq2_radar)
979 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2);
980
981 chan->reg_info_1 = le32_encode_bits(arg->max_power,
982 WMI_CHAN_REG_INFO1_MAX_PWR) |
983 le32_encode_bits(arg->max_reg_power,
984 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
985
986 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain,
987 WMI_CHAN_REG_INFO2_ANT_MAX) |
988 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR);
989 }
990
ath12k_wmi_vdev_start(struct ath12k * ar,struct wmi_vdev_start_req_arg * arg,bool restart)991 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg,
992 bool restart)
993 {
994 struct ath12k_wmi_pdev *wmi = ar->wmi;
995 struct wmi_vdev_start_request_cmd *cmd;
996 struct sk_buff *skb;
997 struct ath12k_wmi_channel_params *chan;
998 struct wmi_tlv *tlv;
999 void *ptr;
1000 int ret, len;
1001
1002 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
1003 return -EINVAL;
1004
1005 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE;
1006
1007 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1008 if (!skb)
1009 return -ENOMEM;
1010
1011 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
1012 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD,
1013 sizeof(*cmd));
1014 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1015 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval);
1016 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate);
1017 cmd->dtim_period = cpu_to_le32(arg->dtim_period);
1018 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors);
1019 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams);
1020 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams);
1021 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms);
1022 cmd->regdomain = cpu_to_le32(arg->regdomain);
1023 cmd->he_ops = cpu_to_le32(arg->he_ops);
1024 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
1025
1026 if (!restart) {
1027 if (arg->ssid) {
1028 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len);
1029 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
1030 }
1031 if (arg->hidden_ssid)
1032 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID);
1033 if (arg->pmf_enabled)
1034 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED);
1035 }
1036
1037 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED);
1038
1039 ptr = skb->data + sizeof(*cmd);
1040 chan = ptr;
1041
1042 ath12k_wmi_put_wmi_channel(chan, arg);
1043
1044 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
1045 sizeof(*chan));
1046 ptr += sizeof(*chan);
1047
1048 tlv = ptr;
1049 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
1050
1051 /* Note: This is a nested TLV containing:
1052 * [wmi_tlv][wmi_p2p_noa_descriptor][wmi_tlv]..
1053 */
1054
1055 ptr += sizeof(*tlv);
1056
1057 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n",
1058 restart ? "restart" : "start", arg->vdev_id,
1059 arg->freq, arg->mode);
1060
1061 if (restart)
1062 ret = ath12k_wmi_cmd_send(wmi, skb,
1063 WMI_VDEV_RESTART_REQUEST_CMDID);
1064 else
1065 ret = ath12k_wmi_cmd_send(wmi, skb,
1066 WMI_VDEV_START_REQUEST_CMDID);
1067 if (ret) {
1068 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n",
1069 restart ? "restart" : "start");
1070 dev_kfree_skb(skb);
1071 }
1072
1073 return ret;
1074 }
1075
ath12k_wmi_vdev_up(struct ath12k * ar,u32 vdev_id,u32 aid,const u8 * bssid)1076 int ath12k_wmi_vdev_up(struct ath12k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
1077 {
1078 struct ath12k_wmi_pdev *wmi = ar->wmi;
1079 struct wmi_vdev_up_cmd *cmd;
1080 struct sk_buff *skb;
1081 int ret;
1082
1083 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1084 if (!skb)
1085 return -ENOMEM;
1086
1087 cmd = (struct wmi_vdev_up_cmd *)skb->data;
1088
1089 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD,
1090 sizeof(*cmd));
1091 cmd->vdev_id = cpu_to_le32(vdev_id);
1092 cmd->vdev_assoc_id = cpu_to_le32(aid);
1093
1094 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
1095
1096 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1097 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
1098 vdev_id, aid, bssid);
1099
1100 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID);
1101 if (ret) {
1102 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n");
1103 dev_kfree_skb(skb);
1104 }
1105
1106 return ret;
1107 }
1108
ath12k_wmi_send_peer_create_cmd(struct ath12k * ar,struct ath12k_wmi_peer_create_arg * arg)1109 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar,
1110 struct ath12k_wmi_peer_create_arg *arg)
1111 {
1112 struct ath12k_wmi_pdev *wmi = ar->wmi;
1113 struct wmi_peer_create_cmd *cmd;
1114 struct sk_buff *skb;
1115 int ret;
1116
1117 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1118 if (!skb)
1119 return -ENOMEM;
1120
1121 cmd = (struct wmi_peer_create_cmd *)skb->data;
1122 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD,
1123 sizeof(*cmd));
1124
1125 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr);
1126 cmd->peer_type = cpu_to_le32(arg->peer_type);
1127 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1128
1129 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1130 "WMI peer create vdev_id %d peer_addr %pM\n",
1131 arg->vdev_id, arg->peer_addr);
1132
1133 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID);
1134 if (ret) {
1135 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n");
1136 dev_kfree_skb(skb);
1137 }
1138
1139 return ret;
1140 }
1141
ath12k_wmi_send_peer_delete_cmd(struct ath12k * ar,const u8 * peer_addr,u8 vdev_id)1142 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar,
1143 const u8 *peer_addr, u8 vdev_id)
1144 {
1145 struct ath12k_wmi_pdev *wmi = ar->wmi;
1146 struct wmi_peer_delete_cmd *cmd;
1147 struct sk_buff *skb;
1148 int ret;
1149
1150 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1151 if (!skb)
1152 return -ENOMEM;
1153
1154 cmd = (struct wmi_peer_delete_cmd *)skb->data;
1155 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD,
1156 sizeof(*cmd));
1157
1158 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1159 cmd->vdev_id = cpu_to_le32(vdev_id);
1160
1161 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1162 "WMI peer delete vdev_id %d peer_addr %pM\n",
1163 vdev_id, peer_addr);
1164
1165 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID);
1166 if (ret) {
1167 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n");
1168 dev_kfree_skb(skb);
1169 }
1170
1171 return ret;
1172 }
1173
ath12k_wmi_send_pdev_set_regdomain(struct ath12k * ar,struct ath12k_wmi_pdev_set_regdomain_arg * arg)1174 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar,
1175 struct ath12k_wmi_pdev_set_regdomain_arg *arg)
1176 {
1177 struct ath12k_wmi_pdev *wmi = ar->wmi;
1178 struct wmi_pdev_set_regdomain_cmd *cmd;
1179 struct sk_buff *skb;
1180 int ret;
1181
1182 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1183 if (!skb)
1184 return -ENOMEM;
1185
1186 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
1187 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1188 sizeof(*cmd));
1189
1190 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use);
1191 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g);
1192 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g);
1193 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g);
1194 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g);
1195 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain);
1196 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
1197
1198 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1199 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n",
1200 arg->current_rd_in_use, arg->current_rd_2g,
1201 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id);
1202
1203 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID);
1204 if (ret) {
1205 ath12k_warn(ar->ab,
1206 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n");
1207 dev_kfree_skb(skb);
1208 }
1209
1210 return ret;
1211 }
1212
ath12k_wmi_set_peer_param(struct ath12k * ar,const u8 * peer_addr,u32 vdev_id,u32 param_id,u32 param_val)1213 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr,
1214 u32 vdev_id, u32 param_id, u32 param_val)
1215 {
1216 struct ath12k_wmi_pdev *wmi = ar->wmi;
1217 struct wmi_peer_set_param_cmd *cmd;
1218 struct sk_buff *skb;
1219 int ret;
1220
1221 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1222 if (!skb)
1223 return -ENOMEM;
1224
1225 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
1226 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD,
1227 sizeof(*cmd));
1228 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1229 cmd->vdev_id = cpu_to_le32(vdev_id);
1230 cmd->param_id = cpu_to_le32(param_id);
1231 cmd->param_value = cpu_to_le32(param_val);
1232
1233 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1234 "WMI vdev %d peer 0x%pM set param %d value %d\n",
1235 vdev_id, peer_addr, param_id, param_val);
1236
1237 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID);
1238 if (ret) {
1239 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n");
1240 dev_kfree_skb(skb);
1241 }
1242
1243 return ret;
1244 }
1245
ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k * ar,u8 peer_addr[ETH_ALEN],u32 peer_tid_bitmap,u8 vdev_id)1246 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
1247 u8 peer_addr[ETH_ALEN],
1248 u32 peer_tid_bitmap,
1249 u8 vdev_id)
1250 {
1251 struct ath12k_wmi_pdev *wmi = ar->wmi;
1252 struct wmi_peer_flush_tids_cmd *cmd;
1253 struct sk_buff *skb;
1254 int ret;
1255
1256 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1257 if (!skb)
1258 return -ENOMEM;
1259
1260 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
1261 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD,
1262 sizeof(*cmd));
1263
1264 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1265 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap);
1266 cmd->vdev_id = cpu_to_le32(vdev_id);
1267
1268 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1269 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n",
1270 vdev_id, peer_addr, peer_tid_bitmap);
1271
1272 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID);
1273 if (ret) {
1274 ath12k_warn(ar->ab,
1275 "failed to send WMI_PEER_FLUSH_TIDS cmd\n");
1276 dev_kfree_skb(skb);
1277 }
1278
1279 return ret;
1280 }
1281
ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k * ar,int vdev_id,const u8 * addr,dma_addr_t paddr,u8 tid,u8 ba_window_size_valid,u32 ba_window_size)1282 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar,
1283 int vdev_id, const u8 *addr,
1284 dma_addr_t paddr, u8 tid,
1285 u8 ba_window_size_valid,
1286 u32 ba_window_size)
1287 {
1288 struct wmi_peer_reorder_queue_setup_cmd *cmd;
1289 struct sk_buff *skb;
1290 int ret;
1291
1292 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
1293 if (!skb)
1294 return -ENOMEM;
1295
1296 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data;
1297 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1298 sizeof(*cmd));
1299
1300 ether_addr_copy(cmd->peer_macaddr.addr, addr);
1301 cmd->vdev_id = cpu_to_le32(vdev_id);
1302 cmd->tid = cpu_to_le32(tid);
1303 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr));
1304 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr));
1305 cmd->queue_no = cpu_to_le32(tid);
1306 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid);
1307 cmd->ba_window_size = cpu_to_le32(ba_window_size);
1308
1309 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1310 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n",
1311 addr, vdev_id, tid);
1312
1313 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
1314 WMI_PEER_REORDER_QUEUE_SETUP_CMDID);
1315 if (ret) {
1316 ath12k_warn(ar->ab,
1317 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n");
1318 dev_kfree_skb(skb);
1319 }
1320
1321 return ret;
1322 }
1323
1324 int
ath12k_wmi_rx_reord_queue_remove(struct ath12k * ar,struct ath12k_wmi_rx_reorder_queue_remove_arg * arg)1325 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar,
1326 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg)
1327 {
1328 struct ath12k_wmi_pdev *wmi = ar->wmi;
1329 struct wmi_peer_reorder_queue_remove_cmd *cmd;
1330 struct sk_buff *skb;
1331 int ret;
1332
1333 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1334 if (!skb)
1335 return -ENOMEM;
1336
1337 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data;
1338 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1339 sizeof(*cmd));
1340
1341 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr);
1342 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1343 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap);
1344
1345 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1346 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__,
1347 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap);
1348
1349 ret = ath12k_wmi_cmd_send(wmi, skb,
1350 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID);
1351 if (ret) {
1352 ath12k_warn(ar->ab,
1353 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID");
1354 dev_kfree_skb(skb);
1355 }
1356
1357 return ret;
1358 }
1359
ath12k_wmi_pdev_set_param(struct ath12k * ar,u32 param_id,u32 param_value,u8 pdev_id)1360 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id,
1361 u32 param_value, u8 pdev_id)
1362 {
1363 struct ath12k_wmi_pdev *wmi = ar->wmi;
1364 struct wmi_pdev_set_param_cmd *cmd;
1365 struct sk_buff *skb;
1366 int ret;
1367
1368 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1369 if (!skb)
1370 return -ENOMEM;
1371
1372 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
1373 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD,
1374 sizeof(*cmd));
1375 cmd->pdev_id = cpu_to_le32(pdev_id);
1376 cmd->param_id = cpu_to_le32(param_id);
1377 cmd->param_value = cpu_to_le32(param_value);
1378
1379 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1380 "WMI pdev set param %d pdev id %d value %d\n",
1381 param_id, pdev_id, param_value);
1382
1383 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID);
1384 if (ret) {
1385 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1386 dev_kfree_skb(skb);
1387 }
1388
1389 return ret;
1390 }
1391
ath12k_wmi_pdev_set_ps_mode(struct ath12k * ar,int vdev_id,u32 enable)1392 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable)
1393 {
1394 struct ath12k_wmi_pdev *wmi = ar->wmi;
1395 struct wmi_pdev_set_ps_mode_cmd *cmd;
1396 struct sk_buff *skb;
1397 int ret;
1398
1399 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1400 if (!skb)
1401 return -ENOMEM;
1402
1403 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data;
1404 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD,
1405 sizeof(*cmd));
1406 cmd->vdev_id = cpu_to_le32(vdev_id);
1407 cmd->sta_ps_mode = cpu_to_le32(enable);
1408
1409 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1410 "WMI vdev set psmode %d vdev id %d\n",
1411 enable, vdev_id);
1412
1413 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID);
1414 if (ret) {
1415 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1416 dev_kfree_skb(skb);
1417 }
1418
1419 return ret;
1420 }
1421
ath12k_wmi_pdev_suspend(struct ath12k * ar,u32 suspend_opt,u32 pdev_id)1422 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt,
1423 u32 pdev_id)
1424 {
1425 struct ath12k_wmi_pdev *wmi = ar->wmi;
1426 struct wmi_pdev_suspend_cmd *cmd;
1427 struct sk_buff *skb;
1428 int ret;
1429
1430 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1431 if (!skb)
1432 return -ENOMEM;
1433
1434 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
1435
1436 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD,
1437 sizeof(*cmd));
1438
1439 cmd->suspend_opt = cpu_to_le32(suspend_opt);
1440 cmd->pdev_id = cpu_to_le32(pdev_id);
1441
1442 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1443 "WMI pdev suspend pdev_id %d\n", pdev_id);
1444
1445 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID);
1446 if (ret) {
1447 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n");
1448 dev_kfree_skb(skb);
1449 }
1450
1451 return ret;
1452 }
1453
ath12k_wmi_pdev_resume(struct ath12k * ar,u32 pdev_id)1454 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id)
1455 {
1456 struct ath12k_wmi_pdev *wmi = ar->wmi;
1457 struct wmi_pdev_resume_cmd *cmd;
1458 struct sk_buff *skb;
1459 int ret;
1460
1461 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1462 if (!skb)
1463 return -ENOMEM;
1464
1465 cmd = (struct wmi_pdev_resume_cmd *)skb->data;
1466
1467 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD,
1468 sizeof(*cmd));
1469 cmd->pdev_id = cpu_to_le32(pdev_id);
1470
1471 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1472 "WMI pdev resume pdev id %d\n", pdev_id);
1473
1474 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID);
1475 if (ret) {
1476 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n");
1477 dev_kfree_skb(skb);
1478 }
1479
1480 return ret;
1481 }
1482
1483 /* TODO FW Support for the cmd is not available yet.
1484 * Can be tested once the command and corresponding
1485 * event is implemented in FW
1486 */
ath12k_wmi_pdev_bss_chan_info_request(struct ath12k * ar,enum wmi_bss_chan_info_req_type type)1487 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
1488 enum wmi_bss_chan_info_req_type type)
1489 {
1490 struct ath12k_wmi_pdev *wmi = ar->wmi;
1491 struct wmi_pdev_bss_chan_info_req_cmd *cmd;
1492 struct sk_buff *skb;
1493 int ret;
1494
1495 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1496 if (!skb)
1497 return -ENOMEM;
1498
1499 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data;
1500
1501 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1502 sizeof(*cmd));
1503 cmd->req_type = cpu_to_le32(type);
1504 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1505
1506 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1507 "WMI bss chan info req type %d\n", type);
1508
1509 ret = ath12k_wmi_cmd_send(wmi, skb,
1510 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID);
1511 if (ret) {
1512 ath12k_warn(ar->ab,
1513 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n");
1514 dev_kfree_skb(skb);
1515 }
1516
1517 return ret;
1518 }
1519
ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k * ar,u8 * peer_addr,struct ath12k_wmi_ap_ps_arg * arg)1520 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr,
1521 struct ath12k_wmi_ap_ps_arg *arg)
1522 {
1523 struct ath12k_wmi_pdev *wmi = ar->wmi;
1524 struct wmi_ap_ps_peer_cmd *cmd;
1525 struct sk_buff *skb;
1526 int ret;
1527
1528 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1529 if (!skb)
1530 return -ENOMEM;
1531
1532 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
1533 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD,
1534 sizeof(*cmd));
1535
1536 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1537 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1538 cmd->param = cpu_to_le32(arg->param);
1539 cmd->value = cpu_to_le32(arg->value);
1540
1541 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1542 "WMI set ap ps vdev id %d peer %pM param %d value %d\n",
1543 arg->vdev_id, peer_addr, arg->param, arg->value);
1544
1545 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID);
1546 if (ret) {
1547 ath12k_warn(ar->ab,
1548 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n");
1549 dev_kfree_skb(skb);
1550 }
1551
1552 return ret;
1553 }
1554
ath12k_wmi_set_sta_ps_param(struct ath12k * ar,u32 vdev_id,u32 param,u32 param_value)1555 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id,
1556 u32 param, u32 param_value)
1557 {
1558 struct ath12k_wmi_pdev *wmi = ar->wmi;
1559 struct wmi_sta_powersave_param_cmd *cmd;
1560 struct sk_buff *skb;
1561 int ret;
1562
1563 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1564 if (!skb)
1565 return -ENOMEM;
1566
1567 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
1568 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1569 sizeof(*cmd));
1570
1571 cmd->vdev_id = cpu_to_le32(vdev_id);
1572 cmd->param = cpu_to_le32(param);
1573 cmd->value = cpu_to_le32(param_value);
1574
1575 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1576 "WMI set sta ps vdev_id %d param %d value %d\n",
1577 vdev_id, param, param_value);
1578
1579 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID);
1580 if (ret) {
1581 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID");
1582 dev_kfree_skb(skb);
1583 }
1584
1585 return ret;
1586 }
1587
ath12k_wmi_force_fw_hang_cmd(struct ath12k * ar,u32 type,u32 delay_time_ms)1588 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms)
1589 {
1590 struct ath12k_wmi_pdev *wmi = ar->wmi;
1591 struct wmi_force_fw_hang_cmd *cmd;
1592 struct sk_buff *skb;
1593 int ret, len;
1594
1595 len = sizeof(*cmd);
1596
1597 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1598 if (!skb)
1599 return -ENOMEM;
1600
1601 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
1602 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD,
1603 len);
1604
1605 cmd->type = cpu_to_le32(type);
1606 cmd->delay_time_ms = cpu_to_le32(delay_time_ms);
1607
1608 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID);
1609
1610 if (ret) {
1611 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID");
1612 dev_kfree_skb(skb);
1613 }
1614 return ret;
1615 }
1616
ath12k_wmi_vdev_set_param_cmd(struct ath12k * ar,u32 vdev_id,u32 param_id,u32 param_value)1617 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id,
1618 u32 param_id, u32 param_value)
1619 {
1620 struct ath12k_wmi_pdev *wmi = ar->wmi;
1621 struct wmi_vdev_set_param_cmd *cmd;
1622 struct sk_buff *skb;
1623 int ret;
1624
1625 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1626 if (!skb)
1627 return -ENOMEM;
1628
1629 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
1630 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD,
1631 sizeof(*cmd));
1632
1633 cmd->vdev_id = cpu_to_le32(vdev_id);
1634 cmd->param_id = cpu_to_le32(param_id);
1635 cmd->param_value = cpu_to_le32(param_value);
1636
1637 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1638 "WMI vdev id 0x%x set param %d value %d\n",
1639 vdev_id, param_id, param_value);
1640
1641 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID);
1642 if (ret) {
1643 ath12k_warn(ar->ab,
1644 "failed to send WMI_VDEV_SET_PARAM_CMDID\n");
1645 dev_kfree_skb(skb);
1646 }
1647
1648 return ret;
1649 }
1650
ath12k_wmi_send_pdev_temperature_cmd(struct ath12k * ar)1651 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar)
1652 {
1653 struct ath12k_wmi_pdev *wmi = ar->wmi;
1654 struct wmi_get_pdev_temperature_cmd *cmd;
1655 struct sk_buff *skb;
1656 int ret;
1657
1658 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1659 if (!skb)
1660 return -ENOMEM;
1661
1662 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data;
1663 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1664 sizeof(*cmd));
1665 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1666
1667 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1668 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id);
1669
1670 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID);
1671 if (ret) {
1672 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n");
1673 dev_kfree_skb(skb);
1674 }
1675
1676 return ret;
1677 }
1678
ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k * ar,u32 vdev_id,u32 bcn_ctrl_op)1679 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar,
1680 u32 vdev_id, u32 bcn_ctrl_op)
1681 {
1682 struct ath12k_wmi_pdev *wmi = ar->wmi;
1683 struct wmi_bcn_offload_ctrl_cmd *cmd;
1684 struct sk_buff *skb;
1685 int ret;
1686
1687 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1688 if (!skb)
1689 return -ENOMEM;
1690
1691 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data;
1692 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1693 sizeof(*cmd));
1694
1695 cmd->vdev_id = cpu_to_le32(vdev_id);
1696 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op);
1697
1698 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1699 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n",
1700 vdev_id, bcn_ctrl_op);
1701
1702 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID);
1703 if (ret) {
1704 ath12k_warn(ar->ab,
1705 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n");
1706 dev_kfree_skb(skb);
1707 }
1708
1709 return ret;
1710 }
1711
ath12k_wmi_bcn_tmpl(struct ath12k * ar,u32 vdev_id,struct ieee80211_mutable_offsets * offs,struct sk_buff * bcn)1712 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id,
1713 struct ieee80211_mutable_offsets *offs,
1714 struct sk_buff *bcn)
1715 {
1716 struct ath12k_wmi_pdev *wmi = ar->wmi;
1717 struct wmi_bcn_tmpl_cmd *cmd;
1718 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info;
1719 struct wmi_tlv *tlv;
1720 struct sk_buff *skb;
1721 void *ptr;
1722 int ret, len;
1723 size_t aligned_len = roundup(bcn->len, 4);
1724
1725 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len;
1726
1727 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1728 if (!skb)
1729 return -ENOMEM;
1730
1731 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data;
1732 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD,
1733 sizeof(*cmd));
1734 cmd->vdev_id = cpu_to_le32(vdev_id);
1735 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset);
1736 cmd->csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[0]);
1737 cmd->ext_csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[1]);
1738 cmd->buf_len = cpu_to_le32(bcn->len);
1739
1740 ptr = skb->data + sizeof(*cmd);
1741
1742 bcn_prb_info = ptr;
1743 len = sizeof(*bcn_prb_info);
1744 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
1745 len);
1746 bcn_prb_info->caps = 0;
1747 bcn_prb_info->erp = 0;
1748
1749 ptr += sizeof(*bcn_prb_info);
1750
1751 tlv = ptr;
1752 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
1753 memcpy(tlv->value, bcn->data, bcn->len);
1754
1755 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID);
1756 if (ret) {
1757 ath12k_warn(ar->ab, "failed to send WMI_BCN_TMPL_CMDID\n");
1758 dev_kfree_skb(skb);
1759 }
1760
1761 return ret;
1762 }
1763
ath12k_wmi_vdev_install_key(struct ath12k * ar,struct wmi_vdev_install_key_arg * arg)1764 int ath12k_wmi_vdev_install_key(struct ath12k *ar,
1765 struct wmi_vdev_install_key_arg *arg)
1766 {
1767 struct ath12k_wmi_pdev *wmi = ar->wmi;
1768 struct wmi_vdev_install_key_cmd *cmd;
1769 struct wmi_tlv *tlv;
1770 struct sk_buff *skb;
1771 int ret, len, key_len_aligned;
1772
1773 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key
1774 * length is specified in cmd->key_len.
1775 */
1776 key_len_aligned = roundup(arg->key_len, 4);
1777
1778 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned;
1779
1780 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1781 if (!skb)
1782 return -ENOMEM;
1783
1784 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
1785 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD,
1786 sizeof(*cmd));
1787 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1788 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
1789 cmd->key_idx = cpu_to_le32(arg->key_idx);
1790 cmd->key_flags = cpu_to_le32(arg->key_flags);
1791 cmd->key_cipher = cpu_to_le32(arg->key_cipher);
1792 cmd->key_len = cpu_to_le32(arg->key_len);
1793 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len);
1794 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len);
1795
1796 if (arg->key_rsc_counter)
1797 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter);
1798
1799 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
1800 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned);
1801 memcpy(tlv->value, arg->key_data, arg->key_len);
1802
1803 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1804 "WMI vdev install key idx %d cipher %d len %d\n",
1805 arg->key_idx, arg->key_cipher, arg->key_len);
1806
1807 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID);
1808 if (ret) {
1809 ath12k_warn(ar->ab,
1810 "failed to send WMI_VDEV_INSTALL_KEY cmd\n");
1811 dev_kfree_skb(skb);
1812 }
1813
1814 return ret;
1815 }
1816
ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd * cmd,struct ath12k_wmi_peer_assoc_arg * arg,bool hw_crypto_disabled)1817 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd,
1818 struct ath12k_wmi_peer_assoc_arg *arg,
1819 bool hw_crypto_disabled)
1820 {
1821 cmd->peer_flags = 0;
1822 cmd->peer_flags_ext = 0;
1823
1824 if (arg->is_wme_set) {
1825 if (arg->qos_flag)
1826 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS);
1827 if (arg->apsd_flag)
1828 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD);
1829 if (arg->ht_flag)
1830 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT);
1831 if (arg->bw_40)
1832 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ);
1833 if (arg->bw_80)
1834 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ);
1835 if (arg->bw_160)
1836 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ);
1837 if (arg->bw_320)
1838 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ);
1839
1840 /* Typically if STBC is enabled for VHT it should be enabled
1841 * for HT as well
1842 **/
1843 if (arg->stbc_flag)
1844 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC);
1845
1846 /* Typically if LDPC is enabled for VHT it should be enabled
1847 * for HT as well
1848 **/
1849 if (arg->ldpc_flag)
1850 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC);
1851
1852 if (arg->static_mimops_flag)
1853 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS);
1854 if (arg->dynamic_mimops_flag)
1855 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS);
1856 if (arg->spatial_mux_flag)
1857 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX);
1858 if (arg->vht_flag)
1859 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT);
1860 if (arg->he_flag)
1861 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE);
1862 if (arg->twt_requester)
1863 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ);
1864 if (arg->twt_responder)
1865 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP);
1866 if (arg->eht_flag)
1867 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT);
1868 }
1869
1870 /* Suppress authorization for all AUTH modes that need 4-way handshake
1871 * (during re-association).
1872 * Authorization will be done for these modes on key installation.
1873 */
1874 if (arg->auth_flag)
1875 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH);
1876 if (arg->need_ptk_4_way) {
1877 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY);
1878 if (!hw_crypto_disabled)
1879 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH);
1880 }
1881 if (arg->need_gtk_2_way)
1882 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY);
1883 /* safe mode bypass the 4-way handshake */
1884 if (arg->safe_mode_enabled)
1885 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY |
1886 WMI_PEER_NEED_GTK_2_WAY));
1887
1888 if (arg->is_pmf_enabled)
1889 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF);
1890
1891 /* Disable AMSDU for station transmit, if user configures it */
1892 /* Disable AMSDU for AP transmit to 11n Stations, if user configures
1893 * it
1894 * if (arg->amsdu_disable) Add after FW support
1895 **/
1896
1897 /* Target asserts if node is marked HT and all MCS is set to 0.
1898 * Mark the node as non-HT if all the mcs rates are disabled through
1899 * iwpriv
1900 **/
1901 if (arg->peer_ht_rates.num_rates == 0)
1902 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT);
1903 }
1904
ath12k_wmi_send_peer_assoc_cmd(struct ath12k * ar,struct ath12k_wmi_peer_assoc_arg * arg)1905 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar,
1906 struct ath12k_wmi_peer_assoc_arg *arg)
1907 {
1908 struct ath12k_wmi_pdev *wmi = ar->wmi;
1909 struct wmi_peer_assoc_complete_cmd *cmd;
1910 struct ath12k_wmi_vht_rate_set_params *mcs;
1911 struct ath12k_wmi_he_rate_set_params *he_mcs;
1912 struct ath12k_wmi_eht_rate_set_params *eht_mcs;
1913 struct sk_buff *skb;
1914 struct wmi_tlv *tlv;
1915 void *ptr;
1916 u32 peer_legacy_rates_align;
1917 u32 peer_ht_rates_align;
1918 int i, ret, len;
1919
1920 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates,
1921 sizeof(u32));
1922 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates,
1923 sizeof(u32));
1924
1925 len = sizeof(*cmd) +
1926 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) +
1927 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) +
1928 sizeof(*mcs) + TLV_HDR_SIZE +
1929 (sizeof(*he_mcs) * arg->peer_he_mcs_count) +
1930 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count) +
1931 TLV_HDR_SIZE + TLV_HDR_SIZE;
1932
1933 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1934 if (!skb)
1935 return -ENOMEM;
1936
1937 ptr = skb->data;
1938
1939 cmd = ptr;
1940 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
1941 sizeof(*cmd));
1942
1943 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1944
1945 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc);
1946 cmd->peer_associd = cpu_to_le32(arg->peer_associd);
1947 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
1948
1949 ath12k_wmi_copy_peer_flags(cmd, arg,
1950 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED,
1951 &ar->ab->dev_flags));
1952
1953 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac);
1954
1955 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps);
1956 cmd->peer_caps = cpu_to_le32(arg->peer_caps);
1957 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval);
1958 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps);
1959 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu);
1960 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density);
1961 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps);
1962 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode);
1963
1964 /* Update 11ax capabilities */
1965 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]);
1966 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]);
1967 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal);
1968 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz);
1969 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops);
1970 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
1971 cmd->peer_he_cap_phy[i] =
1972 cpu_to_le32(arg->peer_he_cap_phyinfo[i]);
1973 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1);
1974 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask);
1975 for (i = 0; i < WMI_MAX_NUM_SS; i++)
1976 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] =
1977 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]);
1978
1979 /* Update 11be capabilities */
1980 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac),
1981 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac),
1982 0);
1983 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy),
1984 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy),
1985 0);
1986 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet),
1987 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0);
1988
1989 /* Update peer legacy rate information */
1990 ptr += sizeof(*cmd);
1991
1992 tlv = ptr;
1993 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align);
1994
1995 ptr += TLV_HDR_SIZE;
1996
1997 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates);
1998 memcpy(ptr, arg->peer_legacy_rates.rates,
1999 arg->peer_legacy_rates.num_rates);
2000
2001 /* Update peer HT rate information */
2002 ptr += peer_legacy_rates_align;
2003
2004 tlv = ptr;
2005 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align);
2006 ptr += TLV_HDR_SIZE;
2007 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates);
2008 memcpy(ptr, arg->peer_ht_rates.rates,
2009 arg->peer_ht_rates.num_rates);
2010
2011 /* VHT Rates */
2012 ptr += peer_ht_rates_align;
2013
2014 mcs = ptr;
2015
2016 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET,
2017 sizeof(*mcs));
2018
2019 cmd->peer_nss = cpu_to_le32(arg->peer_nss);
2020
2021 /* Update bandwidth-NSS mapping */
2022 cmd->peer_bw_rxnss_override = 0;
2023 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override);
2024
2025 if (arg->vht_capable) {
2026 mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate);
2027 mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set);
2028 mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate);
2029 mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set);
2030 }
2031
2032 /* HE Rates */
2033 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count);
2034 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate);
2035
2036 ptr += sizeof(*mcs);
2037
2038 len = arg->peer_he_mcs_count * sizeof(*he_mcs);
2039
2040 tlv = ptr;
2041 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2042 ptr += TLV_HDR_SIZE;
2043
2044 /* Loop through the HE rate set */
2045 for (i = 0; i < arg->peer_he_mcs_count; i++) {
2046 he_mcs = ptr;
2047 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2048 sizeof(*he_mcs));
2049
2050 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]);
2051 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]);
2052 ptr += sizeof(*he_mcs);
2053 }
2054
2055 /* MLO header tag with 0 length */
2056 len = 0;
2057 tlv = ptr;
2058 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2059 ptr += TLV_HDR_SIZE;
2060
2061 /* Loop through the EHT rate set */
2062 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs);
2063 tlv = ptr;
2064 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2065 ptr += TLV_HDR_SIZE;
2066
2067 for (i = 0; i < arg->peer_eht_mcs_count; i++) {
2068 eht_mcs = ptr;
2069 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2070 sizeof(*eht_mcs));
2071
2072 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]);
2073 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]);
2074 ptr += sizeof(*eht_mcs);
2075 }
2076
2077 /* ML partner links tag with 0 length */
2078 len = 0;
2079 tlv = ptr;
2080 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2081 ptr += TLV_HDR_SIZE;
2082
2083 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2084 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x\n",
2085 cmd->vdev_id, cmd->peer_associd, arg->peer_mac,
2086 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps,
2087 cmd->peer_listen_intval, cmd->peer_ht_caps,
2088 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode,
2089 cmd->peer_mpdu_density,
2090 cmd->peer_vht_caps, cmd->peer_he_cap_info,
2091 cmd->peer_he_ops, cmd->peer_he_cap_info_ext,
2092 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1],
2093 cmd->peer_he_cap_phy[2],
2094 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext,
2095 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1],
2096 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1],
2097 cmd->peer_eht_cap_phy[2]);
2098
2099 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID);
2100 if (ret) {
2101 ath12k_warn(ar->ab,
2102 "failed to send WMI_PEER_ASSOC_CMDID\n");
2103 dev_kfree_skb(skb);
2104 }
2105
2106 return ret;
2107 }
2108
ath12k_wmi_start_scan_init(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2109 void ath12k_wmi_start_scan_init(struct ath12k *ar,
2110 struct ath12k_wmi_scan_req_arg *arg)
2111 {
2112 /* setup commonly used values */
2113 arg->scan_req_id = 1;
2114 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2115 arg->dwell_time_active = 50;
2116 arg->dwell_time_active_2g = 0;
2117 arg->dwell_time_passive = 150;
2118 arg->dwell_time_active_6g = 40;
2119 arg->dwell_time_passive_6g = 30;
2120 arg->min_rest_time = 50;
2121 arg->max_rest_time = 500;
2122 arg->repeat_probe_time = 0;
2123 arg->probe_spacing_time = 0;
2124 arg->idle_time = 0;
2125 arg->max_scan_time = 20000;
2126 arg->probe_delay = 5;
2127 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED |
2128 WMI_SCAN_EVENT_COMPLETED |
2129 WMI_SCAN_EVENT_BSS_CHANNEL |
2130 WMI_SCAN_EVENT_FOREIGN_CHAN |
2131 WMI_SCAN_EVENT_DEQUEUED;
2132 arg->scan_flags |= WMI_SCAN_CHAN_STAT_EVENT;
2133 arg->num_bssid = 1;
2134
2135 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be
2136 * ZEROs in probe request
2137 */
2138 eth_broadcast_addr(arg->bssid_list[0].addr);
2139 }
2140
ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd * cmd,struct ath12k_wmi_scan_req_arg * arg)2141 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd,
2142 struct ath12k_wmi_scan_req_arg *arg)
2143 {
2144 /* Scan events subscription */
2145 if (arg->scan_ev_started)
2146 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED);
2147 if (arg->scan_ev_completed)
2148 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED);
2149 if (arg->scan_ev_bss_chan)
2150 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL);
2151 if (arg->scan_ev_foreign_chan)
2152 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN);
2153 if (arg->scan_ev_dequeued)
2154 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED);
2155 if (arg->scan_ev_preempted)
2156 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED);
2157 if (arg->scan_ev_start_failed)
2158 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED);
2159 if (arg->scan_ev_restarted)
2160 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED);
2161 if (arg->scan_ev_foreign_chn_exit)
2162 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT);
2163 if (arg->scan_ev_suspended)
2164 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED);
2165 if (arg->scan_ev_resumed)
2166 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED);
2167
2168 /** Set scan control flags */
2169 cmd->scan_ctrl_flags = 0;
2170 if (arg->scan_f_passive)
2171 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE);
2172 if (arg->scan_f_strict_passive_pch)
2173 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN);
2174 if (arg->scan_f_promisc_mode)
2175 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS);
2176 if (arg->scan_f_capture_phy_err)
2177 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR);
2178 if (arg->scan_f_half_rate)
2179 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT);
2180 if (arg->scan_f_quarter_rate)
2181 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT);
2182 if (arg->scan_f_cck_rates)
2183 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES);
2184 if (arg->scan_f_ofdm_rates)
2185 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES);
2186 if (arg->scan_f_chan_stat_evnt)
2187 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT);
2188 if (arg->scan_f_filter_prb_req)
2189 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ);
2190 if (arg->scan_f_bcast_probe)
2191 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ);
2192 if (arg->scan_f_offchan_mgmt_tx)
2193 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX);
2194 if (arg->scan_f_offchan_data_tx)
2195 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX);
2196 if (arg->scan_f_force_active_dfs_chn)
2197 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS);
2198 if (arg->scan_f_add_tpc_ie_in_probe)
2199 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ);
2200 if (arg->scan_f_add_ds_ie_in_probe)
2201 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ);
2202 if (arg->scan_f_add_spoofed_mac_in_probe)
2203 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ);
2204 if (arg->scan_f_add_rand_seq_in_probe)
2205 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ);
2206 if (arg->scan_f_en_ie_whitelist_in_probe)
2207 cmd->scan_ctrl_flags |=
2208 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ);
2209
2210 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode,
2211 WMI_SCAN_DWELL_MODE_MASK);
2212 }
2213
ath12k_wmi_send_scan_start_cmd(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2214 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar,
2215 struct ath12k_wmi_scan_req_arg *arg)
2216 {
2217 struct ath12k_wmi_pdev *wmi = ar->wmi;
2218 struct wmi_start_scan_cmd *cmd;
2219 struct ath12k_wmi_ssid_params *ssid = NULL;
2220 struct ath12k_wmi_mac_addr_params *bssid;
2221 struct sk_buff *skb;
2222 struct wmi_tlv *tlv;
2223 void *ptr;
2224 int i, ret, len;
2225 u32 *tmp_ptr, extraie_len_with_pad = 0;
2226 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL;
2227 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL;
2228
2229 len = sizeof(*cmd);
2230
2231 len += TLV_HDR_SIZE;
2232 if (arg->num_chan)
2233 len += arg->num_chan * sizeof(u32);
2234
2235 len += TLV_HDR_SIZE;
2236 if (arg->num_ssids)
2237 len += arg->num_ssids * sizeof(*ssid);
2238
2239 len += TLV_HDR_SIZE;
2240 if (arg->num_bssid)
2241 len += sizeof(*bssid) * arg->num_bssid;
2242
2243 if (arg->num_hint_bssid)
2244 len += TLV_HDR_SIZE +
2245 arg->num_hint_bssid * sizeof(*hint_bssid);
2246
2247 if (arg->num_hint_s_ssid)
2248 len += TLV_HDR_SIZE +
2249 arg->num_hint_s_ssid * sizeof(*s_ssid);
2250
2251 len += TLV_HDR_SIZE;
2252 if (arg->extraie.len)
2253 extraie_len_with_pad =
2254 roundup(arg->extraie.len, sizeof(u32));
2255 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) {
2256 len += extraie_len_with_pad;
2257 } else {
2258 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n",
2259 arg->extraie.len);
2260 extraie_len_with_pad = 0;
2261 }
2262
2263 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2264 if (!skb)
2265 return -ENOMEM;
2266
2267 ptr = skb->data;
2268
2269 cmd = ptr;
2270 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD,
2271 sizeof(*cmd));
2272
2273 cmd->scan_id = cpu_to_le32(arg->scan_id);
2274 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id);
2275 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2276 cmd->scan_priority = cpu_to_le32(arg->scan_priority);
2277 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events);
2278
2279 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg);
2280
2281 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active);
2282 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g);
2283 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive);
2284 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g);
2285 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g);
2286 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time);
2287 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time);
2288 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time);
2289 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time);
2290 cmd->idle_time = cpu_to_le32(arg->idle_time);
2291 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time);
2292 cmd->probe_delay = cpu_to_le32(arg->probe_delay);
2293 cmd->burst_duration = cpu_to_le32(arg->burst_duration);
2294 cmd->num_chan = cpu_to_le32(arg->num_chan);
2295 cmd->num_bssid = cpu_to_le32(arg->num_bssid);
2296 cmd->num_ssids = cpu_to_le32(arg->num_ssids);
2297 cmd->ie_len = cpu_to_le32(arg->extraie.len);
2298 cmd->n_probes = cpu_to_le32(arg->n_probes);
2299
2300 ptr += sizeof(*cmd);
2301
2302 len = arg->num_chan * sizeof(u32);
2303
2304 tlv = ptr;
2305 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len);
2306 ptr += TLV_HDR_SIZE;
2307 tmp_ptr = (u32 *)ptr;
2308
2309 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4);
2310
2311 ptr += len;
2312
2313 len = arg->num_ssids * sizeof(*ssid);
2314 tlv = ptr;
2315 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2316
2317 ptr += TLV_HDR_SIZE;
2318
2319 if (arg->num_ssids) {
2320 ssid = ptr;
2321 for (i = 0; i < arg->num_ssids; ++i) {
2322 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len);
2323 memcpy(ssid->ssid, arg->ssid[i].ssid,
2324 arg->ssid[i].ssid_len);
2325 ssid++;
2326 }
2327 }
2328
2329 ptr += (arg->num_ssids * sizeof(*ssid));
2330 len = arg->num_bssid * sizeof(*bssid);
2331 tlv = ptr;
2332 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2333
2334 ptr += TLV_HDR_SIZE;
2335 bssid = ptr;
2336
2337 if (arg->num_bssid) {
2338 for (i = 0; i < arg->num_bssid; ++i) {
2339 ether_addr_copy(bssid->addr,
2340 arg->bssid_list[i].addr);
2341 bssid++;
2342 }
2343 }
2344
2345 ptr += arg->num_bssid * sizeof(*bssid);
2346
2347 len = extraie_len_with_pad;
2348 tlv = ptr;
2349 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len);
2350 ptr += TLV_HDR_SIZE;
2351
2352 if (extraie_len_with_pad)
2353 memcpy(ptr, arg->extraie.ptr,
2354 arg->extraie.len);
2355
2356 ptr += extraie_len_with_pad;
2357
2358 if (arg->num_hint_s_ssid) {
2359 len = arg->num_hint_s_ssid * sizeof(*s_ssid);
2360 tlv = ptr;
2361 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2362 ptr += TLV_HDR_SIZE;
2363 s_ssid = ptr;
2364 for (i = 0; i < arg->num_hint_s_ssid; ++i) {
2365 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags;
2366 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid;
2367 s_ssid++;
2368 }
2369 ptr += len;
2370 }
2371
2372 if (arg->num_hint_bssid) {
2373 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg);
2374 tlv = ptr;
2375 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2376 ptr += TLV_HDR_SIZE;
2377 hint_bssid = ptr;
2378 for (i = 0; i < arg->num_hint_bssid; ++i) {
2379 hint_bssid->freq_flags =
2380 arg->hint_bssid[i].freq_flags;
2381 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0],
2382 &hint_bssid->bssid.addr[0]);
2383 hint_bssid++;
2384 }
2385 }
2386
2387 ret = ath12k_wmi_cmd_send(wmi, skb,
2388 WMI_START_SCAN_CMDID);
2389 if (ret) {
2390 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n");
2391 dev_kfree_skb(skb);
2392 }
2393
2394 return ret;
2395 }
2396
ath12k_wmi_send_scan_stop_cmd(struct ath12k * ar,struct ath12k_wmi_scan_cancel_arg * arg)2397 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar,
2398 struct ath12k_wmi_scan_cancel_arg *arg)
2399 {
2400 struct ath12k_wmi_pdev *wmi = ar->wmi;
2401 struct wmi_stop_scan_cmd *cmd;
2402 struct sk_buff *skb;
2403 int ret;
2404
2405 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2406 if (!skb)
2407 return -ENOMEM;
2408
2409 cmd = (struct wmi_stop_scan_cmd *)skb->data;
2410
2411 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD,
2412 sizeof(*cmd));
2413
2414 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2415 cmd->requestor = cpu_to_le32(arg->requester);
2416 cmd->scan_id = cpu_to_le32(arg->scan_id);
2417 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2418 /* stop the scan with the corresponding scan_id */
2419 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) {
2420 /* Cancelling all scans */
2421 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL);
2422 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) {
2423 /* Cancelling VAP scans */
2424 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL);
2425 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) {
2426 /* Cancelling specific scan */
2427 cmd->req_type = WMI_SCAN_STOP_ONE;
2428 } else {
2429 ath12k_warn(ar->ab, "invalid scan cancel req_type %d",
2430 arg->req_type);
2431 dev_kfree_skb(skb);
2432 return -EINVAL;
2433 }
2434
2435 ret = ath12k_wmi_cmd_send(wmi, skb,
2436 WMI_STOP_SCAN_CMDID);
2437 if (ret) {
2438 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n");
2439 dev_kfree_skb(skb);
2440 }
2441
2442 return ret;
2443 }
2444
ath12k_wmi_send_scan_chan_list_cmd(struct ath12k * ar,struct ath12k_wmi_scan_chan_list_arg * arg)2445 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar,
2446 struct ath12k_wmi_scan_chan_list_arg *arg)
2447 {
2448 struct ath12k_wmi_pdev *wmi = ar->wmi;
2449 struct wmi_scan_chan_list_cmd *cmd;
2450 struct sk_buff *skb;
2451 struct ath12k_wmi_channel_params *chan_info;
2452 struct ath12k_wmi_channel_arg *channel_arg;
2453 struct wmi_tlv *tlv;
2454 void *ptr;
2455 int i, ret, len;
2456 u16 num_send_chans, num_sends = 0, max_chan_limit = 0;
2457 __le32 *reg1, *reg2;
2458
2459 channel_arg = &arg->channel[0];
2460 while (arg->nallchans) {
2461 len = sizeof(*cmd) + TLV_HDR_SIZE;
2462 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) /
2463 sizeof(*chan_info);
2464
2465 num_send_chans = min(arg->nallchans, max_chan_limit);
2466
2467 arg->nallchans -= num_send_chans;
2468 len += sizeof(*chan_info) * num_send_chans;
2469
2470 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2471 if (!skb)
2472 return -ENOMEM;
2473
2474 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
2475 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD,
2476 sizeof(*cmd));
2477 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2478 cmd->num_scan_chans = cpu_to_le32(num_send_chans);
2479 if (num_sends)
2480 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG);
2481
2482 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2483 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n",
2484 num_send_chans, len, cmd->pdev_id, num_sends);
2485
2486 ptr = skb->data + sizeof(*cmd);
2487
2488 len = sizeof(*chan_info) * num_send_chans;
2489 tlv = ptr;
2490 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT,
2491 len);
2492 ptr += TLV_HDR_SIZE;
2493
2494 for (i = 0; i < num_send_chans; ++i) {
2495 chan_info = ptr;
2496 memset(chan_info, 0, sizeof(*chan_info));
2497 len = sizeof(*chan_info);
2498 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
2499 len);
2500
2501 reg1 = &chan_info->reg_info_1;
2502 reg2 = &chan_info->reg_info_2;
2503 chan_info->mhz = cpu_to_le32(channel_arg->mhz);
2504 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1);
2505 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2);
2506
2507 if (channel_arg->is_chan_passive)
2508 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
2509 if (channel_arg->allow_he)
2510 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
2511 else if (channel_arg->allow_vht)
2512 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
2513 else if (channel_arg->allow_ht)
2514 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
2515 if (channel_arg->half_rate)
2516 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE);
2517 if (channel_arg->quarter_rate)
2518 chan_info->info |=
2519 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE);
2520
2521 if (channel_arg->psc_channel)
2522 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC);
2523
2524 if (channel_arg->dfs_set)
2525 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
2526
2527 chan_info->info |= le32_encode_bits(channel_arg->phy_mode,
2528 WMI_CHAN_INFO_MODE);
2529 *reg1 |= le32_encode_bits(channel_arg->minpower,
2530 WMI_CHAN_REG_INFO1_MIN_PWR);
2531 *reg1 |= le32_encode_bits(channel_arg->maxpower,
2532 WMI_CHAN_REG_INFO1_MAX_PWR);
2533 *reg1 |= le32_encode_bits(channel_arg->maxregpower,
2534 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
2535 *reg1 |= le32_encode_bits(channel_arg->reg_class_id,
2536 WMI_CHAN_REG_INFO1_REG_CLS);
2537 *reg2 |= le32_encode_bits(channel_arg->antennamax,
2538 WMI_CHAN_REG_INFO2_ANT_MAX);
2539
2540 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2541 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n",
2542 i, chan_info->mhz, chan_info->info);
2543
2544 ptr += sizeof(*chan_info);
2545
2546 channel_arg++;
2547 }
2548
2549 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID);
2550 if (ret) {
2551 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n");
2552 dev_kfree_skb(skb);
2553 return ret;
2554 }
2555
2556 num_sends++;
2557 }
2558
2559 return 0;
2560 }
2561
ath12k_wmi_send_wmm_update_cmd(struct ath12k * ar,u32 vdev_id,struct wmi_wmm_params_all_arg * param)2562 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id,
2563 struct wmi_wmm_params_all_arg *param)
2564 {
2565 struct ath12k_wmi_pdev *wmi = ar->wmi;
2566 struct wmi_vdev_set_wmm_params_cmd *cmd;
2567 struct wmi_wmm_params *wmm_param;
2568 struct wmi_wmm_params_arg *wmi_wmm_arg;
2569 struct sk_buff *skb;
2570 int ret, ac;
2571
2572 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2573 if (!skb)
2574 return -ENOMEM;
2575
2576 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data;
2577 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
2578 sizeof(*cmd));
2579
2580 cmd->vdev_id = cpu_to_le32(vdev_id);
2581 cmd->wmm_param_type = 0;
2582
2583 for (ac = 0; ac < WME_NUM_AC; ac++) {
2584 switch (ac) {
2585 case WME_AC_BE:
2586 wmi_wmm_arg = ¶m->ac_be;
2587 break;
2588 case WME_AC_BK:
2589 wmi_wmm_arg = ¶m->ac_bk;
2590 break;
2591 case WME_AC_VI:
2592 wmi_wmm_arg = ¶m->ac_vi;
2593 break;
2594 case WME_AC_VO:
2595 wmi_wmm_arg = ¶m->ac_vo;
2596 break;
2597 }
2598
2599 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac];
2600 wmm_param->tlv_header =
2601 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
2602 sizeof(*wmm_param));
2603
2604 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs);
2605 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin);
2606 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax);
2607 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop);
2608 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm);
2609 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack);
2610
2611 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2612 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n",
2613 ac, wmm_param->aifs, wmm_param->cwmin,
2614 wmm_param->cwmax, wmm_param->txoplimit,
2615 wmm_param->acm, wmm_param->no_ack);
2616 }
2617 ret = ath12k_wmi_cmd_send(wmi, skb,
2618 WMI_VDEV_SET_WMM_PARAMS_CMDID);
2619 if (ret) {
2620 ath12k_warn(ar->ab,
2621 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID");
2622 dev_kfree_skb(skb);
2623 }
2624
2625 return ret;
2626 }
2627
ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k * ar,u32 pdev_id)2628 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar,
2629 u32 pdev_id)
2630 {
2631 struct ath12k_wmi_pdev *wmi = ar->wmi;
2632 struct wmi_dfs_phyerr_offload_cmd *cmd;
2633 struct sk_buff *skb;
2634 int ret;
2635
2636 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2637 if (!skb)
2638 return -ENOMEM;
2639
2640 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data;
2641 cmd->tlv_header =
2642 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
2643 sizeof(*cmd));
2644
2645 cmd->pdev_id = cpu_to_le32(pdev_id);
2646
2647 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2648 "WMI dfs phy err offload enable pdev id %d\n", pdev_id);
2649
2650 ret = ath12k_wmi_cmd_send(wmi, skb,
2651 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID);
2652 if (ret) {
2653 ath12k_warn(ar->ab,
2654 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n");
2655 dev_kfree_skb(skb);
2656 }
2657
2658 return ret;
2659 }
2660
ath12k_wmi_delba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)2661 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
2662 u32 tid, u32 initiator, u32 reason)
2663 {
2664 struct ath12k_wmi_pdev *wmi = ar->wmi;
2665 struct wmi_delba_send_cmd *cmd;
2666 struct sk_buff *skb;
2667 int ret;
2668
2669 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2670 if (!skb)
2671 return -ENOMEM;
2672
2673 cmd = (struct wmi_delba_send_cmd *)skb->data;
2674 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD,
2675 sizeof(*cmd));
2676 cmd->vdev_id = cpu_to_le32(vdev_id);
2677 ether_addr_copy(cmd->peer_macaddr.addr, mac);
2678 cmd->tid = cpu_to_le32(tid);
2679 cmd->initiator = cpu_to_le32(initiator);
2680 cmd->reasoncode = cpu_to_le32(reason);
2681
2682 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2683 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
2684 vdev_id, mac, tid, initiator, reason);
2685
2686 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID);
2687
2688 if (ret) {
2689 ath12k_warn(ar->ab,
2690 "failed to send WMI_DELBA_SEND_CMDID cmd\n");
2691 dev_kfree_skb(skb);
2692 }
2693
2694 return ret;
2695 }
2696
ath12k_wmi_addba_set_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)2697 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac,
2698 u32 tid, u32 status)
2699 {
2700 struct ath12k_wmi_pdev *wmi = ar->wmi;
2701 struct wmi_addba_setresponse_cmd *cmd;
2702 struct sk_buff *skb;
2703 int ret;
2704
2705 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2706 if (!skb)
2707 return -ENOMEM;
2708
2709 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
2710 cmd->tlv_header =
2711 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD,
2712 sizeof(*cmd));
2713 cmd->vdev_id = cpu_to_le32(vdev_id);
2714 ether_addr_copy(cmd->peer_macaddr.addr, mac);
2715 cmd->tid = cpu_to_le32(tid);
2716 cmd->statuscode = cpu_to_le32(status);
2717
2718 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2719 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
2720 vdev_id, mac, tid, status);
2721
2722 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID);
2723
2724 if (ret) {
2725 ath12k_warn(ar->ab,
2726 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n");
2727 dev_kfree_skb(skb);
2728 }
2729
2730 return ret;
2731 }
2732
ath12k_wmi_addba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)2733 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
2734 u32 tid, u32 buf_size)
2735 {
2736 struct ath12k_wmi_pdev *wmi = ar->wmi;
2737 struct wmi_addba_send_cmd *cmd;
2738 struct sk_buff *skb;
2739 int ret;
2740
2741 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2742 if (!skb)
2743 return -ENOMEM;
2744
2745 cmd = (struct wmi_addba_send_cmd *)skb->data;
2746 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD,
2747 sizeof(*cmd));
2748 cmd->vdev_id = cpu_to_le32(vdev_id);
2749 ether_addr_copy(cmd->peer_macaddr.addr, mac);
2750 cmd->tid = cpu_to_le32(tid);
2751 cmd->buffersize = cpu_to_le32(buf_size);
2752
2753 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2754 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
2755 vdev_id, mac, tid, buf_size);
2756
2757 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID);
2758
2759 if (ret) {
2760 ath12k_warn(ar->ab,
2761 "failed to send WMI_ADDBA_SEND_CMDID cmd\n");
2762 dev_kfree_skb(skb);
2763 }
2764
2765 return ret;
2766 }
2767
ath12k_wmi_addba_clear_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac)2768 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac)
2769 {
2770 struct ath12k_wmi_pdev *wmi = ar->wmi;
2771 struct wmi_addba_clear_resp_cmd *cmd;
2772 struct sk_buff *skb;
2773 int ret;
2774
2775 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2776 if (!skb)
2777 return -ENOMEM;
2778
2779 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
2780 cmd->tlv_header =
2781 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD,
2782 sizeof(*cmd));
2783 cmd->vdev_id = cpu_to_le32(vdev_id);
2784 ether_addr_copy(cmd->peer_macaddr.addr, mac);
2785
2786 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2787 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
2788 vdev_id, mac);
2789
2790 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID);
2791
2792 if (ret) {
2793 ath12k_warn(ar->ab,
2794 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n");
2795 dev_kfree_skb(skb);
2796 }
2797
2798 return ret;
2799 }
2800
ath12k_wmi_send_init_country_cmd(struct ath12k * ar,struct ath12k_wmi_init_country_arg * arg)2801 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
2802 struct ath12k_wmi_init_country_arg *arg)
2803 {
2804 struct ath12k_wmi_pdev *wmi = ar->wmi;
2805 struct wmi_init_country_cmd *cmd;
2806 struct sk_buff *skb;
2807 int ret;
2808
2809 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2810 if (!skb)
2811 return -ENOMEM;
2812
2813 cmd = (struct wmi_init_country_cmd *)skb->data;
2814 cmd->tlv_header =
2815 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD,
2816 sizeof(*cmd));
2817
2818 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
2819
2820 switch (arg->flags) {
2821 case ALPHA_IS_SET:
2822 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA;
2823 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3);
2824 break;
2825 case CC_IS_SET:
2826 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE);
2827 cmd->cc_info.country_code =
2828 cpu_to_le32(arg->cc_info.country_code);
2829 break;
2830 case REGDMN_IS_SET:
2831 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN);
2832 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id);
2833 break;
2834 default:
2835 ret = -EINVAL;
2836 goto out;
2837 }
2838
2839 ret = ath12k_wmi_cmd_send(wmi, skb,
2840 WMI_SET_INIT_COUNTRY_CMDID);
2841
2842 out:
2843 if (ret) {
2844 ath12k_warn(ar->ab,
2845 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n",
2846 ret);
2847 dev_kfree_skb(skb);
2848 }
2849
2850 return ret;
2851 }
2852
2853 int
ath12k_wmi_send_twt_enable_cmd(struct ath12k * ar,u32 pdev_id)2854 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id)
2855 {
2856 struct ath12k_wmi_pdev *wmi = ar->wmi;
2857 struct ath12k_base *ab = wmi->wmi_ab->ab;
2858 struct wmi_twt_enable_params_cmd *cmd;
2859 struct sk_buff *skb;
2860 int ret, len;
2861
2862 len = sizeof(*cmd);
2863
2864 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2865 if (!skb)
2866 return -ENOMEM;
2867
2868 cmd = (struct wmi_twt_enable_params_cmd *)skb->data;
2869 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD,
2870 len);
2871 cmd->pdev_id = cpu_to_le32(pdev_id);
2872 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS);
2873 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE);
2874 cmd->congestion_thresh_setup =
2875 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP);
2876 cmd->congestion_thresh_teardown =
2877 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN);
2878 cmd->congestion_thresh_critical =
2879 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL);
2880 cmd->interference_thresh_teardown =
2881 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN);
2882 cmd->interference_thresh_setup =
2883 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP);
2884 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP);
2885 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN);
2886 cmd->no_of_bcast_mcast_slots =
2887 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS);
2888 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS);
2889 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT);
2890 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL);
2891 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL);
2892 cmd->remove_sta_slot_interval =
2893 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL);
2894 /* TODO add MBSSID support */
2895 cmd->mbss_support = 0;
2896
2897 ret = ath12k_wmi_cmd_send(wmi, skb,
2898 WMI_TWT_ENABLE_CMDID);
2899 if (ret) {
2900 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID");
2901 dev_kfree_skb(skb);
2902 }
2903 return ret;
2904 }
2905
2906 int
ath12k_wmi_send_twt_disable_cmd(struct ath12k * ar,u32 pdev_id)2907 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id)
2908 {
2909 struct ath12k_wmi_pdev *wmi = ar->wmi;
2910 struct ath12k_base *ab = wmi->wmi_ab->ab;
2911 struct wmi_twt_disable_params_cmd *cmd;
2912 struct sk_buff *skb;
2913 int ret, len;
2914
2915 len = sizeof(*cmd);
2916
2917 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2918 if (!skb)
2919 return -ENOMEM;
2920
2921 cmd = (struct wmi_twt_disable_params_cmd *)skb->data;
2922 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD,
2923 len);
2924 cmd->pdev_id = cpu_to_le32(pdev_id);
2925
2926 ret = ath12k_wmi_cmd_send(wmi, skb,
2927 WMI_TWT_DISABLE_CMDID);
2928 if (ret) {
2929 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID");
2930 dev_kfree_skb(skb);
2931 }
2932 return ret;
2933 }
2934
2935 int
ath12k_wmi_send_obss_spr_cmd(struct ath12k * ar,u32 vdev_id,struct ieee80211_he_obss_pd * he_obss_pd)2936 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id,
2937 struct ieee80211_he_obss_pd *he_obss_pd)
2938 {
2939 struct ath12k_wmi_pdev *wmi = ar->wmi;
2940 struct ath12k_base *ab = wmi->wmi_ab->ab;
2941 struct wmi_obss_spatial_reuse_params_cmd *cmd;
2942 struct sk_buff *skb;
2943 int ret, len;
2944
2945 len = sizeof(*cmd);
2946
2947 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2948 if (!skb)
2949 return -ENOMEM;
2950
2951 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data;
2952 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
2953 len);
2954 cmd->vdev_id = cpu_to_le32(vdev_id);
2955 cmd->enable = cpu_to_le32(he_obss_pd->enable);
2956 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset);
2957 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset);
2958
2959 ret = ath12k_wmi_cmd_send(wmi, skb,
2960 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID);
2961 if (ret) {
2962 ath12k_warn(ab,
2963 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID");
2964 dev_kfree_skb(skb);
2965 }
2966 return ret;
2967 }
2968
ath12k_wmi_obss_color_cfg_cmd(struct ath12k * ar,u32 vdev_id,u8 bss_color,u32 period,bool enable)2969 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id,
2970 u8 bss_color, u32 period,
2971 bool enable)
2972 {
2973 struct ath12k_wmi_pdev *wmi = ar->wmi;
2974 struct ath12k_base *ab = wmi->wmi_ab->ab;
2975 struct wmi_obss_color_collision_cfg_params_cmd *cmd;
2976 struct sk_buff *skb;
2977 int ret, len;
2978
2979 len = sizeof(*cmd);
2980
2981 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2982 if (!skb)
2983 return -ENOMEM;
2984
2985 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data;
2986 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
2987 len);
2988 cmd->vdev_id = cpu_to_le32(vdev_id);
2989 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) :
2990 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE);
2991 cmd->current_bss_color = cpu_to_le32(bss_color);
2992 cmd->detection_period_ms = cpu_to_le32(period);
2993 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS);
2994 cmd->free_slot_expiry_time_ms = 0;
2995 cmd->flags = 0;
2996
2997 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2998 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n",
2999 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color,
3000 cmd->detection_period_ms, cmd->scan_period_ms);
3001
3002 ret = ath12k_wmi_cmd_send(wmi, skb,
3003 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID);
3004 if (ret) {
3005 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID");
3006 dev_kfree_skb(skb);
3007 }
3008 return ret;
3009 }
3010
ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k * ar,u32 vdev_id,bool enable)3011 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id,
3012 bool enable)
3013 {
3014 struct ath12k_wmi_pdev *wmi = ar->wmi;
3015 struct ath12k_base *ab = wmi->wmi_ab->ab;
3016 struct wmi_bss_color_change_enable_params_cmd *cmd;
3017 struct sk_buff *skb;
3018 int ret, len;
3019
3020 len = sizeof(*cmd);
3021
3022 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3023 if (!skb)
3024 return -ENOMEM;
3025
3026 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data;
3027 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
3028 len);
3029 cmd->vdev_id = cpu_to_le32(vdev_id);
3030 cmd->enable = enable ? cpu_to_le32(1) : 0;
3031
3032 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3033 "wmi_send_bss_color_change_enable id %d enable %d\n",
3034 cmd->vdev_id, cmd->enable);
3035
3036 ret = ath12k_wmi_cmd_send(wmi, skb,
3037 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID);
3038 if (ret) {
3039 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID");
3040 dev_kfree_skb(skb);
3041 }
3042 return ret;
3043 }
3044
ath12k_wmi_fils_discovery_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3045 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id,
3046 struct sk_buff *tmpl)
3047 {
3048 struct wmi_tlv *tlv;
3049 struct sk_buff *skb;
3050 void *ptr;
3051 int ret, len;
3052 size_t aligned_len;
3053 struct wmi_fils_discovery_tmpl_cmd *cmd;
3054
3055 aligned_len = roundup(tmpl->len, 4);
3056 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
3057
3058 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3059 "WMI vdev %i set FILS discovery template\n", vdev_id);
3060
3061 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3062 if (!skb)
3063 return -ENOMEM;
3064
3065 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data;
3066 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD,
3067 sizeof(*cmd));
3068 cmd->vdev_id = cpu_to_le32(vdev_id);
3069 cmd->buf_len = cpu_to_le32(tmpl->len);
3070 ptr = skb->data + sizeof(*cmd);
3071
3072 tlv = ptr;
3073 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3074 memcpy(tlv->value, tmpl->data, tmpl->len);
3075
3076 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID);
3077 if (ret) {
3078 ath12k_warn(ar->ab,
3079 "WMI vdev %i failed to send FILS discovery template command\n",
3080 vdev_id);
3081 dev_kfree_skb(skb);
3082 }
3083 return ret;
3084 }
3085
ath12k_wmi_probe_resp_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3086 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id,
3087 struct sk_buff *tmpl)
3088 {
3089 struct wmi_probe_tmpl_cmd *cmd;
3090 struct ath12k_wmi_bcn_prb_info_params *probe_info;
3091 struct wmi_tlv *tlv;
3092 struct sk_buff *skb;
3093 void *ptr;
3094 int ret, len;
3095 size_t aligned_len = roundup(tmpl->len, 4);
3096
3097 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3098 "WMI vdev %i set probe response template\n", vdev_id);
3099
3100 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len;
3101
3102 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3103 if (!skb)
3104 return -ENOMEM;
3105
3106 cmd = (struct wmi_probe_tmpl_cmd *)skb->data;
3107 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD,
3108 sizeof(*cmd));
3109 cmd->vdev_id = cpu_to_le32(vdev_id);
3110 cmd->buf_len = cpu_to_le32(tmpl->len);
3111
3112 ptr = skb->data + sizeof(*cmd);
3113
3114 probe_info = ptr;
3115 len = sizeof(*probe_info);
3116 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
3117 len);
3118 probe_info->caps = 0;
3119 probe_info->erp = 0;
3120
3121 ptr += sizeof(*probe_info);
3122
3123 tlv = ptr;
3124 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3125 memcpy(tlv->value, tmpl->data, tmpl->len);
3126
3127 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID);
3128 if (ret) {
3129 ath12k_warn(ar->ab,
3130 "WMI vdev %i failed to send probe response template command\n",
3131 vdev_id);
3132 dev_kfree_skb(skb);
3133 }
3134 return ret;
3135 }
3136
ath12k_wmi_fils_discovery(struct ath12k * ar,u32 vdev_id,u32 interval,bool unsol_bcast_probe_resp_enabled)3137 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval,
3138 bool unsol_bcast_probe_resp_enabled)
3139 {
3140 struct sk_buff *skb;
3141 int ret, len;
3142 struct wmi_fils_discovery_cmd *cmd;
3143
3144 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3145 "WMI vdev %i set %s interval to %u TU\n",
3146 vdev_id, unsol_bcast_probe_resp_enabled ?
3147 "unsolicited broadcast probe response" : "FILS discovery",
3148 interval);
3149
3150 len = sizeof(*cmd);
3151 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3152 if (!skb)
3153 return -ENOMEM;
3154
3155 cmd = (struct wmi_fils_discovery_cmd *)skb->data;
3156 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD,
3157 len);
3158 cmd->vdev_id = cpu_to_le32(vdev_id);
3159 cmd->interval = cpu_to_le32(interval);
3160 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled);
3161
3162 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID);
3163 if (ret) {
3164 ath12k_warn(ar->ab,
3165 "WMI vdev %i failed to send FILS discovery enable/disable command\n",
3166 vdev_id);
3167 dev_kfree_skb(skb);
3168 }
3169 return ret;
3170 }
3171
3172 static void
ath12k_fill_band_to_mac_param(struct ath12k_base * soc,struct ath12k_wmi_pdev_band_arg * arg)3173 ath12k_fill_band_to_mac_param(struct ath12k_base *soc,
3174 struct ath12k_wmi_pdev_band_arg *arg)
3175 {
3176 u8 i;
3177 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap;
3178 struct ath12k_pdev *pdev;
3179
3180 for (i = 0; i < soc->num_radios; i++) {
3181 pdev = &soc->pdevs[i];
3182 hal_reg_cap = &soc->hal_reg_cap[i];
3183 arg[i].pdev_id = pdev->pdev_id;
3184
3185 switch (pdev->cap.supported_bands) {
3186 case WMI_HOST_WLAN_2G_5G_CAP:
3187 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3188 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3189 break;
3190 case WMI_HOST_WLAN_2G_CAP:
3191 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3192 arg[i].end_freq = hal_reg_cap->high_2ghz_chan;
3193 break;
3194 case WMI_HOST_WLAN_5G_CAP:
3195 arg[i].start_freq = hal_reg_cap->low_5ghz_chan;
3196 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3197 break;
3198 default:
3199 break;
3200 }
3201 }
3202 }
3203
3204 static void
ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params * wmi_cfg,struct ath12k_wmi_resource_config_arg * tg_cfg)3205 ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params *wmi_cfg,
3206 struct ath12k_wmi_resource_config_arg *tg_cfg)
3207 {
3208 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs);
3209 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers);
3210 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers);
3211 wmi_cfg->num_offload_reorder_buffs =
3212 cpu_to_le32(tg_cfg->num_offload_reorder_buffs);
3213 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys);
3214 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids);
3215 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit);
3216 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask);
3217 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask);
3218 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]);
3219 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]);
3220 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]);
3221 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]);
3222 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode);
3223 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req);
3224 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev);
3225 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev);
3226 wmi_cfg->roam_offload_max_ap_profiles =
3227 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles);
3228 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups);
3229 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems);
3230 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode);
3231 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size);
3232 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries);
3233 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size);
3234 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim);
3235 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check =
3236 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check);
3237 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config);
3238 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev);
3239 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc);
3240 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries);
3241 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs);
3242 wmi_cfg->num_tdls_conn_table_entries =
3243 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries);
3244 wmi_cfg->beacon_tx_offload_max_vdev =
3245 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev);
3246 wmi_cfg->num_multicast_filter_entries =
3247 cpu_to_le32(tg_cfg->num_multicast_filter_entries);
3248 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters);
3249 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern);
3250 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size);
3251 wmi_cfg->max_tdls_concurrent_sleep_sta =
3252 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta);
3253 wmi_cfg->max_tdls_concurrent_buffer_sta =
3254 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta);
3255 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate);
3256 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs);
3257 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels);
3258 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules);
3259 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size);
3260 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters);
3261 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id);
3262 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config);
3263 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version);
3264 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params);
3265 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count);
3266 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count);
3267 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported <<
3268 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT);
3269 }
3270
ath12k_init_cmd_send(struct ath12k_wmi_pdev * wmi,struct ath12k_wmi_init_cmd_arg * arg)3271 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi,
3272 struct ath12k_wmi_init_cmd_arg *arg)
3273 {
3274 struct ath12k_base *ab = wmi->wmi_ab->ab;
3275 struct sk_buff *skb;
3276 struct wmi_init_cmd *cmd;
3277 struct ath12k_wmi_resource_config_params *cfg;
3278 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode;
3279 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac;
3280 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks;
3281 struct wmi_tlv *tlv;
3282 size_t ret, len;
3283 void *ptr;
3284 u32 hw_mode_len = 0;
3285 u16 idx;
3286
3287 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX)
3288 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE +
3289 (arg->num_band_to_mac * sizeof(*band_to_mac));
3290
3291 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len +
3292 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0);
3293
3294 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3295 if (!skb)
3296 return -ENOMEM;
3297
3298 cmd = (struct wmi_init_cmd *)skb->data;
3299
3300 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD,
3301 sizeof(*cmd));
3302
3303 ptr = skb->data + sizeof(*cmd);
3304 cfg = ptr;
3305
3306 ath12k_wmi_copy_resource_config(cfg, &arg->res_cfg);
3307
3308 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG,
3309 sizeof(*cfg));
3310
3311 ptr += sizeof(*cfg);
3312 host_mem_chunks = ptr + TLV_HDR_SIZE;
3313 len = sizeof(struct ath12k_wmi_host_mem_chunk_params);
3314
3315 for (idx = 0; idx < arg->num_mem_chunks; ++idx) {
3316 host_mem_chunks[idx].tlv_header =
3317 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
3318 len);
3319
3320 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr);
3321 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len);
3322 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id);
3323
3324 ath12k_dbg(ab, ATH12K_DBG_WMI,
3325 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n",
3326 arg->mem_chunks[idx].req_id,
3327 (u64)arg->mem_chunks[idx].paddr,
3328 arg->mem_chunks[idx].len);
3329 }
3330 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks);
3331 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks;
3332
3333 /* num_mem_chunks is zero */
3334 tlv = ptr;
3335 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
3336 ptr += TLV_HDR_SIZE + len;
3337
3338 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) {
3339 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr;
3340 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
3341 sizeof(*hw_mode));
3342
3343 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id);
3344 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac);
3345
3346 ptr += sizeof(*hw_mode);
3347
3348 len = arg->num_band_to_mac * sizeof(*band_to_mac);
3349 tlv = ptr;
3350 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
3351
3352 ptr += TLV_HDR_SIZE;
3353 len = sizeof(*band_to_mac);
3354
3355 for (idx = 0; idx < arg->num_band_to_mac; idx++) {
3356 band_to_mac = (void *)ptr;
3357
3358 band_to_mac->tlv_header =
3359 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC,
3360 len);
3361 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id);
3362 band_to_mac->start_freq =
3363 cpu_to_le32(arg->band_to_mac[idx].start_freq);
3364 band_to_mac->end_freq =
3365 cpu_to_le32(arg->band_to_mac[idx].end_freq);
3366 ptr += sizeof(*band_to_mac);
3367 }
3368 }
3369
3370 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID);
3371 if (ret) {
3372 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n");
3373 dev_kfree_skb(skb);
3374 }
3375
3376 return ret;
3377 }
3378
ath12k_wmi_pdev_lro_cfg(struct ath12k * ar,int pdev_id)3379 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar,
3380 int pdev_id)
3381 {
3382 struct ath12k_wmi_pdev_lro_config_cmd *cmd;
3383 struct sk_buff *skb;
3384 int ret;
3385
3386 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3387 if (!skb)
3388 return -ENOMEM;
3389
3390 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data;
3391 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD,
3392 sizeof(*cmd));
3393
3394 get_random_bytes(cmd->th_4, sizeof(cmd->th_4));
3395 get_random_bytes(cmd->th_6, sizeof(cmd->th_6));
3396
3397 cmd->pdev_id = cpu_to_le32(pdev_id);
3398
3399 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3400 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id);
3401
3402 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID);
3403 if (ret) {
3404 ath12k_warn(ar->ab,
3405 "failed to send lro cfg req wmi cmd\n");
3406 goto err;
3407 }
3408
3409 return 0;
3410 err:
3411 dev_kfree_skb(skb);
3412 return ret;
3413 }
3414
ath12k_wmi_wait_for_service_ready(struct ath12k_base * ab)3415 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab)
3416 {
3417 unsigned long time_left;
3418
3419 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready,
3420 WMI_SERVICE_READY_TIMEOUT_HZ);
3421 if (!time_left)
3422 return -ETIMEDOUT;
3423
3424 return 0;
3425 }
3426
ath12k_wmi_wait_for_unified_ready(struct ath12k_base * ab)3427 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab)
3428 {
3429 unsigned long time_left;
3430
3431 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready,
3432 WMI_SERVICE_READY_TIMEOUT_HZ);
3433 if (!time_left)
3434 return -ETIMEDOUT;
3435
3436 return 0;
3437 }
3438
ath12k_wmi_set_hw_mode(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type mode)3439 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab,
3440 enum wmi_host_hw_mode_config_type mode)
3441 {
3442 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd;
3443 struct sk_buff *skb;
3444 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3445 int len;
3446 int ret;
3447
3448 len = sizeof(*cmd);
3449
3450 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3451 if (!skb)
3452 return -ENOMEM;
3453
3454 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data;
3455
3456 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
3457 sizeof(*cmd));
3458
3459 cmd->pdev_id = WMI_PDEV_ID_SOC;
3460 cmd->hw_mode_index = cpu_to_le32(mode);
3461
3462 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID);
3463 if (ret) {
3464 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n");
3465 dev_kfree_skb(skb);
3466 }
3467
3468 return ret;
3469 }
3470
ath12k_wmi_cmd_init(struct ath12k_base * ab)3471 int ath12k_wmi_cmd_init(struct ath12k_base *ab)
3472 {
3473 struct ath12k_wmi_base *wmi_sc = &ab->wmi_ab;
3474 struct ath12k_wmi_init_cmd_arg arg = {};
3475
3476 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
3477 ab->wmi_ab.svc_map))
3478 arg.res_cfg.is_reg_cc_ext_event_supported = true;
3479
3480 ab->hw_params->wmi_init(ab, &arg.res_cfg);
3481
3482 arg.num_mem_chunks = wmi_sc->num_mem_chunks;
3483 arg.hw_mode_id = wmi_sc->preferred_hw_mode;
3484 arg.mem_chunks = wmi_sc->mem_chunks;
3485
3486 if (ab->hw_params->single_pdev_only)
3487 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX;
3488
3489 arg.num_band_to_mac = ab->num_radios;
3490 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac);
3491
3492 return ath12k_init_cmd_send(&wmi_sc->wmi[0], &arg);
3493 }
3494
ath12k_wmi_vdev_spectral_conf(struct ath12k * ar,struct ath12k_wmi_vdev_spectral_conf_arg * arg)3495 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar,
3496 struct ath12k_wmi_vdev_spectral_conf_arg *arg)
3497 {
3498 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd;
3499 struct sk_buff *skb;
3500 int ret;
3501
3502 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3503 if (!skb)
3504 return -ENOMEM;
3505
3506 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data;
3507 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
3508 sizeof(*cmd));
3509 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
3510 cmd->scan_count = cpu_to_le32(arg->scan_count);
3511 cmd->scan_period = cpu_to_le32(arg->scan_period);
3512 cmd->scan_priority = cpu_to_le32(arg->scan_priority);
3513 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size);
3514 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena);
3515 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena);
3516 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref);
3517 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay);
3518 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr);
3519 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr);
3520 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode);
3521 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode);
3522 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr);
3523 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format);
3524 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode);
3525 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale);
3526 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj);
3527 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask);
3528
3529 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3530 "WMI spectral scan config cmd vdev_id 0x%x\n",
3531 arg->vdev_id);
3532
3533 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
3534 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID);
3535 if (ret) {
3536 ath12k_warn(ar->ab,
3537 "failed to send spectral scan config wmi cmd\n");
3538 goto err;
3539 }
3540
3541 return 0;
3542 err:
3543 dev_kfree_skb(skb);
3544 return ret;
3545 }
3546
ath12k_wmi_vdev_spectral_enable(struct ath12k * ar,u32 vdev_id,u32 trigger,u32 enable)3547 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id,
3548 u32 trigger, u32 enable)
3549 {
3550 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd;
3551 struct sk_buff *skb;
3552 int ret;
3553
3554 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3555 if (!skb)
3556 return -ENOMEM;
3557
3558 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data;
3559 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
3560 sizeof(*cmd));
3561
3562 cmd->vdev_id = cpu_to_le32(vdev_id);
3563 cmd->trigger_cmd = cpu_to_le32(trigger);
3564 cmd->enable_cmd = cpu_to_le32(enable);
3565
3566 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3567 "WMI spectral enable cmd vdev id 0x%x\n",
3568 vdev_id);
3569
3570 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
3571 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID);
3572 if (ret) {
3573 ath12k_warn(ar->ab,
3574 "failed to send spectral enable wmi cmd\n");
3575 goto err;
3576 }
3577
3578 return 0;
3579 err:
3580 dev_kfree_skb(skb);
3581 return ret;
3582 }
3583
ath12k_wmi_pdev_dma_ring_cfg(struct ath12k * ar,struct ath12k_wmi_pdev_dma_ring_cfg_arg * arg)3584 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar,
3585 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg)
3586 {
3587 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd;
3588 struct sk_buff *skb;
3589 int ret;
3590
3591 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
3592 if (!skb)
3593 return -ENOMEM;
3594
3595 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data;
3596 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ,
3597 sizeof(*cmd));
3598
3599 cmd->pdev_id = cpu_to_le32(DP_SW2HW_MACID(arg->pdev_id));
3600 cmd->module_id = cpu_to_le32(arg->module_id);
3601 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo);
3602 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi);
3603 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo);
3604 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi);
3605 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo);
3606 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi);
3607 cmd->num_elems = cpu_to_le32(arg->num_elems);
3608 cmd->buf_size = cpu_to_le32(arg->buf_size);
3609 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event);
3610 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms);
3611
3612 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3613 "WMI DMA ring cfg req cmd pdev_id 0x%x\n",
3614 arg->pdev_id);
3615
3616 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
3617 WMI_PDEV_DMA_RING_CFG_REQ_CMDID);
3618 if (ret) {
3619 ath12k_warn(ar->ab,
3620 "failed to send dma ring cfg req wmi cmd\n");
3621 goto err;
3622 }
3623
3624 return 0;
3625 err:
3626 dev_kfree_skb(skb);
3627 return ret;
3628 }
3629
ath12k_wmi_dma_buf_entry_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3630 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc,
3631 u16 tag, u16 len,
3632 const void *ptr, void *data)
3633 {
3634 struct ath12k_wmi_dma_buf_release_arg *arg = data;
3635
3636 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY)
3637 return -EPROTO;
3638
3639 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry))
3640 return -ENOBUFS;
3641
3642 arg->num_buf_entry++;
3643 return 0;
3644 }
3645
ath12k_wmi_dma_buf_meta_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3646 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc,
3647 u16 tag, u16 len,
3648 const void *ptr, void *data)
3649 {
3650 struct ath12k_wmi_dma_buf_release_arg *arg = data;
3651
3652 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA)
3653 return -EPROTO;
3654
3655 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry))
3656 return -ENOBUFS;
3657
3658 arg->num_meta++;
3659
3660 return 0;
3661 }
3662
ath12k_wmi_dma_buf_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)3663 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab,
3664 u16 tag, u16 len,
3665 const void *ptr, void *data)
3666 {
3667 struct ath12k_wmi_dma_buf_release_arg *arg = data;
3668 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed;
3669 u32 pdev_id;
3670 int ret;
3671
3672 switch (tag) {
3673 case WMI_TAG_DMA_BUF_RELEASE:
3674 fixed = ptr;
3675 arg->fixed = *fixed;
3676 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id));
3677 arg->fixed.pdev_id = cpu_to_le32(pdev_id);
3678 break;
3679 case WMI_TAG_ARRAY_STRUCT:
3680 if (!arg->buf_entry_done) {
3681 arg->num_buf_entry = 0;
3682 arg->buf_entry = ptr;
3683
3684 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
3685 ath12k_wmi_dma_buf_entry_parse,
3686 arg);
3687 if (ret) {
3688 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n",
3689 ret);
3690 return ret;
3691 }
3692
3693 arg->buf_entry_done = true;
3694 } else if (!arg->meta_data_done) {
3695 arg->num_meta = 0;
3696 arg->meta_data = ptr;
3697
3698 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
3699 ath12k_wmi_dma_buf_meta_parse,
3700 arg);
3701 if (ret) {
3702 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n",
3703 ret);
3704 return ret;
3705 }
3706
3707 arg->meta_data_done = true;
3708 }
3709 break;
3710 default:
3711 break;
3712 }
3713 return 0;
3714 }
3715
ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base * ab,struct sk_buff * skb)3716 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab,
3717 struct sk_buff *skb)
3718 {
3719 struct ath12k_wmi_dma_buf_release_arg arg = {};
3720 struct ath12k_dbring_buf_release_event param;
3721 int ret;
3722
3723 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
3724 ath12k_wmi_dma_buf_parse,
3725 &arg);
3726 if (ret) {
3727 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret);
3728 return;
3729 }
3730
3731 param.fixed = arg.fixed;
3732 param.buf_entry = arg.buf_entry;
3733 param.num_buf_entry = arg.num_buf_entry;
3734 param.meta_data = arg.meta_data;
3735 param.num_meta = arg.num_meta;
3736
3737 ret = ath12k_dbring_buffer_release_event(ab, ¶m);
3738 if (ret) {
3739 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret);
3740 return;
3741 }
3742 }
3743
ath12k_wmi_hw_mode_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3744 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc,
3745 u16 tag, u16 len,
3746 const void *ptr, void *data)
3747 {
3748 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3749 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
3750 u32 phy_map = 0;
3751
3752 if (tag != WMI_TAG_HW_MODE_CAPABILITIES)
3753 return -EPROTO;
3754
3755 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes)
3756 return -ENOBUFS;
3757
3758 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params,
3759 hw_mode_id);
3760 svc_rdy_ext->n_hw_mode_caps++;
3761
3762 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map);
3763 svc_rdy_ext->tot_phy_id += fls(phy_map);
3764
3765 return 0;
3766 }
3767
ath12k_wmi_hw_mode_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)3768 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc,
3769 u16 len, const void *ptr, void *data)
3770 {
3771 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3772 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
3773 enum wmi_host_hw_mode_config_type mode, pref;
3774 u32 i;
3775 int ret;
3776
3777 svc_rdy_ext->n_hw_mode_caps = 0;
3778 svc_rdy_ext->hw_mode_caps = ptr;
3779
3780 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
3781 ath12k_wmi_hw_mode_caps_parse,
3782 svc_rdy_ext);
3783 if (ret) {
3784 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
3785 return ret;
3786 }
3787
3788 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) {
3789 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i];
3790 mode = le32_to_cpu(hw_mode_caps->hw_mode_id);
3791
3792 if (mode >= WMI_HOST_HW_MODE_MAX)
3793 continue;
3794
3795 pref = soc->wmi_ab.preferred_hw_mode;
3796
3797 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) {
3798 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps;
3799 soc->wmi_ab.preferred_hw_mode = mode;
3800 }
3801 }
3802
3803 ath12k_dbg(soc, ATH12K_DBG_WMI, "preferred_hw_mode:%d\n",
3804 soc->wmi_ab.preferred_hw_mode);
3805 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX)
3806 return -EINVAL;
3807
3808 return 0;
3809 }
3810
ath12k_wmi_mac_phy_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3811 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc,
3812 u16 tag, u16 len,
3813 const void *ptr, void *data)
3814 {
3815 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3816
3817 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES)
3818 return -EPROTO;
3819
3820 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id)
3821 return -ENOBUFS;
3822
3823 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params));
3824 if (!svc_rdy_ext->n_mac_phy_caps) {
3825 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len,
3826 GFP_ATOMIC);
3827 if (!svc_rdy_ext->mac_phy_caps)
3828 return -ENOMEM;
3829 }
3830
3831 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len);
3832 svc_rdy_ext->n_mac_phy_caps++;
3833 return 0;
3834 }
3835
ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3836 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc,
3837 u16 tag, u16 len,
3838 const void *ptr, void *data)
3839 {
3840 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3841
3842 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT)
3843 return -EPROTO;
3844
3845 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy)
3846 return -ENOBUFS;
3847
3848 svc_rdy_ext->n_ext_hal_reg_caps++;
3849 return 0;
3850 }
3851
ath12k_wmi_ext_hal_reg_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)3852 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc,
3853 u16 len, const void *ptr, void *data)
3854 {
3855 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
3856 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3857 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap;
3858 int ret;
3859 u32 i;
3860
3861 svc_rdy_ext->n_ext_hal_reg_caps = 0;
3862 svc_rdy_ext->ext_hal_reg_caps = ptr;
3863 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
3864 ath12k_wmi_ext_hal_reg_caps_parse,
3865 svc_rdy_ext);
3866 if (ret) {
3867 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
3868 return ret;
3869 }
3870
3871 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) {
3872 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle,
3873 svc_rdy_ext->soc_hal_reg_caps,
3874 svc_rdy_ext->ext_hal_reg_caps, i,
3875 ®_cap);
3876 if (ret) {
3877 ath12k_warn(soc, "failed to extract reg cap %d\n", i);
3878 return ret;
3879 }
3880
3881 if (reg_cap.phy_id >= MAX_RADIOS) {
3882 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id);
3883 return -EINVAL;
3884 }
3885
3886 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap;
3887 }
3888 return 0;
3889 }
3890
ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base * soc,u16 len,const void * ptr,void * data)3891 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc,
3892 u16 len, const void *ptr,
3893 void *data)
3894 {
3895 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
3896 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
3897 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id);
3898 u32 phy_id_map;
3899 int pdev_index = 0;
3900 int ret;
3901
3902 svc_rdy_ext->soc_hal_reg_caps = ptr;
3903 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy);
3904
3905 soc->num_radios = 0;
3906 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map);
3907 soc->fw_pdev_count = 0;
3908
3909 while (phy_id_map && soc->num_radios < MAX_RADIOS) {
3910 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle,
3911 svc_rdy_ext,
3912 hw_mode_id, soc->num_radios,
3913 &soc->pdevs[pdev_index]);
3914 if (ret) {
3915 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n",
3916 soc->num_radios);
3917 return ret;
3918 }
3919
3920 soc->num_radios++;
3921
3922 /* For single_pdev_only targets,
3923 * save mac_phy capability in the same pdev
3924 */
3925 if (soc->hw_params->single_pdev_only)
3926 pdev_index = 0;
3927 else
3928 pdev_index = soc->num_radios;
3929
3930 /* TODO: mac_phy_cap prints */
3931 phy_id_map >>= 1;
3932 }
3933
3934 if (soc->hw_params->single_pdev_only) {
3935 soc->num_radios = 1;
3936 soc->pdevs[0].pdev_id = 0;
3937 }
3938
3939 return 0;
3940 }
3941
ath12k_wmi_dma_ring_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)3942 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc,
3943 u16 tag, u16 len,
3944 const void *ptr, void *data)
3945 {
3946 struct ath12k_wmi_dma_ring_caps_parse *parse = data;
3947
3948 if (tag != WMI_TAG_DMA_RING_CAPABILITIES)
3949 return -EPROTO;
3950
3951 parse->n_dma_ring_caps++;
3952 return 0;
3953 }
3954
ath12k_wmi_alloc_dbring_caps(struct ath12k_base * ab,u32 num_cap)3955 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab,
3956 u32 num_cap)
3957 {
3958 size_t sz;
3959 void *ptr;
3960
3961 sz = num_cap * sizeof(struct ath12k_dbring_cap);
3962 ptr = kzalloc(sz, GFP_ATOMIC);
3963 if (!ptr)
3964 return -ENOMEM;
3965
3966 ab->db_caps = ptr;
3967 ab->num_db_cap = num_cap;
3968
3969 return 0;
3970 }
3971
ath12k_wmi_free_dbring_caps(struct ath12k_base * ab)3972 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab)
3973 {
3974 kfree(ab->db_caps);
3975 ab->db_caps = NULL;
3976 }
3977
ath12k_wmi_dma_ring_caps(struct ath12k_base * ab,u16 len,const void * ptr,void * data)3978 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab,
3979 u16 len, const void *ptr, void *data)
3980 {
3981 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data;
3982 struct ath12k_wmi_dma_ring_caps_params *dma_caps;
3983 struct ath12k_dbring_cap *dir_buff_caps;
3984 int ret;
3985 u32 i;
3986
3987 dma_caps_parse->n_dma_ring_caps = 0;
3988 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr;
3989 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
3990 ath12k_wmi_dma_ring_caps_parse,
3991 dma_caps_parse);
3992 if (ret) {
3993 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret);
3994 return ret;
3995 }
3996
3997 if (!dma_caps_parse->n_dma_ring_caps)
3998 return 0;
3999
4000 if (ab->num_db_cap) {
4001 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n");
4002 return 0;
4003 }
4004
4005 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps);
4006 if (ret)
4007 return ret;
4008
4009 dir_buff_caps = ab->db_caps;
4010 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) {
4011 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) {
4012 ath12k_warn(ab, "Invalid module id %d\n",
4013 le32_to_cpu(dma_caps[i].module_id));
4014 ret = -EINVAL;
4015 goto free_dir_buff;
4016 }
4017
4018 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id);
4019 dir_buff_caps[i].pdev_id =
4020 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id));
4021 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem);
4022 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz);
4023 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align);
4024 }
4025
4026 return 0;
4027
4028 free_dir_buff:
4029 ath12k_wmi_free_dbring_caps(ab);
4030 return ret;
4031 }
4032
ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4033 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab,
4034 u16 tag, u16 len,
4035 const void *ptr, void *data)
4036 {
4037 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
4038 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4039 int ret;
4040
4041 switch (tag) {
4042 case WMI_TAG_SERVICE_READY_EXT_EVENT:
4043 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr,
4044 &svc_rdy_ext->arg);
4045 if (ret) {
4046 ath12k_warn(ab, "unable to extract ext params\n");
4047 return ret;
4048 }
4049 break;
4050
4051 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS:
4052 svc_rdy_ext->hw_caps = ptr;
4053 svc_rdy_ext->arg.num_hw_modes =
4054 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes);
4055 break;
4056
4057 case WMI_TAG_SOC_HAL_REG_CAPABILITIES:
4058 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr,
4059 svc_rdy_ext);
4060 if (ret)
4061 return ret;
4062 break;
4063
4064 case WMI_TAG_ARRAY_STRUCT:
4065 if (!svc_rdy_ext->hw_mode_done) {
4066 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext);
4067 if (ret)
4068 return ret;
4069
4070 svc_rdy_ext->hw_mode_done = true;
4071 } else if (!svc_rdy_ext->mac_phy_done) {
4072 svc_rdy_ext->n_mac_phy_caps = 0;
4073 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4074 ath12k_wmi_mac_phy_caps_parse,
4075 svc_rdy_ext);
4076 if (ret) {
4077 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4078 return ret;
4079 }
4080
4081 svc_rdy_ext->mac_phy_done = true;
4082 } else if (!svc_rdy_ext->ext_hal_reg_done) {
4083 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext);
4084 if (ret)
4085 return ret;
4086
4087 svc_rdy_ext->ext_hal_reg_done = true;
4088 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) {
4089 svc_rdy_ext->mac_phy_chainmask_combo_done = true;
4090 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) {
4091 svc_rdy_ext->mac_phy_chainmask_cap_done = true;
4092 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) {
4093 svc_rdy_ext->oem_dma_ring_cap_done = true;
4094 } else if (!svc_rdy_ext->dma_ring_cap_done) {
4095 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
4096 &svc_rdy_ext->dma_caps_parse);
4097 if (ret)
4098 return ret;
4099
4100 svc_rdy_ext->dma_ring_cap_done = true;
4101 }
4102 break;
4103
4104 default:
4105 break;
4106 }
4107 return 0;
4108 }
4109
ath12k_service_ready_ext_event(struct ath12k_base * ab,struct sk_buff * skb)4110 static int ath12k_service_ready_ext_event(struct ath12k_base *ab,
4111 struct sk_buff *skb)
4112 {
4113 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { };
4114 int ret;
4115
4116 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4117 ath12k_wmi_svc_rdy_ext_parse,
4118 &svc_rdy_ext);
4119 if (ret) {
4120 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4121 goto err;
4122 }
4123
4124 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map))
4125 complete(&ab->wmi_ab.service_ready);
4126
4127 kfree(svc_rdy_ext.mac_phy_caps);
4128 return 0;
4129
4130 err:
4131 ath12k_wmi_free_dbring_caps(ab);
4132 return ret;
4133 }
4134
ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_svc_rdy_ext2_arg * arg)4135 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle,
4136 const void *ptr,
4137 struct ath12k_wmi_svc_rdy_ext2_arg *arg)
4138 {
4139 const struct wmi_service_ready_ext2_event *ev = ptr;
4140
4141 if (!ev)
4142 return -EINVAL;
4143
4144 arg->reg_db_version = le32_to_cpu(ev->reg_db_version);
4145 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz);
4146 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz);
4147 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps);
4148 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw);
4149 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma);
4150 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo);
4151 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags);
4152 return 0;
4153 }
4154
ath12k_wmi_eht_caps_parse(struct ath12k_pdev * pdev,u32 band,const __le32 cap_mac_info[],const __le32 cap_phy_info[],const __le32 supp_mcs[],const struct ath12k_wmi_ppe_threshold_params * ppet,__le32 cap_info_internal)4155 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band,
4156 const __le32 cap_mac_info[],
4157 const __le32 cap_phy_info[],
4158 const __le32 supp_mcs[],
4159 const struct ath12k_wmi_ppe_threshold_params *ppet,
4160 __le32 cap_info_internal)
4161 {
4162 struct ath12k_band_cap *cap_band = &pdev->cap.band[band];
4163 u8 i;
4164
4165 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++)
4166 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]);
4167
4168 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++)
4169 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]);
4170
4171 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]);
4172 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]);
4173 if (band != NL80211_BAND_2GHZ) {
4174 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]);
4175 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]);
4176 }
4177
4178 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1);
4179 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info);
4180 for (i = 0; i < WMI_MAX_NUM_SS; i++)
4181 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] =
4182 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]);
4183
4184 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal);
4185 }
4186
4187 static int
ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base * ab,const struct ath12k_wmi_caps_ext_params * caps,struct ath12k_pdev * pdev)4188 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab,
4189 const struct ath12k_wmi_caps_ext_params *caps,
4190 struct ath12k_pdev *pdev)
4191 {
4192 u32 bands;
4193 int i;
4194
4195 if (ab->hw_params->single_pdev_only) {
4196 for (i = 0; i < ab->fw_pdev_count; i++) {
4197 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i];
4198
4199 if (fw_pdev->pdev_id == le32_to_cpu(caps->pdev_id) &&
4200 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) {
4201 bands = fw_pdev->supported_bands;
4202 break;
4203 }
4204 }
4205
4206 if (i == ab->fw_pdev_count)
4207 return -EINVAL;
4208 } else {
4209 bands = pdev->cap.supported_bands;
4210 }
4211
4212 if (bands & WMI_HOST_WLAN_2G_CAP) {
4213 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ,
4214 caps->eht_cap_mac_info_2ghz,
4215 caps->eht_cap_phy_info_2ghz,
4216 caps->eht_supp_mcs_ext_2ghz,
4217 &caps->eht_ppet_2ghz,
4218 caps->eht_cap_info_internal);
4219 }
4220
4221 if (bands & WMI_HOST_WLAN_5G_CAP) {
4222 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ,
4223 caps->eht_cap_mac_info_5ghz,
4224 caps->eht_cap_phy_info_5ghz,
4225 caps->eht_supp_mcs_ext_5ghz,
4226 &caps->eht_ppet_5ghz,
4227 caps->eht_cap_info_internal);
4228
4229 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ,
4230 caps->eht_cap_mac_info_5ghz,
4231 caps->eht_cap_phy_info_5ghz,
4232 caps->eht_supp_mcs_ext_5ghz,
4233 &caps->eht_ppet_5ghz,
4234 caps->eht_cap_info_internal);
4235 }
4236
4237 return 0;
4238 }
4239
ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4240 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag,
4241 u16 len, const void *ptr,
4242 void *data)
4243 {
4244 const struct ath12k_wmi_caps_ext_params *caps = ptr;
4245 int i = 0, ret;
4246
4247 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT)
4248 return -EPROTO;
4249
4250 if (ab->hw_params->single_pdev_only) {
4251 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id))
4252 return 0;
4253 } else {
4254 for (i = 0; i < ab->num_radios; i++) {
4255 if (ab->pdevs[i].pdev_id == le32_to_cpu(caps->pdev_id))
4256 break;
4257 }
4258
4259 if (i == ab->num_radios)
4260 return -EINVAL;
4261 }
4262
4263 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]);
4264 if (ret) {
4265 ath12k_warn(ab,
4266 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n",
4267 ret, ab->pdevs[i].pdev_id);
4268 return ret;
4269 }
4270
4271 return 0;
4272 }
4273
ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4274 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab,
4275 u16 tag, u16 len,
4276 const void *ptr, void *data)
4277 {
4278 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
4279 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data;
4280 int ret;
4281
4282 switch (tag) {
4283 case WMI_TAG_SERVICE_READY_EXT2_EVENT:
4284 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr,
4285 &parse->arg);
4286 if (ret) {
4287 ath12k_warn(ab,
4288 "failed to extract wmi service ready ext2 parameters: %d\n",
4289 ret);
4290 return ret;
4291 }
4292 break;
4293
4294 case WMI_TAG_ARRAY_STRUCT:
4295 if (!parse->dma_ring_cap_done) {
4296 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
4297 &parse->dma_caps_parse);
4298 if (ret)
4299 return ret;
4300
4301 parse->dma_ring_cap_done = true;
4302 } else if (!parse->spectral_bin_scaling_done) {
4303 /* TODO: This is a place-holder as WMI tag for
4304 * spectral scaling is before
4305 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT
4306 */
4307 parse->spectral_bin_scaling_done = true;
4308 } else if (!parse->mac_phy_caps_ext_done) {
4309 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4310 ath12k_wmi_tlv_mac_phy_caps_ext,
4311 parse);
4312 if (ret) {
4313 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n",
4314 ret);
4315 return ret;
4316 }
4317
4318 parse->mac_phy_caps_ext_done = true;
4319 }
4320 break;
4321 default:
4322 break;
4323 }
4324
4325 return 0;
4326 }
4327
ath12k_service_ready_ext2_event(struct ath12k_base * ab,struct sk_buff * skb)4328 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab,
4329 struct sk_buff *skb)
4330 {
4331 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { };
4332 int ret;
4333
4334 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4335 ath12k_wmi_svc_rdy_ext2_parse,
4336 &svc_rdy_ext2);
4337 if (ret) {
4338 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret);
4339 goto err;
4340 }
4341
4342 complete(&ab->wmi_ab.service_ready);
4343
4344 return 0;
4345
4346 err:
4347 ath12k_wmi_free_dbring_caps(ab);
4348 return ret;
4349 }
4350
ath12k_pull_vdev_start_resp_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_start_resp_event * vdev_rsp)4351 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb,
4352 struct wmi_vdev_start_resp_event *vdev_rsp)
4353 {
4354 const void **tb;
4355 const struct wmi_vdev_start_resp_event *ev;
4356 int ret;
4357
4358 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4359 if (IS_ERR(tb)) {
4360 ret = PTR_ERR(tb);
4361 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4362 return ret;
4363 }
4364
4365 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT];
4366 if (!ev) {
4367 ath12k_warn(ab, "failed to fetch vdev start resp ev");
4368 kfree(tb);
4369 return -EPROTO;
4370 }
4371
4372 *vdev_rsp = *ev;
4373
4374 kfree(tb);
4375 return 0;
4376 }
4377
4378 static struct ath12k_reg_rule
create_ext_reg_rules_from_wmi(u32 num_reg_rules,struct ath12k_wmi_reg_rule_ext_params * wmi_reg_rule)4379 *create_ext_reg_rules_from_wmi(u32 num_reg_rules,
4380 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule)
4381 {
4382 struct ath12k_reg_rule *reg_rule_ptr;
4383 u32 count;
4384
4385 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)),
4386 GFP_ATOMIC);
4387
4388 if (!reg_rule_ptr)
4389 return NULL;
4390
4391 for (count = 0; count < num_reg_rules; count++) {
4392 reg_rule_ptr[count].start_freq =
4393 le32_get_bits(wmi_reg_rule[count].freq_info,
4394 REG_RULE_START_FREQ);
4395 reg_rule_ptr[count].end_freq =
4396 le32_get_bits(wmi_reg_rule[count].freq_info,
4397 REG_RULE_END_FREQ);
4398 reg_rule_ptr[count].max_bw =
4399 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4400 REG_RULE_MAX_BW);
4401 reg_rule_ptr[count].reg_power =
4402 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4403 REG_RULE_REG_PWR);
4404 reg_rule_ptr[count].ant_gain =
4405 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
4406 REG_RULE_ANT_GAIN);
4407 reg_rule_ptr[count].flags =
4408 le32_get_bits(wmi_reg_rule[count].flag_info,
4409 REG_RULE_FLAGS);
4410 reg_rule_ptr[count].psd_flag =
4411 le32_get_bits(wmi_reg_rule[count].psd_power_info,
4412 REG_RULE_PSD_INFO);
4413 reg_rule_ptr[count].psd_eirp =
4414 le32_get_bits(wmi_reg_rule[count].psd_power_info,
4415 REG_RULE_PSD_EIRP);
4416 }
4417
4418 return reg_rule_ptr;
4419 }
4420
ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_reg_info * reg_info)4421 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab,
4422 struct sk_buff *skb,
4423 struct ath12k_reg_info *reg_info)
4424 {
4425 const void **tb;
4426 const struct wmi_reg_chan_list_cc_ext_event *ev;
4427 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule;
4428 u32 num_2g_reg_rules, num_5g_reg_rules;
4429 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4430 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4431 u32 total_reg_rules = 0;
4432 int ret, i, j;
4433
4434 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n");
4435
4436 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4437 if (IS_ERR(tb)) {
4438 ret = PTR_ERR(tb);
4439 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4440 return ret;
4441 }
4442
4443 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
4444 if (!ev) {
4445 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n");
4446 kfree(tb);
4447 return -EPROTO;
4448 }
4449
4450 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules);
4451 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules);
4452 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] =
4453 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi);
4454 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] =
4455 le32_to_cpu(ev->num_6g_reg_rules_ap_sp);
4456 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] =
4457 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp);
4458
4459 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4460 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
4461 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]);
4462 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
4463 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]);
4464 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
4465 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]);
4466 }
4467
4468 num_2g_reg_rules = reg_info->num_2g_reg_rules;
4469 total_reg_rules += num_2g_reg_rules;
4470 num_5g_reg_rules = reg_info->num_5g_reg_rules;
4471 total_reg_rules += num_5g_reg_rules;
4472
4473 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) {
4474 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n",
4475 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES);
4476 kfree(tb);
4477 return -EINVAL;
4478 }
4479
4480 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
4481 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i];
4482
4483 if (num_6g_reg_rules_ap[i] > MAX_6G_REG_RULES) {
4484 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n",
4485 i, num_6g_reg_rules_ap[i], MAX_6G_REG_RULES);
4486 kfree(tb);
4487 return -EINVAL;
4488 }
4489
4490 total_reg_rules += num_6g_reg_rules_ap[i];
4491 }
4492
4493 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4494 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
4495 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
4496 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
4497
4498 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
4499 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
4500 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
4501
4502 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
4503 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
4504 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
4505
4506 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6G_REG_RULES ||
4507 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6G_REG_RULES ||
4508 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6G_REG_RULES) {
4509 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n",
4510 i);
4511 kfree(tb);
4512 return -EINVAL;
4513 }
4514 }
4515
4516 if (!total_reg_rules) {
4517 ath12k_warn(ab, "No reg rules available\n");
4518 kfree(tb);
4519 return -EINVAL;
4520 }
4521
4522 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
4523
4524 /* FIXME: Currently FW includes 6G reg rule also in 5G rule
4525 * list for country US.
4526 * Having same 6G reg rule in 5G and 6G rules list causes
4527 * intersect check to be true, and same rules will be shown
4528 * multiple times in iw cmd. So added hack below to avoid
4529 * parsing 6G rule from 5G reg rule list, and this can be
4530 * removed later, after FW updates to remove 6G reg rule
4531 * from 5G rules list.
4532 */
4533 if (memcmp(reg_info->alpha2, "US", 2) == 0) {
4534 reg_info->num_5g_reg_rules = REG_US_5G_NUM_REG_RULES;
4535 num_5g_reg_rules = reg_info->num_5g_reg_rules;
4536 }
4537
4538 reg_info->dfs_region = le32_to_cpu(ev->dfs_region);
4539 reg_info->phybitmap = le32_to_cpu(ev->phybitmap);
4540 reg_info->num_phy = le32_to_cpu(ev->num_phy);
4541 reg_info->phy_id = le32_to_cpu(ev->phy_id);
4542 reg_info->ctry_code = le32_to_cpu(ev->country_id);
4543 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code);
4544
4545 switch (le32_to_cpu(ev->status_code)) {
4546 case WMI_REG_SET_CC_STATUS_PASS:
4547 reg_info->status_code = REG_SET_CC_STATUS_PASS;
4548 break;
4549 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
4550 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND;
4551 break;
4552 case WMI_REG_INIT_ALPHA2_NOT_FOUND:
4553 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND;
4554 break;
4555 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
4556 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED;
4557 break;
4558 case WMI_REG_SET_CC_STATUS_NO_MEMORY:
4559 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY;
4560 break;
4561 case WMI_REG_SET_CC_STATUS_FAIL:
4562 reg_info->status_code = REG_SET_CC_STATUS_FAIL;
4563 break;
4564 }
4565
4566 reg_info->is_ext_reg_event = true;
4567
4568 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g);
4569 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g);
4570 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g);
4571 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g);
4572 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi);
4573 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi);
4574 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp);
4575 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp);
4576 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp);
4577 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp);
4578
4579 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4580 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] =
4581 le32_to_cpu(ev->min_bw_6g_client_lpi[i]);
4582 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] =
4583 le32_to_cpu(ev->max_bw_6g_client_lpi[i]);
4584 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
4585 le32_to_cpu(ev->min_bw_6g_client_sp[i]);
4586 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
4587 le32_to_cpu(ev->max_bw_6g_client_sp[i]);
4588 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] =
4589 le32_to_cpu(ev->min_bw_6g_client_vlp[i]);
4590 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] =
4591 le32_to_cpu(ev->max_bw_6g_client_vlp[i]);
4592 }
4593
4594 ath12k_dbg(ab, ATH12K_DBG_WMI,
4595 "%s:cc_ext %s dsf %d BW: min_2g %d max_2g %d min_5g %d max_5g %d",
4596 __func__, reg_info->alpha2, reg_info->dfs_region,
4597 reg_info->min_bw_2g, reg_info->max_bw_2g,
4598 reg_info->min_bw_5g, reg_info->max_bw_5g);
4599
4600 ath12k_dbg(ab, ATH12K_DBG_WMI,
4601 "num_2g_reg_rules %d num_5g_reg_rules %d",
4602 num_2g_reg_rules, num_5g_reg_rules);
4603
4604 ath12k_dbg(ab, ATH12K_DBG_WMI,
4605 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d",
4606 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP],
4607 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP],
4608 num_6g_reg_rules_ap[WMI_REG_VLP_AP]);
4609
4610 ath12k_dbg(ab, ATH12K_DBG_WMI,
4611 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
4612 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT],
4613 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT],
4614 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]);
4615
4616 ath12k_dbg(ab, ATH12K_DBG_WMI,
4617 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
4618 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT],
4619 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT],
4620 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]);
4621
4622 ext_wmi_reg_rule =
4623 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev
4624 + sizeof(*ev)
4625 + sizeof(struct wmi_tlv));
4626
4627 if (num_2g_reg_rules) {
4628 reg_info->reg_rules_2g_ptr =
4629 create_ext_reg_rules_from_wmi(num_2g_reg_rules,
4630 ext_wmi_reg_rule);
4631
4632 if (!reg_info->reg_rules_2g_ptr) {
4633 kfree(tb);
4634 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n");
4635 return -ENOMEM;
4636 }
4637 }
4638
4639 if (num_5g_reg_rules) {
4640 ext_wmi_reg_rule += num_2g_reg_rules;
4641 reg_info->reg_rules_5g_ptr =
4642 create_ext_reg_rules_from_wmi(num_5g_reg_rules,
4643 ext_wmi_reg_rule);
4644
4645 if (!reg_info->reg_rules_5g_ptr) {
4646 kfree(tb);
4647 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n");
4648 return -ENOMEM;
4649 }
4650 }
4651
4652 ext_wmi_reg_rule += num_5g_reg_rules;
4653
4654 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
4655 reg_info->reg_rules_6g_ap_ptr[i] =
4656 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i],
4657 ext_wmi_reg_rule);
4658
4659 if (!reg_info->reg_rules_6g_ap_ptr[i]) {
4660 kfree(tb);
4661 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n");
4662 return -ENOMEM;
4663 }
4664
4665 ext_wmi_reg_rule += num_6g_reg_rules_ap[i];
4666 }
4667
4668 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
4669 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4670 reg_info->reg_rules_6g_client_ptr[j][i] =
4671 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i],
4672 ext_wmi_reg_rule);
4673
4674 if (!reg_info->reg_rules_6g_client_ptr[j][i]) {
4675 kfree(tb);
4676 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n");
4677 return -ENOMEM;
4678 }
4679
4680 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i];
4681 }
4682 }
4683
4684 reg_info->client_type = le32_to_cpu(ev->client_type);
4685 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable;
4686 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable;
4687 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] =
4688 le32_to_cpu(ev->domain_code_6g_ap_lpi);
4689 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] =
4690 le32_to_cpu(ev->domain_code_6g_ap_sp);
4691 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] =
4692 le32_to_cpu(ev->domain_code_6g_ap_vlp);
4693
4694 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
4695 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] =
4696 le32_to_cpu(ev->domain_code_6g_client_lpi[i]);
4697 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] =
4698 le32_to_cpu(ev->domain_code_6g_client_sp[i]);
4699 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] =
4700 le32_to_cpu(ev->domain_code_6g_client_vlp[i]);
4701 }
4702
4703 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id);
4704
4705 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d",
4706 reg_info->client_type, reg_info->domain_code_6g_super_id);
4707
4708 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n");
4709
4710 kfree(tb);
4711 return 0;
4712 }
4713
ath12k_pull_peer_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_delete_resp_event * peer_del_resp)4714 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb,
4715 struct wmi_peer_delete_resp_event *peer_del_resp)
4716 {
4717 const void **tb;
4718 const struct wmi_peer_delete_resp_event *ev;
4719 int ret;
4720
4721 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4722 if (IS_ERR(tb)) {
4723 ret = PTR_ERR(tb);
4724 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4725 return ret;
4726 }
4727
4728 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT];
4729 if (!ev) {
4730 ath12k_warn(ab, "failed to fetch peer delete resp ev");
4731 kfree(tb);
4732 return -EPROTO;
4733 }
4734
4735 memset(peer_del_resp, 0, sizeof(*peer_del_resp));
4736
4737 peer_del_resp->vdev_id = ev->vdev_id;
4738 ether_addr_copy(peer_del_resp->peer_macaddr.addr,
4739 ev->peer_macaddr.addr);
4740
4741 kfree(tb);
4742 return 0;
4743 }
4744
ath12k_pull_vdev_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)4745 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab,
4746 struct sk_buff *skb,
4747 u32 *vdev_id)
4748 {
4749 const void **tb;
4750 const struct wmi_vdev_delete_resp_event *ev;
4751 int ret;
4752
4753 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4754 if (IS_ERR(tb)) {
4755 ret = PTR_ERR(tb);
4756 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4757 return ret;
4758 }
4759
4760 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT];
4761 if (!ev) {
4762 ath12k_warn(ab, "failed to fetch vdev delete resp ev");
4763 kfree(tb);
4764 return -EPROTO;
4765 }
4766
4767 *vdev_id = le32_to_cpu(ev->vdev_id);
4768
4769 kfree(tb);
4770 return 0;
4771 }
4772
ath12k_pull_bcn_tx_status_ev(struct ath12k_base * ab,void * evt_buf,u32 len,u32 * vdev_id,u32 * tx_status)4773 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab, void *evt_buf,
4774 u32 len, u32 *vdev_id,
4775 u32 *tx_status)
4776 {
4777 const void **tb;
4778 const struct wmi_bcn_tx_status_event *ev;
4779 int ret;
4780
4781 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC);
4782 if (IS_ERR(tb)) {
4783 ret = PTR_ERR(tb);
4784 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4785 return ret;
4786 }
4787
4788 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT];
4789 if (!ev) {
4790 ath12k_warn(ab, "failed to fetch bcn tx status ev");
4791 kfree(tb);
4792 return -EPROTO;
4793 }
4794
4795 *vdev_id = le32_to_cpu(ev->vdev_id);
4796 *tx_status = le32_to_cpu(ev->tx_status);
4797
4798 kfree(tb);
4799 return 0;
4800 }
4801
ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)4802 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb,
4803 u32 *vdev_id)
4804 {
4805 const void **tb;
4806 const struct wmi_vdev_stopped_event *ev;
4807 int ret;
4808
4809 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4810 if (IS_ERR(tb)) {
4811 ret = PTR_ERR(tb);
4812 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4813 return ret;
4814 }
4815
4816 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT];
4817 if (!ev) {
4818 ath12k_warn(ab, "failed to fetch vdev stop ev");
4819 kfree(tb);
4820 return -EPROTO;
4821 }
4822
4823 *vdev_id = le32_to_cpu(ev->vdev_id);
4824
4825 kfree(tb);
4826 return 0;
4827 }
4828
ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4829 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab,
4830 u16 tag, u16 len,
4831 const void *ptr, void *data)
4832 {
4833 struct wmi_tlv_mgmt_rx_parse *parse = data;
4834
4835 switch (tag) {
4836 case WMI_TAG_MGMT_RX_HDR:
4837 parse->fixed = ptr;
4838 break;
4839 case WMI_TAG_ARRAY_BYTE:
4840 if (!parse->frame_buf_done) {
4841 parse->frame_buf = ptr;
4842 parse->frame_buf_done = true;
4843 }
4844 break;
4845 }
4846 return 0;
4847 }
4848
ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_wmi_mgmt_rx_arg * hdr)4849 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab,
4850 struct sk_buff *skb,
4851 struct ath12k_wmi_mgmt_rx_arg *hdr)
4852 {
4853 struct wmi_tlv_mgmt_rx_parse parse = { };
4854 const struct ath12k_wmi_mgmt_rx_params *ev;
4855 const u8 *frame;
4856 int i, ret;
4857
4858 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4859 ath12k_wmi_tlv_mgmt_rx_parse,
4860 &parse);
4861 if (ret) {
4862 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret);
4863 return ret;
4864 }
4865
4866 ev = parse.fixed;
4867 frame = parse.frame_buf;
4868
4869 if (!ev || !frame) {
4870 ath12k_warn(ab, "failed to fetch mgmt rx hdr");
4871 return -EPROTO;
4872 }
4873
4874 hdr->pdev_id = le32_to_cpu(ev->pdev_id);
4875 hdr->chan_freq = le32_to_cpu(ev->chan_freq);
4876 hdr->channel = le32_to_cpu(ev->channel);
4877 hdr->snr = le32_to_cpu(ev->snr);
4878 hdr->rate = le32_to_cpu(ev->rate);
4879 hdr->phy_mode = le32_to_cpu(ev->phy_mode);
4880 hdr->buf_len = le32_to_cpu(ev->buf_len);
4881 hdr->status = le32_to_cpu(ev->status);
4882 hdr->flags = le32_to_cpu(ev->flags);
4883 hdr->rssi = a_sle32_to_cpu(ev->rssi);
4884 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta);
4885
4886 for (i = 0; i < ATH_MAX_ANTENNA; i++)
4887 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]);
4888
4889 if (skb->len < (frame - skb->data) + hdr->buf_len) {
4890 ath12k_warn(ab, "invalid length in mgmt rx hdr ev");
4891 return -EPROTO;
4892 }
4893
4894 /* shift the sk_buff to point to `frame` */
4895 skb_trim(skb, 0);
4896 skb_put(skb, frame - skb->data);
4897 skb_pull(skb, frame - skb->data);
4898 skb_put(skb, hdr->buf_len);
4899
4900 return 0;
4901 }
4902
wmi_process_mgmt_tx_comp(struct ath12k * ar,u32 desc_id,u32 status)4903 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id,
4904 u32 status)
4905 {
4906 struct sk_buff *msdu;
4907 struct ieee80211_tx_info *info;
4908 struct ath12k_skb_cb *skb_cb;
4909 int num_mgmt;
4910
4911 spin_lock_bh(&ar->txmgmt_idr_lock);
4912 msdu = idr_find(&ar->txmgmt_idr, desc_id);
4913
4914 if (!msdu) {
4915 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n",
4916 desc_id);
4917 spin_unlock_bh(&ar->txmgmt_idr_lock);
4918 return -ENOENT;
4919 }
4920
4921 idr_remove(&ar->txmgmt_idr, desc_id);
4922 spin_unlock_bh(&ar->txmgmt_idr_lock);
4923
4924 skb_cb = ATH12K_SKB_CB(msdu);
4925 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
4926
4927 info = IEEE80211_SKB_CB(msdu);
4928 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status)
4929 info->flags |= IEEE80211_TX_STAT_ACK;
4930
4931 ieee80211_tx_status_irqsafe(ar->hw, msdu);
4932
4933 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx);
4934
4935 /* WARN when we received this event without doing any mgmt tx */
4936 if (num_mgmt < 0)
4937 WARN_ON_ONCE(1);
4938
4939 if (!num_mgmt)
4940 wake_up(&ar->txmgmt_empty_waitq);
4941
4942 return 0;
4943 }
4944
ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_mgmt_tx_compl_event * param)4945 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab,
4946 struct sk_buff *skb,
4947 struct wmi_mgmt_tx_compl_event *param)
4948 {
4949 const void **tb;
4950 const struct wmi_mgmt_tx_compl_event *ev;
4951 int ret;
4952
4953 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
4954 if (IS_ERR(tb)) {
4955 ret = PTR_ERR(tb);
4956 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
4957 return ret;
4958 }
4959
4960 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT];
4961 if (!ev) {
4962 ath12k_warn(ab, "failed to fetch mgmt tx compl ev");
4963 kfree(tb);
4964 return -EPROTO;
4965 }
4966
4967 param->pdev_id = ev->pdev_id;
4968 param->desc_id = ev->desc_id;
4969 param->status = ev->status;
4970
4971 kfree(tb);
4972 return 0;
4973 }
4974
ath12k_wmi_event_scan_started(struct ath12k * ar)4975 static void ath12k_wmi_event_scan_started(struct ath12k *ar)
4976 {
4977 lockdep_assert_held(&ar->data_lock);
4978
4979 switch (ar->scan.state) {
4980 case ATH12K_SCAN_IDLE:
4981 case ATH12K_SCAN_RUNNING:
4982 case ATH12K_SCAN_ABORTING:
4983 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n",
4984 ath12k_scan_state_str(ar->scan.state),
4985 ar->scan.state);
4986 break;
4987 case ATH12K_SCAN_STARTING:
4988 ar->scan.state = ATH12K_SCAN_RUNNING;
4989 complete(&ar->scan.started);
4990 break;
4991 }
4992 }
4993
ath12k_wmi_event_scan_start_failed(struct ath12k * ar)4994 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar)
4995 {
4996 lockdep_assert_held(&ar->data_lock);
4997
4998 switch (ar->scan.state) {
4999 case ATH12K_SCAN_IDLE:
5000 case ATH12K_SCAN_RUNNING:
5001 case ATH12K_SCAN_ABORTING:
5002 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n",
5003 ath12k_scan_state_str(ar->scan.state),
5004 ar->scan.state);
5005 break;
5006 case ATH12K_SCAN_STARTING:
5007 complete(&ar->scan.started);
5008 __ath12k_mac_scan_finish(ar);
5009 break;
5010 }
5011 }
5012
ath12k_wmi_event_scan_completed(struct ath12k * ar)5013 static void ath12k_wmi_event_scan_completed(struct ath12k *ar)
5014 {
5015 lockdep_assert_held(&ar->data_lock);
5016
5017 switch (ar->scan.state) {
5018 case ATH12K_SCAN_IDLE:
5019 case ATH12K_SCAN_STARTING:
5020 /* One suspected reason scan can be completed while starting is
5021 * if firmware fails to deliver all scan events to the host,
5022 * e.g. when transport pipe is full. This has been observed
5023 * with spectral scan phyerr events starving wmi transport
5024 * pipe. In such case the "scan completed" event should be (and
5025 * is) ignored by the host as it may be just firmware's scan
5026 * state machine recovering.
5027 */
5028 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n",
5029 ath12k_scan_state_str(ar->scan.state),
5030 ar->scan.state);
5031 break;
5032 case ATH12K_SCAN_RUNNING:
5033 case ATH12K_SCAN_ABORTING:
5034 __ath12k_mac_scan_finish(ar);
5035 break;
5036 }
5037 }
5038
ath12k_wmi_event_scan_bss_chan(struct ath12k * ar)5039 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar)
5040 {
5041 lockdep_assert_held(&ar->data_lock);
5042
5043 switch (ar->scan.state) {
5044 case ATH12K_SCAN_IDLE:
5045 case ATH12K_SCAN_STARTING:
5046 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5047 ath12k_scan_state_str(ar->scan.state),
5048 ar->scan.state);
5049 break;
5050 case ATH12K_SCAN_RUNNING:
5051 case ATH12K_SCAN_ABORTING:
5052 ar->scan_channel = NULL;
5053 break;
5054 }
5055 }
5056
ath12k_wmi_event_scan_foreign_chan(struct ath12k * ar,u32 freq)5057 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq)
5058 {
5059 lockdep_assert_held(&ar->data_lock);
5060
5061 switch (ar->scan.state) {
5062 case ATH12K_SCAN_IDLE:
5063 case ATH12K_SCAN_STARTING:
5064 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5065 ath12k_scan_state_str(ar->scan.state),
5066 ar->scan.state);
5067 break;
5068 case ATH12K_SCAN_RUNNING:
5069 case ATH12K_SCAN_ABORTING:
5070 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
5071 break;
5072 }
5073 }
5074
5075 static const char *
ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)5076 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
5077 enum wmi_scan_completion_reason reason)
5078 {
5079 switch (type) {
5080 case WMI_SCAN_EVENT_STARTED:
5081 return "started";
5082 case WMI_SCAN_EVENT_COMPLETED:
5083 switch (reason) {
5084 case WMI_SCAN_REASON_COMPLETED:
5085 return "completed";
5086 case WMI_SCAN_REASON_CANCELLED:
5087 return "completed [cancelled]";
5088 case WMI_SCAN_REASON_PREEMPTED:
5089 return "completed [preempted]";
5090 case WMI_SCAN_REASON_TIMEDOUT:
5091 return "completed [timedout]";
5092 case WMI_SCAN_REASON_INTERNAL_FAILURE:
5093 return "completed [internal err]";
5094 case WMI_SCAN_REASON_MAX:
5095 break;
5096 }
5097 return "completed [unknown]";
5098 case WMI_SCAN_EVENT_BSS_CHANNEL:
5099 return "bss channel";
5100 case WMI_SCAN_EVENT_FOREIGN_CHAN:
5101 return "foreign channel";
5102 case WMI_SCAN_EVENT_DEQUEUED:
5103 return "dequeued";
5104 case WMI_SCAN_EVENT_PREEMPTED:
5105 return "preempted";
5106 case WMI_SCAN_EVENT_START_FAILED:
5107 return "start failed";
5108 case WMI_SCAN_EVENT_RESTARTED:
5109 return "restarted";
5110 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
5111 return "foreign channel exit";
5112 default:
5113 return "unknown";
5114 }
5115 }
5116
ath12k_pull_scan_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_scan_event * scan_evt_param)5117 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb,
5118 struct wmi_scan_event *scan_evt_param)
5119 {
5120 const void **tb;
5121 const struct wmi_scan_event *ev;
5122 int ret;
5123
5124 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5125 if (IS_ERR(tb)) {
5126 ret = PTR_ERR(tb);
5127 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5128 return ret;
5129 }
5130
5131 ev = tb[WMI_TAG_SCAN_EVENT];
5132 if (!ev) {
5133 ath12k_warn(ab, "failed to fetch scan ev");
5134 kfree(tb);
5135 return -EPROTO;
5136 }
5137
5138 scan_evt_param->event_type = ev->event_type;
5139 scan_evt_param->reason = ev->reason;
5140 scan_evt_param->channel_freq = ev->channel_freq;
5141 scan_evt_param->scan_req_id = ev->scan_req_id;
5142 scan_evt_param->scan_id = ev->scan_id;
5143 scan_evt_param->vdev_id = ev->vdev_id;
5144 scan_evt_param->tsf_timestamp = ev->tsf_timestamp;
5145
5146 kfree(tb);
5147 return 0;
5148 }
5149
ath12k_pull_peer_sta_kickout_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_sta_kickout_arg * arg)5150 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb,
5151 struct wmi_peer_sta_kickout_arg *arg)
5152 {
5153 const void **tb;
5154 const struct wmi_peer_sta_kickout_event *ev;
5155 int ret;
5156
5157 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5158 if (IS_ERR(tb)) {
5159 ret = PTR_ERR(tb);
5160 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5161 return ret;
5162 }
5163
5164 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT];
5165 if (!ev) {
5166 ath12k_warn(ab, "failed to fetch peer sta kickout ev");
5167 kfree(tb);
5168 return -EPROTO;
5169 }
5170
5171 arg->mac_addr = ev->peer_macaddr.addr;
5172
5173 kfree(tb);
5174 return 0;
5175 }
5176
ath12k_pull_roam_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_roam_event * roam_ev)5177 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb,
5178 struct wmi_roam_event *roam_ev)
5179 {
5180 const void **tb;
5181 const struct wmi_roam_event *ev;
5182 int ret;
5183
5184 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5185 if (IS_ERR(tb)) {
5186 ret = PTR_ERR(tb);
5187 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5188 return ret;
5189 }
5190
5191 ev = tb[WMI_TAG_ROAM_EVENT];
5192 if (!ev) {
5193 ath12k_warn(ab, "failed to fetch roam ev");
5194 kfree(tb);
5195 return -EPROTO;
5196 }
5197
5198 roam_ev->vdev_id = ev->vdev_id;
5199 roam_ev->reason = ev->reason;
5200 roam_ev->rssi = ev->rssi;
5201
5202 kfree(tb);
5203 return 0;
5204 }
5205
freq_to_idx(struct ath12k * ar,int freq)5206 static int freq_to_idx(struct ath12k *ar, int freq)
5207 {
5208 struct ieee80211_supported_band *sband;
5209 int band, ch, idx = 0;
5210
5211 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
5212 if (!ar->mac.sbands[band].channels)
5213 continue;
5214
5215 sband = ar->hw->wiphy->bands[band];
5216 if (!sband)
5217 continue;
5218
5219 for (ch = 0; ch < sband->n_channels; ch++, idx++)
5220 if (sband->channels[ch].center_freq == freq)
5221 goto exit;
5222 }
5223
5224 exit:
5225 return idx;
5226 }
5227
ath12k_pull_chan_info_ev(struct ath12k_base * ab,u8 * evt_buf,u32 len,struct wmi_chan_info_event * ch_info_ev)5228 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, u8 *evt_buf,
5229 u32 len, struct wmi_chan_info_event *ch_info_ev)
5230 {
5231 const void **tb;
5232 const struct wmi_chan_info_event *ev;
5233 int ret;
5234
5235 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC);
5236 if (IS_ERR(tb)) {
5237 ret = PTR_ERR(tb);
5238 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5239 return ret;
5240 }
5241
5242 ev = tb[WMI_TAG_CHAN_INFO_EVENT];
5243 if (!ev) {
5244 ath12k_warn(ab, "failed to fetch chan info ev");
5245 kfree(tb);
5246 return -EPROTO;
5247 }
5248
5249 ch_info_ev->err_code = ev->err_code;
5250 ch_info_ev->freq = ev->freq;
5251 ch_info_ev->cmd_flags = ev->cmd_flags;
5252 ch_info_ev->noise_floor = ev->noise_floor;
5253 ch_info_ev->rx_clear_count = ev->rx_clear_count;
5254 ch_info_ev->cycle_count = ev->cycle_count;
5255 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range;
5256 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
5257 ch_info_ev->rx_frame_count = ev->rx_frame_count;
5258 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt;
5259 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz;
5260 ch_info_ev->vdev_id = ev->vdev_id;
5261
5262 kfree(tb);
5263 return 0;
5264 }
5265
5266 static int
ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_pdev_bss_chan_info_event * bss_ch_info_ev)5267 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
5268 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev)
5269 {
5270 const void **tb;
5271 const struct wmi_pdev_bss_chan_info_event *ev;
5272 int ret;
5273
5274 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5275 if (IS_ERR(tb)) {
5276 ret = PTR_ERR(tb);
5277 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5278 return ret;
5279 }
5280
5281 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT];
5282 if (!ev) {
5283 ath12k_warn(ab, "failed to fetch pdev bss chan info ev");
5284 kfree(tb);
5285 return -EPROTO;
5286 }
5287
5288 bss_ch_info_ev->pdev_id = ev->pdev_id;
5289 bss_ch_info_ev->freq = ev->freq;
5290 bss_ch_info_ev->noise_floor = ev->noise_floor;
5291 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low;
5292 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high;
5293 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low;
5294 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high;
5295 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low;
5296 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high;
5297 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low;
5298 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high;
5299 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low;
5300 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high;
5301
5302 kfree(tb);
5303 return 0;
5304 }
5305
5306 static int
ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_install_key_complete_arg * arg)5307 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb,
5308 struct wmi_vdev_install_key_complete_arg *arg)
5309 {
5310 const void **tb;
5311 const struct wmi_vdev_install_key_compl_event *ev;
5312 int ret;
5313
5314 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5315 if (IS_ERR(tb)) {
5316 ret = PTR_ERR(tb);
5317 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5318 return ret;
5319 }
5320
5321 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT];
5322 if (!ev) {
5323 ath12k_warn(ab, "failed to fetch vdev install key compl ev");
5324 kfree(tb);
5325 return -EPROTO;
5326 }
5327
5328 arg->vdev_id = le32_to_cpu(ev->vdev_id);
5329 arg->macaddr = ev->peer_macaddr.addr;
5330 arg->key_idx = le32_to_cpu(ev->key_idx);
5331 arg->key_flags = le32_to_cpu(ev->key_flags);
5332 arg->status = le32_to_cpu(ev->status);
5333
5334 kfree(tb);
5335 return 0;
5336 }
5337
ath12k_pull_peer_assoc_conf_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_assoc_conf_arg * peer_assoc_conf)5338 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb,
5339 struct wmi_peer_assoc_conf_arg *peer_assoc_conf)
5340 {
5341 const void **tb;
5342 const struct wmi_peer_assoc_conf_event *ev;
5343 int ret;
5344
5345 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
5346 if (IS_ERR(tb)) {
5347 ret = PTR_ERR(tb);
5348 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5349 return ret;
5350 }
5351
5352 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT];
5353 if (!ev) {
5354 ath12k_warn(ab, "failed to fetch peer assoc conf ev");
5355 kfree(tb);
5356 return -EPROTO;
5357 }
5358
5359 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id);
5360 peer_assoc_conf->macaddr = ev->peer_macaddr.addr;
5361
5362 kfree(tb);
5363 return 0;
5364 }
5365
5366 static int
ath12k_pull_pdev_temp_ev(struct ath12k_base * ab,u8 * evt_buf,u32 len,const struct wmi_pdev_temperature_event * ev)5367 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, u8 *evt_buf,
5368 u32 len, const struct wmi_pdev_temperature_event *ev)
5369 {
5370 const void **tb;
5371 int ret;
5372
5373 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC);
5374 if (IS_ERR(tb)) {
5375 ret = PTR_ERR(tb);
5376 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5377 return ret;
5378 }
5379
5380 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT];
5381 if (!ev) {
5382 ath12k_warn(ab, "failed to fetch pdev temp ev");
5383 kfree(tb);
5384 return -EPROTO;
5385 }
5386
5387 kfree(tb);
5388 return 0;
5389 }
5390
ath12k_wmi_op_ep_tx_credits(struct ath12k_base * ab)5391 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab)
5392 {
5393 /* try to send pending beacons first. they take priority */
5394 wake_up(&ab->wmi_ab.tx_credits_wq);
5395 }
5396
ath12k_wmi_htc_tx_complete(struct ath12k_base * ab,struct sk_buff * skb)5397 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab,
5398 struct sk_buff *skb)
5399 {
5400 dev_kfree_skb(skb);
5401 }
5402
ath12k_reg_is_world_alpha(char * alpha)5403 static bool ath12k_reg_is_world_alpha(char *alpha)
5404 {
5405 return alpha[0] == '0' && alpha[1] == '0';
5406 }
5407
ath12k_reg_chan_list_event(struct ath12k_base * ab,struct sk_buff * skb)5408 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb)
5409 {
5410 struct ath12k_reg_info *reg_info = NULL;
5411 struct ieee80211_regdomain *regd = NULL;
5412 bool intersect = false;
5413 int ret = 0, pdev_idx, i, j;
5414 struct ath12k *ar;
5415
5416 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC);
5417 if (!reg_info) {
5418 ret = -ENOMEM;
5419 goto fallback;
5420 }
5421
5422 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info);
5423
5424 if (ret) {
5425 ath12k_warn(ab, "failed to extract regulatory info from received event\n");
5426 goto fallback;
5427 }
5428
5429 if (reg_info->status_code != REG_SET_CC_STATUS_PASS) {
5430 /* In case of failure to set the requested ctry,
5431 * fw retains the current regd. We print a failure info
5432 * and return from here.
5433 */
5434 ath12k_warn(ab, "Failed to set the requested Country regulatory setting\n");
5435 goto mem_free;
5436 }
5437
5438 pdev_idx = reg_info->phy_id;
5439
5440 if (pdev_idx >= ab->num_radios) {
5441 /* Process the event for phy0 only if single_pdev_only
5442 * is true. If pdev_idx is valid but not 0, discard the
5443 * event. Otherwise, it goes to fallback.
5444 */
5445 if (ab->hw_params->single_pdev_only &&
5446 pdev_idx < ab->hw_params->num_rxmda_per_pdev)
5447 goto mem_free;
5448 else
5449 goto fallback;
5450 }
5451
5452 /* Avoid multiple overwrites to default regd, during core
5453 * stop-start after mac registration.
5454 */
5455 if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] &&
5456 !memcmp(ab->default_regd[pdev_idx]->alpha2,
5457 reg_info->alpha2, 2))
5458 goto mem_free;
5459
5460 /* Intersect new rules with default regd if a new country setting was
5461 * requested, i.e a default regd was already set during initialization
5462 * and the regd coming from this event has a valid country info.
5463 */
5464 if (ab->default_regd[pdev_idx] &&
5465 !ath12k_reg_is_world_alpha((char *)
5466 ab->default_regd[pdev_idx]->alpha2) &&
5467 !ath12k_reg_is_world_alpha((char *)reg_info->alpha2))
5468 intersect = true;
5469
5470 regd = ath12k_reg_build_regd(ab, reg_info, intersect);
5471 if (!regd) {
5472 ath12k_warn(ab, "failed to build regd from reg_info\n");
5473 goto fallback;
5474 }
5475
5476 spin_lock(&ab->base_lock);
5477 if (test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)) {
5478 /* Once mac is registered, ar is valid and all CC events from
5479 * fw is considered to be received due to user requests
5480 * currently.
5481 * Free previously built regd before assigning the newly
5482 * generated regd to ar. NULL pointer handling will be
5483 * taken care by kfree itself.
5484 */
5485 ar = ab->pdevs[pdev_idx].ar;
5486 kfree(ab->new_regd[pdev_idx]);
5487 ab->new_regd[pdev_idx] = regd;
5488 queue_work(ab->workqueue, &ar->regd_update_work);
5489 } else {
5490 /* Multiple events for the same *ar is not expected. But we
5491 * can still clear any previously stored default_regd if we
5492 * are receiving this event for the same radio by mistake.
5493 * NULL pointer handling will be taken care by kfree itself.
5494 */
5495 kfree(ab->default_regd[pdev_idx]);
5496 /* This regd would be applied during mac registration */
5497 ab->default_regd[pdev_idx] = regd;
5498 }
5499 ab->dfs_region = reg_info->dfs_region;
5500 spin_unlock(&ab->base_lock);
5501
5502 goto mem_free;
5503
5504 fallback:
5505 /* Fallback to older reg (by sending previous country setting
5506 * again if fw has succeeded and we failed to process here.
5507 * The Regdomain should be uniform across driver and fw. Since the
5508 * FW has processed the command and sent a success status, we expect
5509 * this function to succeed as well. If it doesn't, CTRY needs to be
5510 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent.
5511 */
5512 /* TODO: This is rare, but still should also be handled */
5513 WARN_ON(1);
5514 mem_free:
5515 if (reg_info) {
5516 kfree(reg_info->reg_rules_2g_ptr);
5517 kfree(reg_info->reg_rules_5g_ptr);
5518 if (reg_info->is_ext_reg_event) {
5519 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++)
5520 kfree(reg_info->reg_rules_6g_ap_ptr[i]);
5521
5522 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++)
5523 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++)
5524 kfree(reg_info->reg_rules_6g_client_ptr[j][i]);
5525 }
5526 kfree(reg_info);
5527 }
5528 return ret;
5529 }
5530
ath12k_wmi_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5531 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
5532 const void *ptr, void *data)
5533 {
5534 struct ath12k_wmi_rdy_parse *rdy_parse = data;
5535 struct wmi_ready_event fixed_param;
5536 struct ath12k_wmi_mac_addr_params *addr_list;
5537 struct ath12k_pdev *pdev;
5538 u32 num_mac_addr;
5539 int i;
5540
5541 switch (tag) {
5542 case WMI_TAG_READY_EVENT:
5543 memset(&fixed_param, 0, sizeof(fixed_param));
5544 memcpy(&fixed_param, (struct wmi_ready_event *)ptr,
5545 min_t(u16, sizeof(fixed_param), len));
5546 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status);
5547 rdy_parse->num_extra_mac_addr =
5548 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr);
5549
5550 ether_addr_copy(ab->mac_addr,
5551 fixed_param.ready_event_min.mac_addr.addr);
5552 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum);
5553 ab->wmi_ready = true;
5554 break;
5555 case WMI_TAG_ARRAY_FIXED_STRUCT:
5556 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr;
5557 num_mac_addr = rdy_parse->num_extra_mac_addr;
5558
5559 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios))
5560 break;
5561
5562 for (i = 0; i < ab->num_radios; i++) {
5563 pdev = &ab->pdevs[i];
5564 ether_addr_copy(pdev->mac_addr, addr_list[i].addr);
5565 }
5566 ab->pdevs_macaddr_valid = true;
5567 break;
5568 default:
5569 break;
5570 }
5571
5572 return 0;
5573 }
5574
ath12k_ready_event(struct ath12k_base * ab,struct sk_buff * skb)5575 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
5576 {
5577 struct ath12k_wmi_rdy_parse rdy_parse = { };
5578 int ret;
5579
5580 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5581 ath12k_wmi_rdy_parse, &rdy_parse);
5582 if (ret) {
5583 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
5584 return ret;
5585 }
5586
5587 complete(&ab->wmi_ab.unified_ready);
5588 return 0;
5589 }
5590
ath12k_peer_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)5591 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
5592 {
5593 struct wmi_peer_delete_resp_event peer_del_resp;
5594 struct ath12k *ar;
5595
5596 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) {
5597 ath12k_warn(ab, "failed to extract peer delete resp");
5598 return;
5599 }
5600
5601 rcu_read_lock();
5602 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id));
5603 if (!ar) {
5604 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d",
5605 peer_del_resp.vdev_id);
5606 rcu_read_unlock();
5607 return;
5608 }
5609
5610 complete(&ar->peer_delete_done);
5611 rcu_read_unlock();
5612 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n",
5613 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr);
5614 }
5615
ath12k_vdev_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)5616 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab,
5617 struct sk_buff *skb)
5618 {
5619 struct ath12k *ar;
5620 u32 vdev_id = 0;
5621
5622 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) {
5623 ath12k_warn(ab, "failed to extract vdev delete resp");
5624 return;
5625 }
5626
5627 rcu_read_lock();
5628 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
5629 if (!ar) {
5630 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d",
5631 vdev_id);
5632 rcu_read_unlock();
5633 return;
5634 }
5635
5636 complete(&ar->vdev_delete_done);
5637
5638 rcu_read_unlock();
5639
5640 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n",
5641 vdev_id);
5642 }
5643
ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)5644 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)
5645 {
5646 switch (vdev_resp_status) {
5647 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID:
5648 return "invalid vdev id";
5649 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED:
5650 return "not supported";
5651 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION:
5652 return "dfs violation";
5653 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN:
5654 return "invalid regdomain";
5655 default:
5656 return "unknown";
5657 }
5658 }
5659
ath12k_vdev_start_resp_event(struct ath12k_base * ab,struct sk_buff * skb)5660 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
5661 {
5662 struct wmi_vdev_start_resp_event vdev_start_resp;
5663 struct ath12k *ar;
5664 u32 status;
5665
5666 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) {
5667 ath12k_warn(ab, "failed to extract vdev start resp");
5668 return;
5669 }
5670
5671 rcu_read_lock();
5672 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id));
5673 if (!ar) {
5674 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d",
5675 vdev_start_resp.vdev_id);
5676 rcu_read_unlock();
5677 return;
5678 }
5679
5680 ar->last_wmi_vdev_start_status = 0;
5681
5682 status = le32_to_cpu(vdev_start_resp.status);
5683
5684 if (WARN_ON_ONCE(status)) {
5685 ath12k_warn(ab, "vdev start resp error status %d (%s)\n",
5686 status, ath12k_wmi_vdev_resp_print(status));
5687 ar->last_wmi_vdev_start_status = status;
5688 }
5689
5690 complete(&ar->vdev_setup_done);
5691
5692 rcu_read_unlock();
5693
5694 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d",
5695 vdev_start_resp.vdev_id);
5696 }
5697
ath12k_bcn_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)5698 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb)
5699 {
5700 u32 vdev_id, tx_status;
5701
5702 if (ath12k_pull_bcn_tx_status_ev(ab, skb->data, skb->len,
5703 &vdev_id, &tx_status) != 0) {
5704 ath12k_warn(ab, "failed to extract bcn tx status");
5705 return;
5706 }
5707 }
5708
ath12k_vdev_stopped_event(struct ath12k_base * ab,struct sk_buff * skb)5709 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb)
5710 {
5711 struct ath12k *ar;
5712 u32 vdev_id = 0;
5713
5714 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) {
5715 ath12k_warn(ab, "failed to extract vdev stopped event");
5716 return;
5717 }
5718
5719 rcu_read_lock();
5720 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
5721 if (!ar) {
5722 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d",
5723 vdev_id);
5724 rcu_read_unlock();
5725 return;
5726 }
5727
5728 complete(&ar->vdev_setup_done);
5729
5730 rcu_read_unlock();
5731
5732 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id);
5733 }
5734
ath12k_mgmt_rx_event(struct ath12k_base * ab,struct sk_buff * skb)5735 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb)
5736 {
5737 struct ath12k_wmi_mgmt_rx_arg rx_ev = {0};
5738 struct ath12k *ar;
5739 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
5740 struct ieee80211_hdr *hdr;
5741 u16 fc;
5742 struct ieee80211_supported_band *sband;
5743
5744 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) {
5745 ath12k_warn(ab, "failed to extract mgmt rx event");
5746 dev_kfree_skb(skb);
5747 return;
5748 }
5749
5750 memset(status, 0, sizeof(*status));
5751
5752 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n",
5753 rx_ev.status);
5754
5755 rcu_read_lock();
5756 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id);
5757
5758 if (!ar) {
5759 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n",
5760 rx_ev.pdev_id);
5761 dev_kfree_skb(skb);
5762 goto exit;
5763 }
5764
5765 if ((test_bit(ATH12K_CAC_RUNNING, &ar->dev_flags)) ||
5766 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT |
5767 WMI_RX_STATUS_ERR_KEY_CACHE_MISS |
5768 WMI_RX_STATUS_ERR_CRC))) {
5769 dev_kfree_skb(skb);
5770 goto exit;
5771 }
5772
5773 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC)
5774 status->flag |= RX_FLAG_MMIC_ERROR;
5775
5776 if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ &&
5777 rx_ev.chan_freq <= ATH12K_MAX_6G_FREQ) {
5778 status->band = NL80211_BAND_6GHZ;
5779 status->freq = rx_ev.chan_freq;
5780 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) {
5781 status->band = NL80211_BAND_2GHZ;
5782 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) {
5783 status->band = NL80211_BAND_5GHZ;
5784 } else {
5785 /* Shouldn't happen unless list of advertised channels to
5786 * mac80211 has been changed.
5787 */
5788 WARN_ON_ONCE(1);
5789 dev_kfree_skb(skb);
5790 goto exit;
5791 }
5792
5793 if (rx_ev.phy_mode == MODE_11B &&
5794 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ))
5795 ath12k_dbg(ab, ATH12K_DBG_WMI,
5796 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band);
5797
5798 sband = &ar->mac.sbands[status->band];
5799
5800 if (status->band != NL80211_BAND_6GHZ)
5801 status->freq = ieee80211_channel_to_frequency(rx_ev.channel,
5802 status->band);
5803
5804 status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR;
5805 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100);
5806
5807 hdr = (struct ieee80211_hdr *)skb->data;
5808 fc = le16_to_cpu(hdr->frame_control);
5809
5810 /* Firmware is guaranteed to report all essential management frames via
5811 * WMI while it can deliver some extra via HTT. Since there can be
5812 * duplicates split the reporting wrt monitor/sniffing.
5813 */
5814 status->flag |= RX_FLAG_SKIP_MONITOR;
5815
5816 /* In case of PMF, FW delivers decrypted frames with Protected Bit set
5817 * including group privacy action frames.
5818 */
5819 if (ieee80211_has_protected(hdr->frame_control)) {
5820 status->flag |= RX_FLAG_DECRYPTED;
5821
5822 if (!ieee80211_is_robust_mgmt_frame(skb)) {
5823 status->flag |= RX_FLAG_IV_STRIPPED |
5824 RX_FLAG_MMIC_STRIPPED;
5825 hdr->frame_control = __cpu_to_le16(fc &
5826 ~IEEE80211_FCTL_PROTECTED);
5827 }
5828 }
5829
5830 /* TODO: Pending handle beacon implementation
5831 *if (ieee80211_is_beacon(hdr->frame_control))
5832 * ath12k_mac_handle_beacon(ar, skb);
5833 */
5834
5835 ath12k_dbg(ab, ATH12K_DBG_MGMT,
5836 "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
5837 skb, skb->len,
5838 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
5839
5840 ath12k_dbg(ab, ATH12K_DBG_MGMT,
5841 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
5842 status->freq, status->band, status->signal,
5843 status->rate_idx);
5844
5845 ieee80211_rx_ni(ar->hw, skb);
5846
5847 exit:
5848 rcu_read_unlock();
5849 }
5850
ath12k_mgmt_tx_compl_event(struct ath12k_base * ab,struct sk_buff * skb)5851 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb)
5852 {
5853 struct wmi_mgmt_tx_compl_event tx_compl_param = {0};
5854 struct ath12k *ar;
5855
5856 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) {
5857 ath12k_warn(ab, "failed to extract mgmt tx compl event");
5858 return;
5859 }
5860
5861 rcu_read_lock();
5862 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id));
5863 if (!ar) {
5864 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n",
5865 tx_compl_param.pdev_id);
5866 goto exit;
5867 }
5868
5869 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id),
5870 le32_to_cpu(tx_compl_param.status));
5871
5872 ath12k_dbg(ab, ATH12K_DBG_MGMT,
5873 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
5874 tx_compl_param.pdev_id, tx_compl_param.desc_id,
5875 tx_compl_param.status);
5876
5877 exit:
5878 rcu_read_unlock();
5879 }
5880
ath12k_get_ar_on_scan_abort(struct ath12k_base * ab,u32 vdev_id)5881 static struct ath12k *ath12k_get_ar_on_scan_abort(struct ath12k_base *ab,
5882 u32 vdev_id)
5883 {
5884 int i;
5885 struct ath12k_pdev *pdev;
5886 struct ath12k *ar;
5887
5888 for (i = 0; i < ab->num_radios; i++) {
5889 pdev = rcu_dereference(ab->pdevs_active[i]);
5890 if (pdev && pdev->ar) {
5891 ar = pdev->ar;
5892
5893 spin_lock_bh(&ar->data_lock);
5894 if (ar->scan.state == ATH12K_SCAN_ABORTING &&
5895 ar->scan.vdev_id == vdev_id) {
5896 spin_unlock_bh(&ar->data_lock);
5897 return ar;
5898 }
5899 spin_unlock_bh(&ar->data_lock);
5900 }
5901 }
5902 return NULL;
5903 }
5904
ath12k_scan_event(struct ath12k_base * ab,struct sk_buff * skb)5905 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb)
5906 {
5907 struct ath12k *ar;
5908 struct wmi_scan_event scan_ev = {0};
5909
5910 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) {
5911 ath12k_warn(ab, "failed to extract scan event");
5912 return;
5913 }
5914
5915 rcu_read_lock();
5916
5917 /* In case the scan was cancelled, ex. during interface teardown,
5918 * the interface will not be found in active interfaces.
5919 * Rather, in such scenarios, iterate over the active pdev's to
5920 * search 'ar' if the corresponding 'ar' scan is ABORTING and the
5921 * aborting scan's vdev id matches this event info.
5922 */
5923 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED &&
5924 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED)
5925 ar = ath12k_get_ar_on_scan_abort(ab, le32_to_cpu(scan_ev.vdev_id));
5926 else
5927 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id));
5928
5929 if (!ar) {
5930 ath12k_warn(ab, "Received scan event for unknown vdev");
5931 rcu_read_unlock();
5932 return;
5933 }
5934
5935 spin_lock_bh(&ar->data_lock);
5936
5937 ath12k_dbg(ab, ATH12K_DBG_WMI,
5938 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
5939 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type),
5940 le32_to_cpu(scan_ev.reason)),
5941 le32_to_cpu(scan_ev.event_type),
5942 le32_to_cpu(scan_ev.reason),
5943 le32_to_cpu(scan_ev.channel_freq),
5944 le32_to_cpu(scan_ev.scan_req_id),
5945 le32_to_cpu(scan_ev.scan_id),
5946 le32_to_cpu(scan_ev.vdev_id),
5947 ath12k_scan_state_str(ar->scan.state), ar->scan.state);
5948
5949 switch (le32_to_cpu(scan_ev.event_type)) {
5950 case WMI_SCAN_EVENT_STARTED:
5951 ath12k_wmi_event_scan_started(ar);
5952 break;
5953 case WMI_SCAN_EVENT_COMPLETED:
5954 ath12k_wmi_event_scan_completed(ar);
5955 break;
5956 case WMI_SCAN_EVENT_BSS_CHANNEL:
5957 ath12k_wmi_event_scan_bss_chan(ar);
5958 break;
5959 case WMI_SCAN_EVENT_FOREIGN_CHAN:
5960 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq));
5961 break;
5962 case WMI_SCAN_EVENT_START_FAILED:
5963 ath12k_warn(ab, "received scan start failure event\n");
5964 ath12k_wmi_event_scan_start_failed(ar);
5965 break;
5966 case WMI_SCAN_EVENT_DEQUEUED:
5967 __ath12k_mac_scan_finish(ar);
5968 break;
5969 case WMI_SCAN_EVENT_PREEMPTED:
5970 case WMI_SCAN_EVENT_RESTARTED:
5971 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
5972 default:
5973 break;
5974 }
5975
5976 spin_unlock_bh(&ar->data_lock);
5977
5978 rcu_read_unlock();
5979 }
5980
ath12k_peer_sta_kickout_event(struct ath12k_base * ab,struct sk_buff * skb)5981 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb)
5982 {
5983 struct wmi_peer_sta_kickout_arg arg = {};
5984 struct ieee80211_sta *sta;
5985 struct ath12k_peer *peer;
5986 struct ath12k *ar;
5987
5988 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) {
5989 ath12k_warn(ab, "failed to extract peer sta kickout event");
5990 return;
5991 }
5992
5993 rcu_read_lock();
5994
5995 spin_lock_bh(&ab->base_lock);
5996
5997 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr);
5998
5999 if (!peer) {
6000 ath12k_warn(ab, "peer not found %pM\n",
6001 arg.mac_addr);
6002 goto exit;
6003 }
6004
6005 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id);
6006 if (!ar) {
6007 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d",
6008 peer->vdev_id);
6009 goto exit;
6010 }
6011
6012 sta = ieee80211_find_sta_by_ifaddr(ar->hw,
6013 arg.mac_addr, NULL);
6014 if (!sta) {
6015 ath12k_warn(ab, "Spurious quick kickout for STA %pM\n",
6016 arg.mac_addr);
6017 goto exit;
6018 }
6019
6020 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM",
6021 arg.mac_addr);
6022
6023 ieee80211_report_low_ack(sta, 10);
6024
6025 exit:
6026 spin_unlock_bh(&ab->base_lock);
6027 rcu_read_unlock();
6028 }
6029
ath12k_roam_event(struct ath12k_base * ab,struct sk_buff * skb)6030 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb)
6031 {
6032 struct wmi_roam_event roam_ev = {};
6033 struct ath12k *ar;
6034
6035 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) {
6036 ath12k_warn(ab, "failed to extract roam event");
6037 return;
6038 }
6039
6040 ath12k_dbg(ab, ATH12K_DBG_WMI,
6041 "wmi roam event vdev %u reason 0x%08x rssi %d\n",
6042 roam_ev.vdev_id, roam_ev.reason, roam_ev.rssi);
6043
6044 rcu_read_lock();
6045 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(roam_ev.vdev_id));
6046 if (!ar) {
6047 ath12k_warn(ab, "invalid vdev id in roam ev %d",
6048 roam_ev.vdev_id);
6049 rcu_read_unlock();
6050 return;
6051 }
6052
6053 if (le32_to_cpu(roam_ev.reason) >= WMI_ROAM_REASON_MAX)
6054 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n",
6055 roam_ev.reason, roam_ev.vdev_id);
6056
6057 switch (le32_to_cpu(roam_ev.reason)) {
6058 case WMI_ROAM_REASON_BEACON_MISS:
6059 /* TODO: Pending beacon miss and connection_loss_work
6060 * implementation
6061 * ath12k_mac_handle_beacon_miss(ar, vdev_id);
6062 */
6063 break;
6064 case WMI_ROAM_REASON_BETTER_AP:
6065 case WMI_ROAM_REASON_LOW_RSSI:
6066 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
6067 case WMI_ROAM_REASON_HO_FAILED:
6068 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n",
6069 roam_ev.reason, roam_ev.vdev_id);
6070 break;
6071 }
6072
6073 rcu_read_unlock();
6074 }
6075
ath12k_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)6076 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
6077 {
6078 struct wmi_chan_info_event ch_info_ev = {0};
6079 struct ath12k *ar;
6080 struct survey_info *survey;
6081 int idx;
6082 /* HW channel counters frequency value in hertz */
6083 u32 cc_freq_hz = ab->cc_freq_hz;
6084
6085 if (ath12k_pull_chan_info_ev(ab, skb->data, skb->len, &ch_info_ev) != 0) {
6086 ath12k_warn(ab, "failed to extract chan info event");
6087 return;
6088 }
6089
6090 ath12k_dbg(ab, ATH12K_DBG_WMI,
6091 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n",
6092 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq,
6093 ch_info_ev.cmd_flags, ch_info_ev.noise_floor,
6094 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count,
6095 ch_info_ev.mac_clk_mhz);
6096
6097 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) {
6098 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n");
6099 return;
6100 }
6101
6102 rcu_read_lock();
6103 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id));
6104 if (!ar) {
6105 ath12k_warn(ab, "invalid vdev id in chan info ev %d",
6106 ch_info_ev.vdev_id);
6107 rcu_read_unlock();
6108 return;
6109 }
6110 spin_lock_bh(&ar->data_lock);
6111
6112 switch (ar->scan.state) {
6113 case ATH12K_SCAN_IDLE:
6114 case ATH12K_SCAN_STARTING:
6115 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n");
6116 goto exit;
6117 case ATH12K_SCAN_RUNNING:
6118 case ATH12K_SCAN_ABORTING:
6119 break;
6120 }
6121
6122 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq));
6123 if (idx >= ARRAY_SIZE(ar->survey)) {
6124 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n",
6125 ch_info_ev.freq, idx);
6126 goto exit;
6127 }
6128
6129 /* If FW provides MAC clock frequency in Mhz, overriding the initialized
6130 * HW channel counters frequency value
6131 */
6132 if (ch_info_ev.mac_clk_mhz)
6133 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000);
6134
6135 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) {
6136 survey = &ar->survey[idx];
6137 memset(survey, 0, sizeof(*survey));
6138 survey->noise = le32_to_cpu(ch_info_ev.noise_floor);
6139 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
6140 SURVEY_INFO_TIME_BUSY;
6141 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz);
6142 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count),
6143 cc_freq_hz);
6144 }
6145 exit:
6146 spin_unlock_bh(&ar->data_lock);
6147 rcu_read_unlock();
6148 }
6149
6150 static void
ath12k_pdev_bss_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)6151 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
6152 {
6153 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {};
6154 struct survey_info *survey;
6155 struct ath12k *ar;
6156 u32 cc_freq_hz = ab->cc_freq_hz;
6157 u64 busy, total, tx, rx, rx_bss;
6158 int idx;
6159
6160 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) {
6161 ath12k_warn(ab, "failed to extract pdev bss chan info event");
6162 return;
6163 }
6164
6165 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 |
6166 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low);
6167
6168 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 |
6169 le32_to_cpu(bss_ch_info_ev.cycle_count_low);
6170
6171 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 |
6172 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low);
6173
6174 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 |
6175 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low);
6176
6177 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 |
6178 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low);
6179
6180 ath12k_dbg(ab, ATH12K_DBG_WMI,
6181 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
6182 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq,
6183 bss_ch_info_ev.noise_floor, busy, total,
6184 tx, rx, rx_bss);
6185
6186 rcu_read_lock();
6187 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id));
6188
6189 if (!ar) {
6190 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n",
6191 bss_ch_info_ev.pdev_id);
6192 rcu_read_unlock();
6193 return;
6194 }
6195
6196 spin_lock_bh(&ar->data_lock);
6197 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq));
6198 if (idx >= ARRAY_SIZE(ar->survey)) {
6199 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
6200 bss_ch_info_ev.freq, idx);
6201 goto exit;
6202 }
6203
6204 survey = &ar->survey[idx];
6205
6206 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor);
6207 survey->time = div_u64(total, cc_freq_hz);
6208 survey->time_busy = div_u64(busy, cc_freq_hz);
6209 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
6210 survey->time_tx = div_u64(tx, cc_freq_hz);
6211 survey->filled |= (SURVEY_INFO_NOISE_DBM |
6212 SURVEY_INFO_TIME |
6213 SURVEY_INFO_TIME_BUSY |
6214 SURVEY_INFO_TIME_RX |
6215 SURVEY_INFO_TIME_TX);
6216 exit:
6217 spin_unlock_bh(&ar->data_lock);
6218 complete(&ar->bss_survey_done);
6219
6220 rcu_read_unlock();
6221 }
6222
ath12k_vdev_install_key_compl_event(struct ath12k_base * ab,struct sk_buff * skb)6223 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab,
6224 struct sk_buff *skb)
6225 {
6226 struct wmi_vdev_install_key_complete_arg install_key_compl = {0};
6227 struct ath12k *ar;
6228
6229 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) {
6230 ath12k_warn(ab, "failed to extract install key compl event");
6231 return;
6232 }
6233
6234 ath12k_dbg(ab, ATH12K_DBG_WMI,
6235 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n",
6236 install_key_compl.key_idx, install_key_compl.key_flags,
6237 install_key_compl.macaddr, install_key_compl.status);
6238
6239 rcu_read_lock();
6240 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id);
6241 if (!ar) {
6242 ath12k_warn(ab, "invalid vdev id in install key compl ev %d",
6243 install_key_compl.vdev_id);
6244 rcu_read_unlock();
6245 return;
6246 }
6247
6248 ar->install_key_status = 0;
6249
6250 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) {
6251 ath12k_warn(ab, "install key failed for %pM status %d\n",
6252 install_key_compl.macaddr, install_key_compl.status);
6253 ar->install_key_status = install_key_compl.status;
6254 }
6255
6256 complete(&ar->install_key_done);
6257 rcu_read_unlock();
6258 }
6259
ath12k_wmi_tlv_services_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6260 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab,
6261 u16 tag, u16 len,
6262 const void *ptr,
6263 void *data)
6264 {
6265 const struct wmi_service_available_event *ev;
6266 u32 *wmi_ext2_service_bitmap;
6267 int i, j;
6268 u16 expected_len;
6269
6270 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32);
6271 if (len < expected_len) {
6272 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n",
6273 len, tag);
6274 return -EINVAL;
6275 }
6276
6277 switch (tag) {
6278 case WMI_TAG_SERVICE_AVAILABLE_EVENT:
6279 ev = (struct wmi_service_available_event *)ptr;
6280 for (i = 0, j = WMI_MAX_SERVICE;
6281 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE;
6282 i++) {
6283 do {
6284 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) &
6285 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
6286 set_bit(j, ab->wmi_ab.svc_map);
6287 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
6288 }
6289
6290 ath12k_dbg(ab, ATH12K_DBG_WMI,
6291 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x",
6292 ev->wmi_service_segment_bitmap[0],
6293 ev->wmi_service_segment_bitmap[1],
6294 ev->wmi_service_segment_bitmap[2],
6295 ev->wmi_service_segment_bitmap[3]);
6296 break;
6297 case WMI_TAG_ARRAY_UINT32:
6298 wmi_ext2_service_bitmap = (u32 *)ptr;
6299 for (i = 0, j = WMI_MAX_EXT_SERVICE;
6300 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE;
6301 i++) {
6302 do {
6303 if (wmi_ext2_service_bitmap[i] &
6304 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
6305 set_bit(j, ab->wmi_ab.svc_map);
6306 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
6307 }
6308
6309 ath12k_dbg(ab, ATH12K_DBG_WMI,
6310 "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x",
6311 wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1],
6312 wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]);
6313 break;
6314 }
6315 return 0;
6316 }
6317
ath12k_service_available_event(struct ath12k_base * ab,struct sk_buff * skb)6318 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb)
6319 {
6320 int ret;
6321
6322 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6323 ath12k_wmi_tlv_services_parser,
6324 NULL);
6325 return ret;
6326 }
6327
ath12k_peer_assoc_conf_event(struct ath12k_base * ab,struct sk_buff * skb)6328 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb)
6329 {
6330 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0};
6331 struct ath12k *ar;
6332
6333 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) {
6334 ath12k_warn(ab, "failed to extract peer assoc conf event");
6335 return;
6336 }
6337
6338 ath12k_dbg(ab, ATH12K_DBG_WMI,
6339 "peer assoc conf ev vdev id %d macaddr %pM\n",
6340 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr);
6341
6342 rcu_read_lock();
6343 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id);
6344
6345 if (!ar) {
6346 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d",
6347 peer_assoc_conf.vdev_id);
6348 rcu_read_unlock();
6349 return;
6350 }
6351
6352 complete(&ar->peer_assoc_done);
6353 rcu_read_unlock();
6354 }
6355
ath12k_update_stats_event(struct ath12k_base * ab,struct sk_buff * skb)6356 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb)
6357 {
6358 }
6359
6360 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned
6361 * is not part of BDF CTL(Conformance test limits) table entries.
6362 */
ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base * ab,struct sk_buff * skb)6363 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab,
6364 struct sk_buff *skb)
6365 {
6366 const void **tb;
6367 const struct wmi_pdev_ctl_failsafe_chk_event *ev;
6368 int ret;
6369
6370 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
6371 if (IS_ERR(tb)) {
6372 ret = PTR_ERR(tb);
6373 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6374 return;
6375 }
6376
6377 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT];
6378 if (!ev) {
6379 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev");
6380 kfree(tb);
6381 return;
6382 }
6383
6384 ath12k_dbg(ab, ATH12K_DBG_WMI,
6385 "pdev ctl failsafe check ev status %d\n",
6386 ev->ctl_failsafe_status);
6387
6388 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power
6389 * to 10 dBm else the CTL power entry in the BDF would be picked up.
6390 */
6391 if (ev->ctl_failsafe_status != 0)
6392 ath12k_warn(ab, "pdev ctl failsafe failure status %d",
6393 ev->ctl_failsafe_status);
6394
6395 kfree(tb);
6396 }
6397
6398 static void
ath12k_wmi_process_csa_switch_count_event(struct ath12k_base * ab,const struct ath12k_wmi_pdev_csa_event * ev,const u32 * vdev_ids)6399 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab,
6400 const struct ath12k_wmi_pdev_csa_event *ev,
6401 const u32 *vdev_ids)
6402 {
6403 int i;
6404 struct ath12k_vif *arvif;
6405
6406 /* Finish CSA once the switch count becomes NULL */
6407 if (ev->current_switch_count)
6408 return;
6409
6410 rcu_read_lock();
6411 for (i = 0; i < le32_to_cpu(ev->num_vdevs); i++) {
6412 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]);
6413
6414 if (!arvif) {
6415 ath12k_warn(ab, "Recvd csa status for unknown vdev %d",
6416 vdev_ids[i]);
6417 continue;
6418 }
6419
6420 if (arvif->is_up && arvif->vif->bss_conf.csa_active)
6421 ieee80211_csa_finish(arvif->vif);
6422 }
6423 rcu_read_unlock();
6424 }
6425
6426 static void
ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base * ab,struct sk_buff * skb)6427 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab,
6428 struct sk_buff *skb)
6429 {
6430 const void **tb;
6431 const struct ath12k_wmi_pdev_csa_event *ev;
6432 const u32 *vdev_ids;
6433 int ret;
6434
6435 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
6436 if (IS_ERR(tb)) {
6437 ret = PTR_ERR(tb);
6438 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6439 return;
6440 }
6441
6442 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT];
6443 vdev_ids = tb[WMI_TAG_ARRAY_UINT32];
6444
6445 if (!ev || !vdev_ids) {
6446 ath12k_warn(ab, "failed to fetch pdev csa switch count ev");
6447 kfree(tb);
6448 return;
6449 }
6450
6451 ath12k_dbg(ab, ATH12K_DBG_WMI,
6452 "pdev csa switch count %d for pdev %d, num_vdevs %d",
6453 ev->current_switch_count, ev->pdev_id,
6454 ev->num_vdevs);
6455
6456 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids);
6457
6458 kfree(tb);
6459 }
6460
6461 static void
ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base * ab,struct sk_buff * skb)6462 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb)
6463 {
6464 const void **tb;
6465 const struct ath12k_wmi_pdev_radar_event *ev;
6466 struct ath12k *ar;
6467 int ret;
6468
6469 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
6470 if (IS_ERR(tb)) {
6471 ret = PTR_ERR(tb);
6472 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6473 return;
6474 }
6475
6476 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT];
6477
6478 if (!ev) {
6479 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev");
6480 kfree(tb);
6481 return;
6482 }
6483
6484 ath12k_dbg(ab, ATH12K_DBG_WMI,
6485 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d",
6486 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width,
6487 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp,
6488 ev->freq_offset, ev->sidx);
6489
6490 rcu_read_lock();
6491
6492 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id));
6493
6494 if (!ar) {
6495 ath12k_warn(ab, "radar detected in invalid pdev %d\n",
6496 ev->pdev_id);
6497 goto exit;
6498 }
6499
6500 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n",
6501 ev->pdev_id);
6502
6503 if (ar->dfs_block_radar_events)
6504 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n");
6505 else
6506 ieee80211_radar_detected(ar->hw);
6507
6508 exit:
6509 rcu_read_unlock();
6510
6511 kfree(tb);
6512 }
6513
6514 static void
ath12k_wmi_pdev_temperature_event(struct ath12k_base * ab,struct sk_buff * skb)6515 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab,
6516 struct sk_buff *skb)
6517 {
6518 struct ath12k *ar;
6519 struct wmi_pdev_temperature_event ev = {0};
6520
6521 if (ath12k_pull_pdev_temp_ev(ab, skb->data, skb->len, &ev) != 0) {
6522 ath12k_warn(ab, "failed to extract pdev temperature event");
6523 return;
6524 }
6525
6526 ath12k_dbg(ab, ATH12K_DBG_WMI,
6527 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id);
6528
6529 rcu_read_lock();
6530
6531 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id));
6532 if (!ar) {
6533 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id);
6534 goto exit;
6535 }
6536
6537 exit:
6538 rcu_read_unlock();
6539 }
6540
ath12k_fils_discovery_event(struct ath12k_base * ab,struct sk_buff * skb)6541 static void ath12k_fils_discovery_event(struct ath12k_base *ab,
6542 struct sk_buff *skb)
6543 {
6544 const void **tb;
6545 const struct wmi_fils_discovery_event *ev;
6546 int ret;
6547
6548 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
6549 if (IS_ERR(tb)) {
6550 ret = PTR_ERR(tb);
6551 ath12k_warn(ab,
6552 "failed to parse FILS discovery event tlv %d\n",
6553 ret);
6554 return;
6555 }
6556
6557 ev = tb[WMI_TAG_HOST_SWFDA_EVENT];
6558 if (!ev) {
6559 ath12k_warn(ab, "failed to fetch FILS discovery event\n");
6560 kfree(tb);
6561 return;
6562 }
6563
6564 ath12k_warn(ab,
6565 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n",
6566 ev->vdev_id, ev->fils_tt, ev->tbtt);
6567
6568 kfree(tb);
6569 }
6570
ath12k_probe_resp_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)6571 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab,
6572 struct sk_buff *skb)
6573 {
6574 const void **tb;
6575 const struct wmi_probe_resp_tx_status_event *ev;
6576 int ret;
6577
6578 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
6579 if (IS_ERR(tb)) {
6580 ret = PTR_ERR(tb);
6581 ath12k_warn(ab,
6582 "failed to parse probe response transmission status event tlv: %d\n",
6583 ret);
6584 return;
6585 }
6586
6587 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT];
6588 if (!ev) {
6589 ath12k_warn(ab,
6590 "failed to fetch probe response transmission status event");
6591 kfree(tb);
6592 return;
6593 }
6594
6595 if (ev->tx_status)
6596 ath12k_warn(ab,
6597 "Probe response transmission failed for vdev_id %u, status %u\n",
6598 ev->vdev_id, ev->tx_status);
6599
6600 kfree(tb);
6601 }
6602
ath12k_wmi_op_rx(struct ath12k_base * ab,struct sk_buff * skb)6603 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb)
6604 {
6605 struct wmi_cmd_hdr *cmd_hdr;
6606 enum wmi_tlv_event_id id;
6607
6608 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6609 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID);
6610
6611 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
6612 goto out;
6613
6614 switch (id) {
6615 /* Process all the WMI events here */
6616 case WMI_SERVICE_READY_EVENTID:
6617 ath12k_service_ready_event(ab, skb);
6618 break;
6619 case WMI_SERVICE_READY_EXT_EVENTID:
6620 ath12k_service_ready_ext_event(ab, skb);
6621 break;
6622 case WMI_SERVICE_READY_EXT2_EVENTID:
6623 ath12k_service_ready_ext2_event(ab, skb);
6624 break;
6625 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID:
6626 ath12k_reg_chan_list_event(ab, skb);
6627 break;
6628 case WMI_READY_EVENTID:
6629 ath12k_ready_event(ab, skb);
6630 break;
6631 case WMI_PEER_DELETE_RESP_EVENTID:
6632 ath12k_peer_delete_resp_event(ab, skb);
6633 break;
6634 case WMI_VDEV_START_RESP_EVENTID:
6635 ath12k_vdev_start_resp_event(ab, skb);
6636 break;
6637 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID:
6638 ath12k_bcn_tx_status_event(ab, skb);
6639 break;
6640 case WMI_VDEV_STOPPED_EVENTID:
6641 ath12k_vdev_stopped_event(ab, skb);
6642 break;
6643 case WMI_MGMT_RX_EVENTID:
6644 ath12k_mgmt_rx_event(ab, skb);
6645 /* mgmt_rx_event() owns the skb now! */
6646 return;
6647 case WMI_MGMT_TX_COMPLETION_EVENTID:
6648 ath12k_mgmt_tx_compl_event(ab, skb);
6649 break;
6650 case WMI_SCAN_EVENTID:
6651 ath12k_scan_event(ab, skb);
6652 break;
6653 case WMI_PEER_STA_KICKOUT_EVENTID:
6654 ath12k_peer_sta_kickout_event(ab, skb);
6655 break;
6656 case WMI_ROAM_EVENTID:
6657 ath12k_roam_event(ab, skb);
6658 break;
6659 case WMI_CHAN_INFO_EVENTID:
6660 ath12k_chan_info_event(ab, skb);
6661 break;
6662 case WMI_PDEV_BSS_CHAN_INFO_EVENTID:
6663 ath12k_pdev_bss_chan_info_event(ab, skb);
6664 break;
6665 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
6666 ath12k_vdev_install_key_compl_event(ab, skb);
6667 break;
6668 case WMI_SERVICE_AVAILABLE_EVENTID:
6669 ath12k_service_available_event(ab, skb);
6670 break;
6671 case WMI_PEER_ASSOC_CONF_EVENTID:
6672 ath12k_peer_assoc_conf_event(ab, skb);
6673 break;
6674 case WMI_UPDATE_STATS_EVENTID:
6675 ath12k_update_stats_event(ab, skb);
6676 break;
6677 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID:
6678 ath12k_pdev_ctl_failsafe_check_event(ab, skb);
6679 break;
6680 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
6681 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb);
6682 break;
6683 case WMI_PDEV_TEMPERATURE_EVENTID:
6684 ath12k_wmi_pdev_temperature_event(ab, skb);
6685 break;
6686 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID:
6687 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb);
6688 break;
6689 case WMI_HOST_FILS_DISCOVERY_EVENTID:
6690 ath12k_fils_discovery_event(ab, skb);
6691 break;
6692 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID:
6693 ath12k_probe_resp_tx_status_event(ab, skb);
6694 break;
6695 /* add Unsupported events here */
6696 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
6697 case WMI_PEER_OPER_MODE_CHANGE_EVENTID:
6698 case WMI_TWT_ENABLE_EVENTID:
6699 case WMI_TWT_DISABLE_EVENTID:
6700 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID:
6701 ath12k_dbg(ab, ATH12K_DBG_WMI,
6702 "ignoring unsupported event 0x%x\n", id);
6703 break;
6704 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID:
6705 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb);
6706 break;
6707 case WMI_VDEV_DELETE_RESP_EVENTID:
6708 ath12k_vdev_delete_resp_event(ab, skb);
6709 break;
6710 /* TODO: Add remaining events */
6711 default:
6712 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id);
6713 break;
6714 }
6715
6716 out:
6717 dev_kfree_skb(skb);
6718 }
6719
ath12k_connect_pdev_htc_service(struct ath12k_base * ab,u32 pdev_idx)6720 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab,
6721 u32 pdev_idx)
6722 {
6723 int status;
6724 u32 svc_id[] = { ATH12K_HTC_SVC_ID_WMI_CONTROL,
6725 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1,
6726 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2 };
6727 struct ath12k_htc_svc_conn_req conn_req = {};
6728 struct ath12k_htc_svc_conn_resp conn_resp = {};
6729
6730 /* these fields are the same for all service endpoints */
6731 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete;
6732 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx;
6733 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits;
6734
6735 /* connect to control service */
6736 conn_req.service_id = svc_id[pdev_idx];
6737
6738 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp);
6739 if (status) {
6740 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n",
6741 status);
6742 return status;
6743 }
6744
6745 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid;
6746 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid;
6747 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len;
6748
6749 return 0;
6750 }
6751
6752 static int
ath12k_wmi_send_unit_test_cmd(struct ath12k * ar,struct wmi_unit_test_cmd ut_cmd,u32 * test_args)6753 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar,
6754 struct wmi_unit_test_cmd ut_cmd,
6755 u32 *test_args)
6756 {
6757 struct ath12k_wmi_pdev *wmi = ar->wmi;
6758 struct wmi_unit_test_cmd *cmd;
6759 struct sk_buff *skb;
6760 struct wmi_tlv *tlv;
6761 void *ptr;
6762 u32 *ut_cmd_args;
6763 int buf_len, arg_len;
6764 int ret;
6765 int i;
6766
6767 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args);
6768 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE;
6769
6770 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
6771 if (!skb)
6772 return -ENOMEM;
6773
6774 cmd = (struct wmi_unit_test_cmd *)skb->data;
6775 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD,
6776 sizeof(ut_cmd));
6777
6778 cmd->vdev_id = ut_cmd.vdev_id;
6779 cmd->module_id = ut_cmd.module_id;
6780 cmd->num_args = ut_cmd.num_args;
6781 cmd->diag_token = ut_cmd.diag_token;
6782
6783 ptr = skb->data + sizeof(ut_cmd);
6784
6785 tlv = ptr;
6786 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
6787
6788 ptr += TLV_HDR_SIZE;
6789
6790 ut_cmd_args = ptr;
6791 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++)
6792 ut_cmd_args[i] = test_args[i];
6793
6794 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
6795 "WMI unit test : module %d vdev %d n_args %d token %d\n",
6796 cmd->module_id, cmd->vdev_id, cmd->num_args,
6797 cmd->diag_token);
6798
6799 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID);
6800
6801 if (ret) {
6802 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n",
6803 ret);
6804 dev_kfree_skb(skb);
6805 }
6806
6807 return ret;
6808 }
6809
ath12k_wmi_simulate_radar(struct ath12k * ar)6810 int ath12k_wmi_simulate_radar(struct ath12k *ar)
6811 {
6812 struct ath12k_vif *arvif;
6813 u32 dfs_args[DFS_MAX_TEST_ARGS];
6814 struct wmi_unit_test_cmd wmi_ut;
6815 bool arvif_found = false;
6816
6817 list_for_each_entry(arvif, &ar->arvifs, list) {
6818 if (arvif->is_started && arvif->vdev_type == WMI_VDEV_TYPE_AP) {
6819 arvif_found = true;
6820 break;
6821 }
6822 }
6823
6824 if (!arvif_found)
6825 return -EINVAL;
6826
6827 dfs_args[DFS_TEST_CMDID] = 0;
6828 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id;
6829 /* Currently we could pass segment_id(b0 - b1), chirp(b2)
6830 * freq offset (b3 - b10) to unit test. For simulation
6831 * purpose this can be set to 0 which is valid.
6832 */
6833 dfs_args[DFS_TEST_RADAR_PARAM] = 0;
6834
6835 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id);
6836 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE);
6837 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS);
6838 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN);
6839
6840 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n");
6841
6842 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args);
6843 }
6844
ath12k_wmi_connect(struct ath12k_base * ab)6845 int ath12k_wmi_connect(struct ath12k_base *ab)
6846 {
6847 u32 i;
6848 u8 wmi_ep_count;
6849
6850 wmi_ep_count = ab->htc.wmi_ep_count;
6851 if (wmi_ep_count > ab->hw_params->max_radios)
6852 return -1;
6853
6854 for (i = 0; i < wmi_ep_count; i++)
6855 ath12k_connect_pdev_htc_service(ab, i);
6856
6857 return 0;
6858 }
6859
ath12k_wmi_pdev_detach(struct ath12k_base * ab,u8 pdev_id)6860 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id)
6861 {
6862 if (WARN_ON(pdev_id >= MAX_RADIOS))
6863 return;
6864
6865 /* TODO: Deinit any pdev specific wmi resource */
6866 }
6867
ath12k_wmi_pdev_attach(struct ath12k_base * ab,u8 pdev_id)6868 int ath12k_wmi_pdev_attach(struct ath12k_base *ab,
6869 u8 pdev_id)
6870 {
6871 struct ath12k_wmi_pdev *wmi_handle;
6872
6873 if (pdev_id >= ab->hw_params->max_radios)
6874 return -EINVAL;
6875
6876 wmi_handle = &ab->wmi_ab.wmi[pdev_id];
6877
6878 wmi_handle->wmi_ab = &ab->wmi_ab;
6879
6880 ab->wmi_ab.ab = ab;
6881 /* TODO: Init remaining resource specific to pdev */
6882
6883 return 0;
6884 }
6885
ath12k_wmi_attach(struct ath12k_base * ab)6886 int ath12k_wmi_attach(struct ath12k_base *ab)
6887 {
6888 int ret;
6889
6890 ret = ath12k_wmi_pdev_attach(ab, 0);
6891 if (ret)
6892 return ret;
6893
6894 ab->wmi_ab.ab = ab;
6895 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX;
6896
6897 /* It's overwritten when service_ext_ready is handled */
6898 if (ab->hw_params->single_pdev_only)
6899 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE;
6900
6901 /* TODO: Init remaining wmi soc resources required */
6902 init_completion(&ab->wmi_ab.service_ready);
6903 init_completion(&ab->wmi_ab.unified_ready);
6904
6905 return 0;
6906 }
6907
ath12k_wmi_detach(struct ath12k_base * ab)6908 void ath12k_wmi_detach(struct ath12k_base *ab)
6909 {
6910 int i;
6911
6912 /* TODO: Deinit wmi resource specific to SOC as required */
6913
6914 for (i = 0; i < ab->htc.wmi_ep_count; i++)
6915 ath12k_wmi_pdev_detach(ab, i);
6916
6917 ath12k_wmi_free_dbring_caps(ab);
6918 }
6919