1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
7 */
8
9 #include <linux/module.h>
10 #include <linux/firmware.h>
11 #include <linux/of.h>
12 #include <linux/property.h>
13 #include <linux/dmi.h>
14 #include <linux/ctype.h>
15 #include <linux/pm_qos.h>
16 #include <linux/nvmem-consumer.h>
17 #include <asm/byteorder.h>
18
19 #include "core.h"
20 #include "mac.h"
21 #include "htc.h"
22 #include "hif.h"
23 #include "wmi.h"
24 #include "bmi.h"
25 #include "debug.h"
26 #include "htt.h"
27 #include "testmode.h"
28 #include "wmi-ops.h"
29 #include "coredump.h"
30
31 unsigned int ath10k_debug_mask;
32 EXPORT_SYMBOL(ath10k_debug_mask);
33
34 static unsigned int ath10k_cryptmode_param;
35 static bool uart_print;
36 static bool skip_otp;
37 static bool fw_diag_log;
38
39 /* frame mode values are mapped as per enum ath10k_hw_txrx_mode */
40 unsigned int ath10k_frame_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
41
42 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
43 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
44
45 /* FIXME: most of these should be readonly */
46 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
47 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
48 module_param(uart_print, bool, 0644);
49 module_param(skip_otp, bool, 0644);
50 module_param(fw_diag_log, bool, 0644);
51 module_param_named(frame_mode, ath10k_frame_mode, uint, 0644);
52 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
53
54 MODULE_PARM_DESC(debug_mask, "Debugging mask");
55 MODULE_PARM_DESC(uart_print, "Uart target debugging");
56 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
57 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
58 MODULE_PARM_DESC(frame_mode,
59 "Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)");
60 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
61 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
62
63 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
64 {
65 .id = QCA988X_HW_2_0_VERSION,
66 .dev_id = QCA988X_2_0_DEVICE_ID,
67 .bus = ATH10K_BUS_PCI,
68 .name = "qca988x hw2.0",
69 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
70 .uart_pin = 7,
71 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
72 .otp_exe_param = 0,
73 .channel_counters_freq_hz = 88000,
74 .max_probe_resp_desc_thres = 0,
75 .cal_data_len = 2116,
76 .fw = {
77 .dir = QCA988X_HW_2_0_FW_DIR,
78 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
79 .board_size = QCA988X_BOARD_DATA_SZ,
80 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
81 },
82 .rx_desc_ops = &qca988x_rx_desc_ops,
83 .hw_ops = &qca988x_ops,
84 .decap_align_bytes = 4,
85 .spectral_bin_discard = 0,
86 .spectral_bin_offset = 0,
87 .vht160_mcs_rx_highest = 0,
88 .vht160_mcs_tx_highest = 0,
89 .n_cipher_suites = 8,
90 .ast_skid_limit = 0x10,
91 .num_wds_entries = 0x20,
92 .target_64bit = false,
93 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
94 .shadow_reg_support = false,
95 .rri_on_ddr = false,
96 .hw_filter_reset_required = true,
97 .fw_diag_ce_download = false,
98 .credit_size_workaround = false,
99 .tx_stats_over_pktlog = true,
100 .dynamic_sar_support = false,
101 .hw_restart_disconnect = false,
102 .use_fw_tx_credits = true,
103 .delay_unmap_buffer = false,
104 },
105 {
106 .id = QCA988X_HW_2_0_VERSION,
107 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
108 .name = "qca988x hw2.0 ubiquiti",
109 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
110 .uart_pin = 7,
111 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
112 .otp_exe_param = 0,
113 .channel_counters_freq_hz = 88000,
114 .max_probe_resp_desc_thres = 0,
115 .cal_data_len = 2116,
116 .fw = {
117 .dir = QCA988X_HW_2_0_FW_DIR,
118 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
119 .board_size = QCA988X_BOARD_DATA_SZ,
120 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
121 },
122 .rx_desc_ops = &qca988x_rx_desc_ops,
123 .hw_ops = &qca988x_ops,
124 .decap_align_bytes = 4,
125 .spectral_bin_discard = 0,
126 .spectral_bin_offset = 0,
127 .vht160_mcs_rx_highest = 0,
128 .vht160_mcs_tx_highest = 0,
129 .n_cipher_suites = 8,
130 .ast_skid_limit = 0x10,
131 .num_wds_entries = 0x20,
132 .target_64bit = false,
133 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
134 .shadow_reg_support = false,
135 .rri_on_ddr = false,
136 .hw_filter_reset_required = true,
137 .fw_diag_ce_download = false,
138 .credit_size_workaround = false,
139 .tx_stats_over_pktlog = true,
140 .dynamic_sar_support = false,
141 .hw_restart_disconnect = false,
142 .use_fw_tx_credits = true,
143 .delay_unmap_buffer = false,
144 },
145 {
146 .id = QCA9887_HW_1_0_VERSION,
147 .dev_id = QCA9887_1_0_DEVICE_ID,
148 .bus = ATH10K_BUS_PCI,
149 .name = "qca9887 hw1.0",
150 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
151 .uart_pin = 7,
152 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
153 .otp_exe_param = 0,
154 .channel_counters_freq_hz = 88000,
155 .max_probe_resp_desc_thres = 0,
156 .cal_data_len = 2116,
157 .fw = {
158 .dir = QCA9887_HW_1_0_FW_DIR,
159 .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
160 .board_size = QCA9887_BOARD_DATA_SZ,
161 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
162 },
163 .rx_desc_ops = &qca988x_rx_desc_ops,
164 .hw_ops = &qca988x_ops,
165 .decap_align_bytes = 4,
166 .spectral_bin_discard = 0,
167 .spectral_bin_offset = 0,
168 .vht160_mcs_rx_highest = 0,
169 .vht160_mcs_tx_highest = 0,
170 .n_cipher_suites = 8,
171 .ast_skid_limit = 0x10,
172 .num_wds_entries = 0x20,
173 .target_64bit = false,
174 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
175 .shadow_reg_support = false,
176 .rri_on_ddr = false,
177 .hw_filter_reset_required = true,
178 .fw_diag_ce_download = false,
179 .credit_size_workaround = false,
180 .tx_stats_over_pktlog = false,
181 .dynamic_sar_support = false,
182 .hw_restart_disconnect = false,
183 .use_fw_tx_credits = true,
184 .delay_unmap_buffer = false,
185 },
186 {
187 .id = QCA6174_HW_3_2_VERSION,
188 .dev_id = QCA6174_3_2_DEVICE_ID,
189 .bus = ATH10K_BUS_SDIO,
190 .name = "qca6174 hw3.2 sdio",
191 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
192 .uart_pin = 19,
193 .otp_exe_param = 0,
194 .channel_counters_freq_hz = 88000,
195 .max_probe_resp_desc_thres = 0,
196 .cal_data_len = 0,
197 .fw = {
198 .dir = QCA6174_HW_3_0_FW_DIR,
199 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
200 .board_size = QCA6174_BOARD_DATA_SZ,
201 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
202 },
203 .rx_desc_ops = &qca988x_rx_desc_ops,
204 .hw_ops = &qca6174_sdio_ops,
205 .hw_clk = qca6174_clk,
206 .target_cpu_freq = 176000000,
207 .decap_align_bytes = 4,
208 .n_cipher_suites = 8,
209 .num_peers = 10,
210 .ast_skid_limit = 0x10,
211 .num_wds_entries = 0x20,
212 .uart_pin_workaround = true,
213 .tx_stats_over_pktlog = false,
214 .credit_size_workaround = false,
215 .bmi_large_size_download = true,
216 .supports_peer_stats_info = true,
217 .dynamic_sar_support = true,
218 .hw_restart_disconnect = false,
219 .use_fw_tx_credits = true,
220 .delay_unmap_buffer = false,
221 },
222 {
223 .id = QCA6174_HW_2_1_VERSION,
224 .dev_id = QCA6164_2_1_DEVICE_ID,
225 .bus = ATH10K_BUS_PCI,
226 .name = "qca6164 hw2.1",
227 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
228 .uart_pin = 6,
229 .otp_exe_param = 0,
230 .channel_counters_freq_hz = 88000,
231 .max_probe_resp_desc_thres = 0,
232 .cal_data_len = 8124,
233 .fw = {
234 .dir = QCA6174_HW_2_1_FW_DIR,
235 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
236 .board_size = QCA6174_BOARD_DATA_SZ,
237 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
238 },
239 .rx_desc_ops = &qca988x_rx_desc_ops,
240 .hw_ops = &qca988x_ops,
241 .decap_align_bytes = 4,
242 .spectral_bin_discard = 0,
243 .spectral_bin_offset = 0,
244 .vht160_mcs_rx_highest = 0,
245 .vht160_mcs_tx_highest = 0,
246 .n_cipher_suites = 8,
247 .ast_skid_limit = 0x10,
248 .num_wds_entries = 0x20,
249 .target_64bit = false,
250 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
251 .shadow_reg_support = false,
252 .rri_on_ddr = false,
253 .hw_filter_reset_required = true,
254 .fw_diag_ce_download = false,
255 .credit_size_workaround = false,
256 .tx_stats_over_pktlog = false,
257 .dynamic_sar_support = false,
258 .hw_restart_disconnect = false,
259 .use_fw_tx_credits = true,
260 .delay_unmap_buffer = false,
261 },
262 {
263 .id = QCA6174_HW_2_1_VERSION,
264 .dev_id = QCA6174_2_1_DEVICE_ID,
265 .bus = ATH10K_BUS_PCI,
266 .name = "qca6174 hw2.1",
267 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
268 .uart_pin = 6,
269 .otp_exe_param = 0,
270 .channel_counters_freq_hz = 88000,
271 .max_probe_resp_desc_thres = 0,
272 .cal_data_len = 8124,
273 .fw = {
274 .dir = QCA6174_HW_2_1_FW_DIR,
275 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
276 .board_size = QCA6174_BOARD_DATA_SZ,
277 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
278 },
279 .rx_desc_ops = &qca988x_rx_desc_ops,
280 .hw_ops = &qca988x_ops,
281 .decap_align_bytes = 4,
282 .spectral_bin_discard = 0,
283 .spectral_bin_offset = 0,
284 .vht160_mcs_rx_highest = 0,
285 .vht160_mcs_tx_highest = 0,
286 .n_cipher_suites = 8,
287 .ast_skid_limit = 0x10,
288 .num_wds_entries = 0x20,
289 .target_64bit = false,
290 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
291 .shadow_reg_support = false,
292 .rri_on_ddr = false,
293 .hw_filter_reset_required = true,
294 .fw_diag_ce_download = false,
295 .credit_size_workaround = false,
296 .tx_stats_over_pktlog = false,
297 .dynamic_sar_support = false,
298 .hw_restart_disconnect = false,
299 .use_fw_tx_credits = true,
300 .delay_unmap_buffer = false,
301 },
302 {
303 .id = QCA6174_HW_3_0_VERSION,
304 .dev_id = QCA6174_2_1_DEVICE_ID,
305 .bus = ATH10K_BUS_PCI,
306 .name = "qca6174 hw3.0",
307 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
308 .uart_pin = 6,
309 .otp_exe_param = 0,
310 .channel_counters_freq_hz = 88000,
311 .max_probe_resp_desc_thres = 0,
312 .cal_data_len = 8124,
313 .fw = {
314 .dir = QCA6174_HW_3_0_FW_DIR,
315 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
316 .board_size = QCA6174_BOARD_DATA_SZ,
317 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
318 },
319 .rx_desc_ops = &qca988x_rx_desc_ops,
320 .hw_ops = &qca988x_ops,
321 .decap_align_bytes = 4,
322 .spectral_bin_discard = 0,
323 .spectral_bin_offset = 0,
324 .vht160_mcs_rx_highest = 0,
325 .vht160_mcs_tx_highest = 0,
326 .n_cipher_suites = 8,
327 .ast_skid_limit = 0x10,
328 .num_wds_entries = 0x20,
329 .target_64bit = false,
330 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
331 .shadow_reg_support = false,
332 .rri_on_ddr = false,
333 .hw_filter_reset_required = true,
334 .fw_diag_ce_download = false,
335 .credit_size_workaround = false,
336 .tx_stats_over_pktlog = false,
337 .dynamic_sar_support = false,
338 .hw_restart_disconnect = false,
339 .use_fw_tx_credits = true,
340 .delay_unmap_buffer = false,
341 },
342 {
343 .id = QCA6174_HW_3_2_VERSION,
344 .dev_id = QCA6174_2_1_DEVICE_ID,
345 .bus = ATH10K_BUS_PCI,
346 .name = "qca6174 hw3.2",
347 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
348 .uart_pin = 6,
349 .otp_exe_param = 0,
350 .channel_counters_freq_hz = 88000,
351 .max_probe_resp_desc_thres = 0,
352 .cal_data_len = 8124,
353 .fw = {
354 /* uses same binaries as hw3.0 */
355 .dir = QCA6174_HW_3_0_FW_DIR,
356 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
357 .board_size = QCA6174_BOARD_DATA_SZ,
358 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
359 },
360 .rx_desc_ops = &qca988x_rx_desc_ops,
361 .hw_ops = &qca6174_ops,
362 .hw_clk = qca6174_clk,
363 .target_cpu_freq = 176000000,
364 .decap_align_bytes = 4,
365 .spectral_bin_discard = 0,
366 .spectral_bin_offset = 0,
367 .vht160_mcs_rx_highest = 0,
368 .vht160_mcs_tx_highest = 0,
369 .n_cipher_suites = 8,
370 .ast_skid_limit = 0x10,
371 .num_wds_entries = 0x20,
372 .target_64bit = false,
373 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
374 .shadow_reg_support = false,
375 .rri_on_ddr = false,
376 .hw_filter_reset_required = true,
377 .fw_diag_ce_download = true,
378 .credit_size_workaround = false,
379 .tx_stats_over_pktlog = false,
380 .supports_peer_stats_info = true,
381 .dynamic_sar_support = true,
382 .hw_restart_disconnect = false,
383 .use_fw_tx_credits = true,
384 .delay_unmap_buffer = false,
385 },
386 {
387 .id = QCA99X0_HW_2_0_DEV_VERSION,
388 .dev_id = QCA99X0_2_0_DEVICE_ID,
389 .bus = ATH10K_BUS_PCI,
390 .name = "qca99x0 hw2.0",
391 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
392 .uart_pin = 7,
393 .otp_exe_param = 0x00000700,
394 .continuous_frag_desc = true,
395 .cck_rate_map_rev2 = true,
396 .channel_counters_freq_hz = 150000,
397 .max_probe_resp_desc_thres = 24,
398 .tx_chain_mask = 0xf,
399 .rx_chain_mask = 0xf,
400 .max_spatial_stream = 4,
401 .cal_data_len = 12064,
402 .fw = {
403 .dir = QCA99X0_HW_2_0_FW_DIR,
404 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
405 .board_size = QCA99X0_BOARD_DATA_SZ,
406 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
407 },
408 .sw_decrypt_mcast_mgmt = true,
409 .rx_desc_ops = &qca99x0_rx_desc_ops,
410 .hw_ops = &qca99x0_ops,
411 .decap_align_bytes = 1,
412 .spectral_bin_discard = 4,
413 .spectral_bin_offset = 0,
414 .vht160_mcs_rx_highest = 0,
415 .vht160_mcs_tx_highest = 0,
416 .n_cipher_suites = 11,
417 .ast_skid_limit = 0x10,
418 .num_wds_entries = 0x20,
419 .target_64bit = false,
420 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
421 .shadow_reg_support = false,
422 .rri_on_ddr = false,
423 .hw_filter_reset_required = true,
424 .fw_diag_ce_download = false,
425 .credit_size_workaround = false,
426 .tx_stats_over_pktlog = false,
427 .dynamic_sar_support = false,
428 .hw_restart_disconnect = false,
429 .use_fw_tx_credits = true,
430 .delay_unmap_buffer = false,
431 },
432 {
433 .id = QCA9984_HW_1_0_DEV_VERSION,
434 .dev_id = QCA9984_1_0_DEVICE_ID,
435 .bus = ATH10K_BUS_PCI,
436 .name = "qca9984/qca9994 hw1.0",
437 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
438 .uart_pin = 7,
439 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
440 .otp_exe_param = 0x00000700,
441 .continuous_frag_desc = true,
442 .cck_rate_map_rev2 = true,
443 .channel_counters_freq_hz = 150000,
444 .max_probe_resp_desc_thres = 24,
445 .tx_chain_mask = 0xf,
446 .rx_chain_mask = 0xf,
447 .max_spatial_stream = 4,
448 .cal_data_len = 12064,
449 .fw = {
450 .dir = QCA9984_HW_1_0_FW_DIR,
451 .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
452 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE,
453 .board_size = QCA99X0_BOARD_DATA_SZ,
454 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
455 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
456 },
457 .sw_decrypt_mcast_mgmt = true,
458 .rx_desc_ops = &qca99x0_rx_desc_ops,
459 .hw_ops = &qca99x0_ops,
460 .decap_align_bytes = 1,
461 .spectral_bin_discard = 12,
462 .spectral_bin_offset = 8,
463
464 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
465 * or 2x2 160Mhz, long-guard-interval.
466 */
467 .vht160_mcs_rx_highest = 1560,
468 .vht160_mcs_tx_highest = 1560,
469 .n_cipher_suites = 11,
470 .ast_skid_limit = 0x10,
471 .num_wds_entries = 0x20,
472 .target_64bit = false,
473 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
474 .shadow_reg_support = false,
475 .rri_on_ddr = false,
476 .hw_filter_reset_required = true,
477 .fw_diag_ce_download = false,
478 .credit_size_workaround = false,
479 .tx_stats_over_pktlog = false,
480 .dynamic_sar_support = false,
481 .hw_restart_disconnect = false,
482 .use_fw_tx_credits = true,
483 .delay_unmap_buffer = false,
484 },
485 {
486 .id = QCA9888_HW_2_0_DEV_VERSION,
487 .dev_id = QCA9888_2_0_DEVICE_ID,
488 .bus = ATH10K_BUS_PCI,
489 .name = "qca9888 hw2.0",
490 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
491 .uart_pin = 7,
492 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
493 .otp_exe_param = 0x00000700,
494 .continuous_frag_desc = true,
495 .channel_counters_freq_hz = 150000,
496 .max_probe_resp_desc_thres = 24,
497 .tx_chain_mask = 3,
498 .rx_chain_mask = 3,
499 .max_spatial_stream = 2,
500 .cal_data_len = 12064,
501 .fw = {
502 .dir = QCA9888_HW_2_0_FW_DIR,
503 .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
504 .board_size = QCA99X0_BOARD_DATA_SZ,
505 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
506 },
507 .sw_decrypt_mcast_mgmt = true,
508 .rx_desc_ops = &qca99x0_rx_desc_ops,
509 .hw_ops = &qca99x0_ops,
510 .decap_align_bytes = 1,
511 .spectral_bin_discard = 12,
512 .spectral_bin_offset = 8,
513
514 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
515 * 1x1 160Mhz, long-guard-interval.
516 */
517 .vht160_mcs_rx_highest = 780,
518 .vht160_mcs_tx_highest = 780,
519 .n_cipher_suites = 11,
520 .ast_skid_limit = 0x10,
521 .num_wds_entries = 0x20,
522 .target_64bit = false,
523 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
524 .shadow_reg_support = false,
525 .rri_on_ddr = false,
526 .hw_filter_reset_required = true,
527 .fw_diag_ce_download = false,
528 .credit_size_workaround = false,
529 .tx_stats_over_pktlog = false,
530 .dynamic_sar_support = false,
531 .hw_restart_disconnect = false,
532 .use_fw_tx_credits = true,
533 .delay_unmap_buffer = false,
534 },
535 {
536 .id = QCA9377_HW_1_0_DEV_VERSION,
537 .dev_id = QCA9377_1_0_DEVICE_ID,
538 .bus = ATH10K_BUS_PCI,
539 .name = "qca9377 hw1.0",
540 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
541 .uart_pin = 6,
542 .otp_exe_param = 0,
543 .channel_counters_freq_hz = 88000,
544 .max_probe_resp_desc_thres = 0,
545 .cal_data_len = 8124,
546 .fw = {
547 .dir = QCA9377_HW_1_0_FW_DIR,
548 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
549 .board_size = QCA9377_BOARD_DATA_SZ,
550 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
551 },
552 .rx_desc_ops = &qca988x_rx_desc_ops,
553 .hw_ops = &qca988x_ops,
554 .decap_align_bytes = 4,
555 .spectral_bin_discard = 0,
556 .spectral_bin_offset = 0,
557 .vht160_mcs_rx_highest = 0,
558 .vht160_mcs_tx_highest = 0,
559 .n_cipher_suites = 8,
560 .ast_skid_limit = 0x10,
561 .num_wds_entries = 0x20,
562 .target_64bit = false,
563 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
564 .shadow_reg_support = false,
565 .rri_on_ddr = false,
566 .hw_filter_reset_required = true,
567 .fw_diag_ce_download = false,
568 .credit_size_workaround = false,
569 .tx_stats_over_pktlog = false,
570 .dynamic_sar_support = false,
571 .hw_restart_disconnect = false,
572 .use_fw_tx_credits = true,
573 .delay_unmap_buffer = false,
574 },
575 {
576 .id = QCA9377_HW_1_1_DEV_VERSION,
577 .dev_id = QCA9377_1_0_DEVICE_ID,
578 .bus = ATH10K_BUS_PCI,
579 .name = "qca9377 hw1.1",
580 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
581 .uart_pin = 6,
582 .otp_exe_param = 0,
583 .channel_counters_freq_hz = 88000,
584 .max_probe_resp_desc_thres = 0,
585 .cal_data_len = 8124,
586 .fw = {
587 .dir = QCA9377_HW_1_0_FW_DIR,
588 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
589 .board_size = QCA9377_BOARD_DATA_SZ,
590 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
591 },
592 .rx_desc_ops = &qca988x_rx_desc_ops,
593 .hw_ops = &qca6174_ops,
594 .hw_clk = qca6174_clk,
595 .target_cpu_freq = 176000000,
596 .decap_align_bytes = 4,
597 .spectral_bin_discard = 0,
598 .spectral_bin_offset = 0,
599 .vht160_mcs_rx_highest = 0,
600 .vht160_mcs_tx_highest = 0,
601 .n_cipher_suites = 8,
602 .ast_skid_limit = 0x10,
603 .num_wds_entries = 0x20,
604 .target_64bit = false,
605 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
606 .shadow_reg_support = false,
607 .rri_on_ddr = false,
608 .hw_filter_reset_required = true,
609 .fw_diag_ce_download = true,
610 .credit_size_workaround = false,
611 .tx_stats_over_pktlog = false,
612 .dynamic_sar_support = false,
613 .hw_restart_disconnect = false,
614 .use_fw_tx_credits = true,
615 .delay_unmap_buffer = false,
616 },
617 {
618 .id = QCA9377_HW_1_1_DEV_VERSION,
619 .dev_id = QCA9377_1_0_DEVICE_ID,
620 .bus = ATH10K_BUS_SDIO,
621 .name = "qca9377 hw1.1 sdio",
622 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
623 .uart_pin = 19,
624 .otp_exe_param = 0,
625 .channel_counters_freq_hz = 88000,
626 .max_probe_resp_desc_thres = 0,
627 .cal_data_len = 8124,
628 .fw = {
629 .dir = QCA9377_HW_1_0_FW_DIR,
630 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
631 .board_size = QCA9377_BOARD_DATA_SZ,
632 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
633 },
634 .rx_desc_ops = &qca988x_rx_desc_ops,
635 .hw_ops = &qca6174_ops,
636 .hw_clk = qca6174_clk,
637 .target_cpu_freq = 176000000,
638 .decap_align_bytes = 4,
639 .n_cipher_suites = 8,
640 .num_peers = TARGET_QCA9377_HL_NUM_PEERS,
641 .ast_skid_limit = 0x10,
642 .num_wds_entries = 0x20,
643 .uart_pin_workaround = true,
644 .credit_size_workaround = true,
645 .dynamic_sar_support = false,
646 .hw_restart_disconnect = false,
647 .use_fw_tx_credits = true,
648 .delay_unmap_buffer = false,
649 },
650 {
651 .id = QCA4019_HW_1_0_DEV_VERSION,
652 .dev_id = 0,
653 .bus = ATH10K_BUS_AHB,
654 .name = "qca4019 hw1.0",
655 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
656 .uart_pin = 7,
657 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
658 .otp_exe_param = 0x0010000,
659 .continuous_frag_desc = true,
660 .cck_rate_map_rev2 = true,
661 .channel_counters_freq_hz = 125000,
662 .max_probe_resp_desc_thres = 24,
663 .tx_chain_mask = 0x3,
664 .rx_chain_mask = 0x3,
665 .max_spatial_stream = 2,
666 .cal_data_len = 12064,
667 .fw = {
668 .dir = QCA4019_HW_1_0_FW_DIR,
669 .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
670 .board_size = QCA4019_BOARD_DATA_SZ,
671 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
672 },
673 .sw_decrypt_mcast_mgmt = true,
674 .rx_desc_ops = &qca99x0_rx_desc_ops,
675 .hw_ops = &qca99x0_ops,
676 .decap_align_bytes = 1,
677 .spectral_bin_discard = 4,
678 .spectral_bin_offset = 0,
679 .vht160_mcs_rx_highest = 0,
680 .vht160_mcs_tx_highest = 0,
681 .n_cipher_suites = 11,
682 .ast_skid_limit = 0x10,
683 .num_wds_entries = 0x20,
684 .target_64bit = false,
685 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
686 .shadow_reg_support = false,
687 .rri_on_ddr = false,
688 .hw_filter_reset_required = true,
689 .fw_diag_ce_download = false,
690 .credit_size_workaround = false,
691 .tx_stats_over_pktlog = false,
692 .dynamic_sar_support = false,
693 .hw_restart_disconnect = false,
694 .use_fw_tx_credits = true,
695 .delay_unmap_buffer = false,
696 },
697 {
698 .id = WCN3990_HW_1_0_DEV_VERSION,
699 .dev_id = 0,
700 .bus = ATH10K_BUS_SNOC,
701 .name = "wcn3990 hw1.0",
702 .continuous_frag_desc = true,
703 .tx_chain_mask = 0x7,
704 .rx_chain_mask = 0x7,
705 .max_spatial_stream = 4,
706 .fw = {
707 .dir = WCN3990_HW_1_0_FW_DIR,
708 .board = WCN3990_HW_1_0_BOARD_DATA_FILE,
709 .board_size = WCN3990_BOARD_DATA_SZ,
710 .board_ext_size = WCN3990_BOARD_EXT_DATA_SZ,
711 },
712 .sw_decrypt_mcast_mgmt = true,
713 .rx_desc_ops = &wcn3990_rx_desc_ops,
714 .hw_ops = &wcn3990_ops,
715 .decap_align_bytes = 1,
716 .num_peers = TARGET_HL_TLV_NUM_PEERS,
717 .n_cipher_suites = 11,
718 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
719 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
720 .target_64bit = true,
721 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
722 .shadow_reg_support = true,
723 .rri_on_ddr = true,
724 .hw_filter_reset_required = false,
725 .fw_diag_ce_download = false,
726 .credit_size_workaround = false,
727 .tx_stats_over_pktlog = false,
728 .dynamic_sar_support = true,
729 .hw_restart_disconnect = true,
730 .use_fw_tx_credits = false,
731 .delay_unmap_buffer = true,
732 },
733 };
734
735 static const char *const ath10k_core_fw_feature_str[] = {
736 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
737 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
738 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
739 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
740 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
741 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
742 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
743 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
744 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
745 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
746 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
747 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
748 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
749 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
750 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
751 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
752 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
753 [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
754 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
755 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
756 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
757 [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
758 [ATH10K_FW_FEATURE_IRAM_RECOVERY] = "iram-recovery",
759 };
760
ath10k_core_get_fw_feature_str(char * buf,size_t buf_len,enum ath10k_fw_features feat)761 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
762 size_t buf_len,
763 enum ath10k_fw_features feat)
764 {
765 /* make sure that ath10k_core_fw_feature_str[] gets updated */
766 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
767 ATH10K_FW_FEATURE_COUNT);
768
769 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
770 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
771 return scnprintf(buf, buf_len, "bit%d", feat);
772 }
773
774 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
775 }
776
ath10k_core_get_fw_features_str(struct ath10k * ar,char * buf,size_t buf_len)777 void ath10k_core_get_fw_features_str(struct ath10k *ar,
778 char *buf,
779 size_t buf_len)
780 {
781 size_t len = 0;
782 int i;
783
784 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
785 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
786 if (len > 0)
787 len += scnprintf(buf + len, buf_len - len, ",");
788
789 len += ath10k_core_get_fw_feature_str(buf + len,
790 buf_len - len,
791 i);
792 }
793 }
794 }
795
ath10k_send_suspend_complete(struct ath10k * ar)796 static void ath10k_send_suspend_complete(struct ath10k *ar)
797 {
798 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
799
800 complete(&ar->target_suspend);
801 }
802
ath10k_init_sdio(struct ath10k * ar,enum ath10k_firmware_mode mode)803 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
804 {
805 bool mtu_workaround = ar->hw_params.credit_size_workaround;
806 int ret;
807 u32 param = 0;
808
809 ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
810 if (ret)
811 return ret;
812
813 ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
814 if (ret)
815 return ret;
816
817 ret = ath10k_bmi_read32(ar, hi_acs_flags, ¶m);
818 if (ret)
819 return ret;
820
821 param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
822
823 if (mode == ATH10K_FIRMWARE_MODE_NORMAL && !mtu_workaround)
824 param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
825 else
826 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
827
828 if (mode == ATH10K_FIRMWARE_MODE_UTF)
829 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
830 else
831 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
832
833 ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
834 if (ret)
835 return ret;
836
837 ret = ath10k_bmi_read32(ar, hi_option_flag2, ¶m);
838 if (ret)
839 return ret;
840
841 param |= HI_OPTION_SDIO_CRASH_DUMP_ENHANCEMENT_HOST;
842
843 ret = ath10k_bmi_write32(ar, hi_option_flag2, param);
844 if (ret)
845 return ret;
846
847 return 0;
848 }
849
ath10k_init_configure_target(struct ath10k * ar)850 static int ath10k_init_configure_target(struct ath10k *ar)
851 {
852 u32 param_host;
853 int ret;
854
855 /* tell target which HTC version it is used*/
856 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
857 HTC_PROTOCOL_VERSION);
858 if (ret) {
859 ath10k_err(ar, "settings HTC version failed\n");
860 return ret;
861 }
862
863 /* set the firmware mode to STA/IBSS/AP */
864 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host);
865 if (ret) {
866 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
867 return ret;
868 }
869
870 /* TODO following parameters need to be re-visited. */
871 /* num_device */
872 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
873 /* Firmware mode */
874 /* FIXME: Why FW_MODE_AP ??.*/
875 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
876 /* mac_addr_method */
877 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
878 /* firmware_bridge */
879 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
880 /* fwsubmode */
881 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
882
883 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
884 if (ret) {
885 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
886 return ret;
887 }
888
889 /* We do all byte-swapping on the host */
890 ret = ath10k_bmi_write32(ar, hi_be, 0);
891 if (ret) {
892 ath10k_err(ar, "setting host CPU BE mode failed\n");
893 return ret;
894 }
895
896 /* FW descriptor/Data swap flags */
897 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
898
899 if (ret) {
900 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
901 return ret;
902 }
903
904 /* Some devices have a special sanity check that verifies the PCI
905 * Device ID is written to this host interest var. It is known to be
906 * required to boot QCA6164.
907 */
908 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
909 ar->dev_id);
910 if (ret) {
911 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
912 return ret;
913 }
914
915 return 0;
916 }
917
ath10k_fetch_fw_file(struct ath10k * ar,const char * dir,const char * file)918 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
919 const char *dir,
920 const char *file)
921 {
922 char filename[100];
923 const struct firmware *fw;
924 int ret;
925
926 if (file == NULL)
927 return ERR_PTR(-ENOENT);
928
929 if (dir == NULL)
930 dir = ".";
931
932 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
933 ret = firmware_request_nowarn(&fw, filename, ar->dev);
934 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
935 filename, ret);
936
937 if (ret)
938 return ERR_PTR(ret);
939
940 return fw;
941 }
942
ath10k_push_board_ext_data(struct ath10k * ar,const void * data,size_t data_len)943 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
944 size_t data_len)
945 {
946 u32 board_data_size = ar->hw_params.fw.board_size;
947 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
948 u32 board_ext_data_addr;
949 int ret;
950
951 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
952 if (ret) {
953 ath10k_err(ar, "could not read board ext data addr (%d)\n",
954 ret);
955 return ret;
956 }
957
958 ath10k_dbg(ar, ATH10K_DBG_BOOT,
959 "boot push board extended data addr 0x%x\n",
960 board_ext_data_addr);
961
962 if (board_ext_data_addr == 0)
963 return 0;
964
965 if (data_len != (board_data_size + board_ext_data_size)) {
966 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
967 data_len, board_data_size, board_ext_data_size);
968 return -EINVAL;
969 }
970
971 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
972 data + board_data_size,
973 board_ext_data_size);
974 if (ret) {
975 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
976 return ret;
977 }
978
979 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
980 (board_ext_data_size << 16) | 1);
981 if (ret) {
982 ath10k_err(ar, "could not write board ext data bit (%d)\n",
983 ret);
984 return ret;
985 }
986
987 return 0;
988 }
989
ath10k_core_get_board_id_from_otp(struct ath10k * ar)990 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
991 {
992 u32 result, address;
993 u8 board_id, chip_id;
994 bool ext_bid_support;
995 int ret, bmi_board_id_param;
996
997 address = ar->hw_params.patch_load_addr;
998
999 if (!ar->normal_mode_fw.fw_file.otp_data ||
1000 !ar->normal_mode_fw.fw_file.otp_len) {
1001 ath10k_warn(ar,
1002 "failed to retrieve board id because of invalid otp\n");
1003 return -ENODATA;
1004 }
1005
1006 if (ar->id.bmi_ids_valid) {
1007 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1008 "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
1009 ar->id.bmi_board_id, ar->id.bmi_chip_id);
1010 goto skip_otp_download;
1011 }
1012
1013 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1014 "boot upload otp to 0x%x len %zd for board id\n",
1015 address, ar->normal_mode_fw.fw_file.otp_len);
1016
1017 ret = ath10k_bmi_fast_download(ar, address,
1018 ar->normal_mode_fw.fw_file.otp_data,
1019 ar->normal_mode_fw.fw_file.otp_len);
1020 if (ret) {
1021 ath10k_err(ar, "could not write otp for board id check: %d\n",
1022 ret);
1023 return ret;
1024 }
1025
1026 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1027 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
1028 ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
1029 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
1030 else
1031 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
1032
1033 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
1034 if (ret) {
1035 ath10k_err(ar, "could not execute otp for board id check: %d\n",
1036 ret);
1037 return ret;
1038 }
1039
1040 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
1041 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
1042 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
1043
1044 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1045 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
1046 result, board_id, chip_id, ext_bid_support);
1047
1048 ar->id.ext_bid_supported = ext_bid_support;
1049
1050 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
1051 (board_id == 0)) {
1052 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1053 "board id does not exist in otp, ignore it\n");
1054 return -EOPNOTSUPP;
1055 }
1056
1057 ar->id.bmi_ids_valid = true;
1058 ar->id.bmi_board_id = board_id;
1059 ar->id.bmi_chip_id = chip_id;
1060
1061 skip_otp_download:
1062
1063 return 0;
1064 }
1065
ath10k_core_check_bdfext(const struct dmi_header * hdr,void * data)1066 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
1067 {
1068 struct ath10k *ar = data;
1069 const char *bdf_ext;
1070 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
1071 u8 bdf_enabled;
1072 int i;
1073
1074 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
1075 return;
1076
1077 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
1078 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1079 "wrong smbios bdf ext type length (%d).\n",
1080 hdr->length);
1081 return;
1082 }
1083
1084 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
1085 if (!bdf_enabled) {
1086 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
1087 return;
1088 }
1089
1090 /* Only one string exists (per spec) */
1091 bdf_ext = (char *)hdr + hdr->length;
1092
1093 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
1094 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1095 "bdf variant magic does not match.\n");
1096 return;
1097 }
1098
1099 for (i = 0; i < strlen(bdf_ext); i++) {
1100 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
1101 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1102 "bdf variant name contains non ascii chars.\n");
1103 return;
1104 }
1105 }
1106
1107 /* Copy extension name without magic suffix */
1108 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1109 sizeof(ar->id.bdf_ext)) < 0) {
1110 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1111 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1112 bdf_ext);
1113 return;
1114 }
1115
1116 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1117 "found and validated bdf variant smbios_type 0x%x bdf %s\n",
1118 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1119 }
1120
ath10k_core_check_smbios(struct ath10k * ar)1121 static int ath10k_core_check_smbios(struct ath10k *ar)
1122 {
1123 ar->id.bdf_ext[0] = '\0';
1124 dmi_walk(ath10k_core_check_bdfext, ar);
1125
1126 if (ar->id.bdf_ext[0] == '\0')
1127 return -ENODATA;
1128
1129 return 0;
1130 }
1131
ath10k_core_check_dt(struct ath10k * ar)1132 int ath10k_core_check_dt(struct ath10k *ar)
1133 {
1134 struct device_node *node;
1135 const char *variant = NULL;
1136
1137 node = ar->dev->of_node;
1138 if (!node)
1139 return -ENOENT;
1140
1141 of_property_read_string(node, "qcom,ath10k-calibration-variant",
1142 &variant);
1143 if (!variant)
1144 return -ENODATA;
1145
1146 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1147 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1148 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1149 variant);
1150
1151 return 0;
1152 }
1153 EXPORT_SYMBOL(ath10k_core_check_dt);
1154
ath10k_download_fw(struct ath10k * ar)1155 static int ath10k_download_fw(struct ath10k *ar)
1156 {
1157 u32 address, data_len;
1158 const void *data;
1159 int ret;
1160 struct pm_qos_request latency_qos;
1161
1162 address = ar->hw_params.patch_load_addr;
1163
1164 data = ar->running_fw->fw_file.firmware_data;
1165 data_len = ar->running_fw->fw_file.firmware_len;
1166
1167 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1168 if (ret) {
1169 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1170 ret);
1171 return ret;
1172 }
1173
1174 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1175 "boot uploading firmware image %pK len %d\n",
1176 data, data_len);
1177
1178 /* Check if device supports to download firmware via
1179 * diag copy engine. Downloading firmware via diag CE
1180 * greatly reduces the time to download firmware.
1181 */
1182 if (ar->hw_params.fw_diag_ce_download) {
1183 ret = ath10k_hw_diag_fast_download(ar, address,
1184 data, data_len);
1185 if (ret == 0)
1186 /* firmware upload via diag ce was successful */
1187 return 0;
1188
1189 ath10k_warn(ar,
1190 "failed to upload firmware via diag ce, trying BMI: %d",
1191 ret);
1192 }
1193
1194 memset(&latency_qos, 0, sizeof(latency_qos));
1195 cpu_latency_qos_add_request(&latency_qos, 0);
1196
1197 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1198
1199 cpu_latency_qos_remove_request(&latency_qos);
1200
1201 return ret;
1202 }
1203
ath10k_core_free_board_files(struct ath10k * ar)1204 void ath10k_core_free_board_files(struct ath10k *ar)
1205 {
1206 if (!IS_ERR(ar->normal_mode_fw.board))
1207 release_firmware(ar->normal_mode_fw.board);
1208
1209 if (!IS_ERR(ar->normal_mode_fw.ext_board))
1210 release_firmware(ar->normal_mode_fw.ext_board);
1211
1212 ar->normal_mode_fw.board = NULL;
1213 ar->normal_mode_fw.board_data = NULL;
1214 ar->normal_mode_fw.board_len = 0;
1215 ar->normal_mode_fw.ext_board = NULL;
1216 ar->normal_mode_fw.ext_board_data = NULL;
1217 ar->normal_mode_fw.ext_board_len = 0;
1218 }
1219 EXPORT_SYMBOL(ath10k_core_free_board_files);
1220
ath10k_core_free_firmware_files(struct ath10k * ar)1221 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1222 {
1223 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1224 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1225
1226 if (!IS_ERR(ar->cal_file))
1227 release_firmware(ar->cal_file);
1228
1229 if (!IS_ERR(ar->pre_cal_file))
1230 release_firmware(ar->pre_cal_file);
1231
1232 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1233
1234 ar->normal_mode_fw.fw_file.otp_data = NULL;
1235 ar->normal_mode_fw.fw_file.otp_len = 0;
1236
1237 ar->normal_mode_fw.fw_file.firmware = NULL;
1238 ar->normal_mode_fw.fw_file.firmware_data = NULL;
1239 ar->normal_mode_fw.fw_file.firmware_len = 0;
1240
1241 ar->cal_file = NULL;
1242 ar->pre_cal_file = NULL;
1243 }
1244
ath10k_fetch_cal_file(struct ath10k * ar)1245 static int ath10k_fetch_cal_file(struct ath10k *ar)
1246 {
1247 char filename[100];
1248
1249 /* pre-cal-<bus>-<id>.bin */
1250 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1251 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1252
1253 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1254 if (!IS_ERR(ar->pre_cal_file))
1255 goto success;
1256
1257 /* cal-<bus>-<id>.bin */
1258 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1259 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1260
1261 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1262 if (IS_ERR(ar->cal_file))
1263 /* calibration file is optional, don't print any warnings */
1264 return PTR_ERR(ar->cal_file);
1265 success:
1266 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1267 ATH10K_FW_DIR, filename);
1268
1269 return 0;
1270 }
1271
ath10k_core_fetch_board_data_api_1(struct ath10k * ar,int bd_ie_type)1272 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1273 {
1274 const struct firmware *fw;
1275 char boardname[100];
1276
1277 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1278 if (!ar->hw_params.fw.board) {
1279 ath10k_err(ar, "failed to find board file fw entry\n");
1280 return -EINVAL;
1281 }
1282
1283 scnprintf(boardname, sizeof(boardname), "board-%s-%s.bin",
1284 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1285
1286 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1287 ar->hw_params.fw.dir,
1288 boardname);
1289 if (IS_ERR(ar->normal_mode_fw.board)) {
1290 fw = ath10k_fetch_fw_file(ar,
1291 ar->hw_params.fw.dir,
1292 ar->hw_params.fw.board);
1293 ar->normal_mode_fw.board = fw;
1294 }
1295
1296 if (IS_ERR(ar->normal_mode_fw.board))
1297 return PTR_ERR(ar->normal_mode_fw.board);
1298
1299 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1300 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1301 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1302 if (!ar->hw_params.fw.eboard) {
1303 ath10k_err(ar, "failed to find eboard file fw entry\n");
1304 return -EINVAL;
1305 }
1306
1307 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1308 ar->hw_params.fw.eboard);
1309 ar->normal_mode_fw.ext_board = fw;
1310 if (IS_ERR(ar->normal_mode_fw.ext_board))
1311 return PTR_ERR(ar->normal_mode_fw.ext_board);
1312
1313 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1314 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1315 }
1316
1317 return 0;
1318 }
1319
ath10k_core_parse_bd_ie_board(struct ath10k * ar,const void * buf,size_t buf_len,const char * boardname,int bd_ie_type)1320 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1321 const void *buf, size_t buf_len,
1322 const char *boardname,
1323 int bd_ie_type)
1324 {
1325 const struct ath10k_fw_ie *hdr;
1326 bool name_match_found;
1327 int ret, board_ie_id;
1328 size_t board_ie_len;
1329 const void *board_ie_data;
1330
1331 name_match_found = false;
1332
1333 /* go through ATH10K_BD_IE_BOARD_ elements */
1334 while (buf_len > sizeof(struct ath10k_fw_ie)) {
1335 hdr = buf;
1336 board_ie_id = le32_to_cpu(hdr->id);
1337 board_ie_len = le32_to_cpu(hdr->len);
1338 board_ie_data = hdr->data;
1339
1340 buf_len -= sizeof(*hdr);
1341 buf += sizeof(*hdr);
1342
1343 if (buf_len < ALIGN(board_ie_len, 4)) {
1344 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1345 buf_len, ALIGN(board_ie_len, 4));
1346 ret = -EINVAL;
1347 goto out;
1348 }
1349
1350 switch (board_ie_id) {
1351 case ATH10K_BD_IE_BOARD_NAME:
1352 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1353 board_ie_data, board_ie_len);
1354
1355 if (board_ie_len != strlen(boardname))
1356 break;
1357
1358 ret = memcmp(board_ie_data, boardname, strlen(boardname));
1359 if (ret)
1360 break;
1361
1362 name_match_found = true;
1363 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1364 "boot found match for name '%s'",
1365 boardname);
1366 break;
1367 case ATH10K_BD_IE_BOARD_DATA:
1368 if (!name_match_found)
1369 /* no match found */
1370 break;
1371
1372 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1373 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1374 "boot found board data for '%s'",
1375 boardname);
1376
1377 ar->normal_mode_fw.board_data = board_ie_data;
1378 ar->normal_mode_fw.board_len = board_ie_len;
1379 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1380 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1381 "boot found eboard data for '%s'",
1382 boardname);
1383
1384 ar->normal_mode_fw.ext_board_data = board_ie_data;
1385 ar->normal_mode_fw.ext_board_len = board_ie_len;
1386 }
1387
1388 ret = 0;
1389 goto out;
1390 default:
1391 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1392 board_ie_id);
1393 break;
1394 }
1395
1396 /* jump over the padding */
1397 board_ie_len = ALIGN(board_ie_len, 4);
1398
1399 buf_len -= board_ie_len;
1400 buf += board_ie_len;
1401 }
1402
1403 /* no match found */
1404 ret = -ENOENT;
1405
1406 out:
1407 return ret;
1408 }
1409
ath10k_core_search_bd(struct ath10k * ar,const char * boardname,const u8 * data,size_t len)1410 static int ath10k_core_search_bd(struct ath10k *ar,
1411 const char *boardname,
1412 const u8 *data,
1413 size_t len)
1414 {
1415 size_t ie_len;
1416 struct ath10k_fw_ie *hdr;
1417 int ret = -ENOENT, ie_id;
1418
1419 while (len > sizeof(struct ath10k_fw_ie)) {
1420 hdr = (struct ath10k_fw_ie *)data;
1421 ie_id = le32_to_cpu(hdr->id);
1422 ie_len = le32_to_cpu(hdr->len);
1423
1424 len -= sizeof(*hdr);
1425 data = hdr->data;
1426
1427 if (len < ALIGN(ie_len, 4)) {
1428 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1429 ie_id, ie_len, len);
1430 return -EINVAL;
1431 }
1432
1433 switch (ie_id) {
1434 case ATH10K_BD_IE_BOARD:
1435 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1436 boardname,
1437 ATH10K_BD_IE_BOARD);
1438 if (ret == -ENOENT)
1439 /* no match found, continue */
1440 break;
1441
1442 /* either found or error, so stop searching */
1443 goto out;
1444 case ATH10K_BD_IE_BOARD_EXT:
1445 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1446 boardname,
1447 ATH10K_BD_IE_BOARD_EXT);
1448 if (ret == -ENOENT)
1449 /* no match found, continue */
1450 break;
1451
1452 /* either found or error, so stop searching */
1453 goto out;
1454 }
1455
1456 /* jump over the padding */
1457 ie_len = ALIGN(ie_len, 4);
1458
1459 len -= ie_len;
1460 data += ie_len;
1461 }
1462
1463 out:
1464 /* return result of parse_bd_ie_board() or -ENOENT */
1465 return ret;
1466 }
1467
ath10k_core_fetch_board_data_api_n(struct ath10k * ar,const char * boardname,const char * fallback_boardname1,const char * fallback_boardname2,const char * filename)1468 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1469 const char *boardname,
1470 const char *fallback_boardname1,
1471 const char *fallback_boardname2,
1472 const char *filename)
1473 {
1474 size_t len, magic_len;
1475 const u8 *data;
1476 int ret;
1477
1478 /* Skip if already fetched during board data download */
1479 if (!ar->normal_mode_fw.board)
1480 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1481 ar->hw_params.fw.dir,
1482 filename);
1483 if (IS_ERR(ar->normal_mode_fw.board))
1484 return PTR_ERR(ar->normal_mode_fw.board);
1485
1486 data = ar->normal_mode_fw.board->data;
1487 len = ar->normal_mode_fw.board->size;
1488
1489 /* magic has extra null byte padded */
1490 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1491 if (len < magic_len) {
1492 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1493 ar->hw_params.fw.dir, filename, len);
1494 ret = -EINVAL;
1495 goto err;
1496 }
1497
1498 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1499 ath10k_err(ar, "found invalid board magic\n");
1500 ret = -EINVAL;
1501 goto err;
1502 }
1503
1504 /* magic is padded to 4 bytes */
1505 magic_len = ALIGN(magic_len, 4);
1506 if (len < magic_len) {
1507 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1508 ar->hw_params.fw.dir, filename, len);
1509 ret = -EINVAL;
1510 goto err;
1511 }
1512
1513 data += magic_len;
1514 len -= magic_len;
1515
1516 /* attempt to find boardname in the IE list */
1517 ret = ath10k_core_search_bd(ar, boardname, data, len);
1518
1519 /* if we didn't find it and have a fallback name, try that */
1520 if (ret == -ENOENT && fallback_boardname1)
1521 ret = ath10k_core_search_bd(ar, fallback_boardname1, data, len);
1522
1523 if (ret == -ENOENT && fallback_boardname2)
1524 ret = ath10k_core_search_bd(ar, fallback_boardname2, data, len);
1525
1526 if (ret == -ENOENT) {
1527 ath10k_err(ar,
1528 "failed to fetch board data for %s from %s/%s\n",
1529 boardname, ar->hw_params.fw.dir, filename);
1530 ret = -ENODATA;
1531 }
1532
1533 if (ret)
1534 goto err;
1535
1536 return 0;
1537
1538 err:
1539 ath10k_core_free_board_files(ar);
1540 return ret;
1541 }
1542
ath10k_core_create_board_name(struct ath10k * ar,char * name,size_t name_len,bool with_variant,bool with_chip_id)1543 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1544 size_t name_len, bool with_variant,
1545 bool with_chip_id)
1546 {
1547 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1548 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1549
1550 if (with_variant && ar->id.bdf_ext[0] != '\0')
1551 scnprintf(variant, sizeof(variant), ",variant=%s",
1552 ar->id.bdf_ext);
1553
1554 if (ar->id.bmi_ids_valid) {
1555 scnprintf(name, name_len,
1556 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1557 ath10k_bus_str(ar->hif.bus),
1558 ar->id.bmi_chip_id,
1559 ar->id.bmi_board_id, variant);
1560 goto out;
1561 }
1562
1563 if (ar->id.qmi_ids_valid) {
1564 if (with_chip_id)
1565 scnprintf(name, name_len,
1566 "bus=%s,qmi-board-id=%x,qmi-chip-id=%x%s",
1567 ath10k_bus_str(ar->hif.bus),
1568 ar->id.qmi_board_id, ar->id.qmi_chip_id,
1569 variant);
1570 else
1571 scnprintf(name, name_len,
1572 "bus=%s,qmi-board-id=%x",
1573 ath10k_bus_str(ar->hif.bus),
1574 ar->id.qmi_board_id);
1575 goto out;
1576 }
1577
1578 scnprintf(name, name_len,
1579 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1580 ath10k_bus_str(ar->hif.bus),
1581 ar->id.vendor, ar->id.device,
1582 ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1583 out:
1584 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1585
1586 return 0;
1587 }
1588
ath10k_core_create_eboard_name(struct ath10k * ar,char * name,size_t name_len)1589 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1590 size_t name_len)
1591 {
1592 if (ar->id.bmi_ids_valid) {
1593 scnprintf(name, name_len,
1594 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1595 ath10k_bus_str(ar->hif.bus),
1596 ar->id.bmi_chip_id,
1597 ar->id.bmi_eboard_id);
1598
1599 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1600 return 0;
1601 }
1602 /* Fallback if returned board id is zero */
1603 return -1;
1604 }
1605
ath10k_core_fetch_board_file(struct ath10k * ar,int bd_ie_type)1606 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1607 {
1608 char boardname[100], fallback_boardname1[100], fallback_boardname2[100];
1609 int ret;
1610
1611 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1612 /* With variant and chip id */
1613 ret = ath10k_core_create_board_name(ar, boardname,
1614 sizeof(boardname), true,
1615 true);
1616 if (ret) {
1617 ath10k_err(ar, "failed to create board name: %d", ret);
1618 return ret;
1619 }
1620
1621 /* Without variant and only chip-id */
1622 ret = ath10k_core_create_board_name(ar, fallback_boardname1,
1623 sizeof(boardname), false,
1624 true);
1625 if (ret) {
1626 ath10k_err(ar, "failed to create 1st fallback board name: %d",
1627 ret);
1628 return ret;
1629 }
1630
1631 /* Without variant and without chip-id */
1632 ret = ath10k_core_create_board_name(ar, fallback_boardname2,
1633 sizeof(boardname), false,
1634 false);
1635 if (ret) {
1636 ath10k_err(ar, "failed to create 2nd fallback board name: %d",
1637 ret);
1638 return ret;
1639 }
1640 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1641 ret = ath10k_core_create_eboard_name(ar, boardname,
1642 sizeof(boardname));
1643 if (ret) {
1644 ath10k_err(ar, "fallback to eboard.bin since board id 0");
1645 goto fallback;
1646 }
1647 }
1648
1649 ar->bd_api = 2;
1650 ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1651 fallback_boardname1,
1652 fallback_boardname2,
1653 ATH10K_BOARD_API2_FILE);
1654 if (!ret)
1655 goto success;
1656
1657 fallback:
1658 ar->bd_api = 1;
1659 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1660 if (ret) {
1661 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1662 ar->hw_params.fw.dir);
1663 return ret;
1664 }
1665
1666 success:
1667 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1668 return 0;
1669 }
1670 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1671
ath10k_core_get_ext_board_id_from_otp(struct ath10k * ar)1672 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1673 {
1674 u32 result, address;
1675 u8 ext_board_id;
1676 int ret;
1677
1678 address = ar->hw_params.patch_load_addr;
1679
1680 if (!ar->normal_mode_fw.fw_file.otp_data ||
1681 !ar->normal_mode_fw.fw_file.otp_len) {
1682 ath10k_warn(ar,
1683 "failed to retrieve extended board id due to otp binary missing\n");
1684 return -ENODATA;
1685 }
1686
1687 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1688 "boot upload otp to 0x%x len %zd for ext board id\n",
1689 address, ar->normal_mode_fw.fw_file.otp_len);
1690
1691 ret = ath10k_bmi_fast_download(ar, address,
1692 ar->normal_mode_fw.fw_file.otp_data,
1693 ar->normal_mode_fw.fw_file.otp_len);
1694 if (ret) {
1695 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1696 ret);
1697 return ret;
1698 }
1699
1700 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1701 if (ret) {
1702 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1703 ret);
1704 return ret;
1705 }
1706
1707 if (!result) {
1708 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1709 "ext board id does not exist in otp, ignore it\n");
1710 return -EOPNOTSUPP;
1711 }
1712
1713 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1714
1715 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1716 "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1717 result, ext_board_id);
1718
1719 ar->id.bmi_eboard_id = ext_board_id;
1720
1721 return 0;
1722 }
1723
ath10k_download_board_data(struct ath10k * ar,const void * data,size_t data_len)1724 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1725 size_t data_len)
1726 {
1727 u32 board_data_size = ar->hw_params.fw.board_size;
1728 u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1729 u32 board_address;
1730 u32 ext_board_address;
1731 int ret;
1732
1733 ret = ath10k_push_board_ext_data(ar, data, data_len);
1734 if (ret) {
1735 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1736 goto exit;
1737 }
1738
1739 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1740 if (ret) {
1741 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1742 goto exit;
1743 }
1744
1745 ret = ath10k_bmi_write_memory(ar, board_address, data,
1746 min_t(u32, board_data_size,
1747 data_len));
1748 if (ret) {
1749 ath10k_err(ar, "could not write board data (%d)\n", ret);
1750 goto exit;
1751 }
1752
1753 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1754 if (ret) {
1755 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1756 goto exit;
1757 }
1758
1759 if (!ar->id.ext_bid_supported)
1760 goto exit;
1761
1762 /* Extended board data download */
1763 ret = ath10k_core_get_ext_board_id_from_otp(ar);
1764 if (ret == -EOPNOTSUPP) {
1765 /* Not fetching ext_board_data if ext board id is 0 */
1766 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1767 return 0;
1768 } else if (ret) {
1769 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1770 goto exit;
1771 }
1772
1773 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1774 if (ret)
1775 goto exit;
1776
1777 if (ar->normal_mode_fw.ext_board_data) {
1778 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1779 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1780 "boot writing ext board data to addr 0x%x",
1781 ext_board_address);
1782 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1783 ar->normal_mode_fw.ext_board_data,
1784 min_t(u32, eboard_data_size, data_len));
1785 if (ret)
1786 ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1787 }
1788
1789 exit:
1790 return ret;
1791 }
1792
ath10k_download_and_run_otp(struct ath10k * ar)1793 static int ath10k_download_and_run_otp(struct ath10k *ar)
1794 {
1795 u32 result, address = ar->hw_params.patch_load_addr;
1796 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1797 int ret;
1798
1799 ret = ath10k_download_board_data(ar,
1800 ar->running_fw->board_data,
1801 ar->running_fw->board_len);
1802 if (ret) {
1803 ath10k_err(ar, "failed to download board data: %d\n", ret);
1804 return ret;
1805 }
1806
1807 /* OTP is optional */
1808
1809 if (!ar->running_fw->fw_file.otp_data ||
1810 !ar->running_fw->fw_file.otp_len) {
1811 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1812 ar->running_fw->fw_file.otp_data,
1813 ar->running_fw->fw_file.otp_len);
1814 return 0;
1815 }
1816
1817 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1818 address, ar->running_fw->fw_file.otp_len);
1819
1820 ret = ath10k_bmi_fast_download(ar, address,
1821 ar->running_fw->fw_file.otp_data,
1822 ar->running_fw->fw_file.otp_len);
1823 if (ret) {
1824 ath10k_err(ar, "could not write otp (%d)\n", ret);
1825 return ret;
1826 }
1827
1828 /* As of now pre-cal is valid for 10_4 variants */
1829 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1830 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
1831 ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
1832 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1833
1834 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1835 if (ret) {
1836 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1837 return ret;
1838 }
1839
1840 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1841
1842 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1843 ar->running_fw->fw_file.fw_features)) &&
1844 result != 0) {
1845 ath10k_err(ar, "otp calibration failed: %d", result);
1846 return -EINVAL;
1847 }
1848
1849 return 0;
1850 }
1851
ath10k_download_cal_file(struct ath10k * ar,const struct firmware * file)1852 static int ath10k_download_cal_file(struct ath10k *ar,
1853 const struct firmware *file)
1854 {
1855 int ret;
1856
1857 if (!file)
1858 return -ENOENT;
1859
1860 if (IS_ERR(file))
1861 return PTR_ERR(file);
1862
1863 ret = ath10k_download_board_data(ar, file->data, file->size);
1864 if (ret) {
1865 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1866 return ret;
1867 }
1868
1869 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1870
1871 return 0;
1872 }
1873
ath10k_download_cal_dt(struct ath10k * ar,const char * dt_name)1874 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1875 {
1876 struct device_node *node;
1877 int data_len;
1878 void *data;
1879 int ret;
1880
1881 node = ar->dev->of_node;
1882 if (!node)
1883 /* Device Tree is optional, don't print any warnings if
1884 * there's no node for ath10k.
1885 */
1886 return -ENOENT;
1887
1888 if (!of_get_property(node, dt_name, &data_len)) {
1889 /* The calibration data node is optional */
1890 return -ENOENT;
1891 }
1892
1893 if (data_len != ar->hw_params.cal_data_len) {
1894 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1895 data_len);
1896 ret = -EMSGSIZE;
1897 goto out;
1898 }
1899
1900 data = kmalloc(data_len, GFP_KERNEL);
1901 if (!data) {
1902 ret = -ENOMEM;
1903 goto out;
1904 }
1905
1906 ret = of_property_read_u8_array(node, dt_name, data, data_len);
1907 if (ret) {
1908 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1909 ret);
1910 goto out_free;
1911 }
1912
1913 ret = ath10k_download_board_data(ar, data, data_len);
1914 if (ret) {
1915 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1916 ret);
1917 goto out_free;
1918 }
1919
1920 ret = 0;
1921
1922 out_free:
1923 kfree(data);
1924
1925 out:
1926 return ret;
1927 }
1928
ath10k_download_cal_eeprom(struct ath10k * ar)1929 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1930 {
1931 size_t data_len;
1932 void *data = NULL;
1933 int ret;
1934
1935 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1936 if (ret) {
1937 if (ret != -EOPNOTSUPP)
1938 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
1939 ret);
1940 goto out_free;
1941 }
1942
1943 ret = ath10k_download_board_data(ar, data, data_len);
1944 if (ret) {
1945 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
1946 ret);
1947 goto out_free;
1948 }
1949
1950 ret = 0;
1951
1952 out_free:
1953 kfree(data);
1954
1955 return ret;
1956 }
1957
ath10k_download_cal_nvmem(struct ath10k * ar,const char * cell_name)1958 static int ath10k_download_cal_nvmem(struct ath10k *ar, const char *cell_name)
1959 {
1960 struct nvmem_cell *cell;
1961 void *buf;
1962 size_t len;
1963 int ret;
1964
1965 cell = devm_nvmem_cell_get(ar->dev, cell_name);
1966 if (IS_ERR(cell)) {
1967 ret = PTR_ERR(cell);
1968 return ret;
1969 }
1970
1971 buf = nvmem_cell_read(cell, &len);
1972 if (IS_ERR(buf))
1973 return PTR_ERR(buf);
1974
1975 if (ar->hw_params.cal_data_len != len) {
1976 kfree(buf);
1977 ath10k_warn(ar, "invalid calibration data length in nvmem-cell '%s': %zu != %u\n",
1978 cell_name, len, ar->hw_params.cal_data_len);
1979 return -EMSGSIZE;
1980 }
1981
1982 ret = ath10k_download_board_data(ar, buf, len);
1983 kfree(buf);
1984 if (ret)
1985 ath10k_warn(ar, "failed to download calibration data from nvmem-cell '%s': %d\n",
1986 cell_name, ret);
1987
1988 return ret;
1989 }
1990
ath10k_core_fetch_firmware_api_n(struct ath10k * ar,const char * name,struct ath10k_fw_file * fw_file)1991 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1992 struct ath10k_fw_file *fw_file)
1993 {
1994 size_t magic_len, len, ie_len;
1995 int ie_id, i, index, bit, ret;
1996 struct ath10k_fw_ie *hdr;
1997 const u8 *data;
1998 __le32 *timestamp, *version;
1999
2000 /* first fetch the firmware file (firmware-*.bin) */
2001 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
2002 name);
2003 if (IS_ERR(fw_file->firmware))
2004 return PTR_ERR(fw_file->firmware);
2005
2006 data = fw_file->firmware->data;
2007 len = fw_file->firmware->size;
2008
2009 /* magic also includes the null byte, check that as well */
2010 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
2011
2012 if (len < magic_len) {
2013 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
2014 ar->hw_params.fw.dir, name, len);
2015 ret = -EINVAL;
2016 goto err;
2017 }
2018
2019 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
2020 ath10k_err(ar, "invalid firmware magic\n");
2021 ret = -EINVAL;
2022 goto err;
2023 }
2024
2025 /* jump over the padding */
2026 magic_len = ALIGN(magic_len, 4);
2027
2028 len -= magic_len;
2029 data += magic_len;
2030
2031 /* loop elements */
2032 while (len > sizeof(struct ath10k_fw_ie)) {
2033 hdr = (struct ath10k_fw_ie *)data;
2034
2035 ie_id = le32_to_cpu(hdr->id);
2036 ie_len = le32_to_cpu(hdr->len);
2037
2038 len -= sizeof(*hdr);
2039 data += sizeof(*hdr);
2040
2041 if (len < ie_len) {
2042 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
2043 ie_id, len, ie_len);
2044 ret = -EINVAL;
2045 goto err;
2046 }
2047
2048 switch (ie_id) {
2049 case ATH10K_FW_IE_FW_VERSION:
2050 if (ie_len > sizeof(fw_file->fw_version) - 1)
2051 break;
2052
2053 memcpy(fw_file->fw_version, data, ie_len);
2054 fw_file->fw_version[ie_len] = '\0';
2055
2056 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2057 "found fw version %s\n",
2058 fw_file->fw_version);
2059 break;
2060 case ATH10K_FW_IE_TIMESTAMP:
2061 if (ie_len != sizeof(u32))
2062 break;
2063
2064 timestamp = (__le32 *)data;
2065
2066 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
2067 le32_to_cpup(timestamp));
2068 break;
2069 case ATH10K_FW_IE_FEATURES:
2070 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2071 "found firmware features ie (%zd B)\n",
2072 ie_len);
2073
2074 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
2075 index = i / 8;
2076 bit = i % 8;
2077
2078 if (index == ie_len)
2079 break;
2080
2081 if (data[index] & (1 << bit)) {
2082 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2083 "Enabling feature bit: %i\n",
2084 i);
2085 __set_bit(i, fw_file->fw_features);
2086 }
2087 }
2088
2089 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
2090 fw_file->fw_features,
2091 sizeof(fw_file->fw_features));
2092 break;
2093 case ATH10K_FW_IE_FW_IMAGE:
2094 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2095 "found fw image ie (%zd B)\n",
2096 ie_len);
2097
2098 fw_file->firmware_data = data;
2099 fw_file->firmware_len = ie_len;
2100
2101 break;
2102 case ATH10K_FW_IE_OTP_IMAGE:
2103 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2104 "found otp image ie (%zd B)\n",
2105 ie_len);
2106
2107 fw_file->otp_data = data;
2108 fw_file->otp_len = ie_len;
2109
2110 break;
2111 case ATH10K_FW_IE_WMI_OP_VERSION:
2112 if (ie_len != sizeof(u32))
2113 break;
2114
2115 version = (__le32 *)data;
2116
2117 fw_file->wmi_op_version = le32_to_cpup(version);
2118
2119 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
2120 fw_file->wmi_op_version);
2121 break;
2122 case ATH10K_FW_IE_HTT_OP_VERSION:
2123 if (ie_len != sizeof(u32))
2124 break;
2125
2126 version = (__le32 *)data;
2127
2128 fw_file->htt_op_version = le32_to_cpup(version);
2129
2130 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
2131 fw_file->htt_op_version);
2132 break;
2133 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
2134 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2135 "found fw code swap image ie (%zd B)\n",
2136 ie_len);
2137 fw_file->codeswap_data = data;
2138 fw_file->codeswap_len = ie_len;
2139 break;
2140 default:
2141 ath10k_warn(ar, "Unknown FW IE: %u\n",
2142 le32_to_cpu(hdr->id));
2143 break;
2144 }
2145
2146 /* jump over the padding */
2147 ie_len = ALIGN(ie_len, 4);
2148
2149 len -= ie_len;
2150 data += ie_len;
2151 }
2152
2153 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
2154 (!fw_file->firmware_data || !fw_file->firmware_len)) {
2155 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
2156 ar->hw_params.fw.dir, name);
2157 ret = -ENOMEDIUM;
2158 goto err;
2159 }
2160
2161 return 0;
2162
2163 err:
2164 ath10k_core_free_firmware_files(ar);
2165 return ret;
2166 }
2167
ath10k_core_get_fw_name(struct ath10k * ar,char * fw_name,size_t fw_name_len,int fw_api)2168 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
2169 size_t fw_name_len, int fw_api)
2170 {
2171 switch (ar->hif.bus) {
2172 case ATH10K_BUS_SDIO:
2173 case ATH10K_BUS_USB:
2174 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
2175 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
2176 fw_api);
2177 break;
2178 case ATH10K_BUS_PCI:
2179 case ATH10K_BUS_AHB:
2180 case ATH10K_BUS_SNOC:
2181 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
2182 ATH10K_FW_FILE_BASE, fw_api);
2183 break;
2184 }
2185 }
2186
ath10k_core_fetch_firmware_files(struct ath10k * ar)2187 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
2188 {
2189 int ret, i;
2190 char fw_name[100];
2191
2192 /* calibration file is optional, don't check for any errors */
2193 ath10k_fetch_cal_file(ar);
2194
2195 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
2196 ar->fw_api = i;
2197 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
2198 ar->fw_api);
2199
2200 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
2201 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
2202 &ar->normal_mode_fw.fw_file);
2203 if (!ret)
2204 goto success;
2205 }
2206
2207 /* we end up here if we couldn't fetch any firmware */
2208
2209 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
2210 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
2211 ret);
2212
2213 return ret;
2214
2215 success:
2216 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
2217
2218 return 0;
2219 }
2220
ath10k_core_pre_cal_download(struct ath10k * ar)2221 static int ath10k_core_pre_cal_download(struct ath10k *ar)
2222 {
2223 int ret;
2224
2225 ret = ath10k_download_cal_nvmem(ar, "pre-calibration");
2226 if (ret == 0) {
2227 ar->cal_mode = ATH10K_PRE_CAL_MODE_NVMEM;
2228 goto success;
2229 } else if (ret == -EPROBE_DEFER) {
2230 return ret;
2231 }
2232
2233 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2234 "boot did not find a pre-calibration nvmem-cell, try file next: %d\n",
2235 ret);
2236
2237 ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
2238 if (ret == 0) {
2239 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2240 goto success;
2241 }
2242
2243 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2244 "boot did not find a pre calibration file, try DT next: %d\n",
2245 ret);
2246
2247 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2248 if (ret) {
2249 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2250 "unable to load pre cal data from DT: %d\n", ret);
2251 return ret;
2252 }
2253 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2254
2255 success:
2256 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2257 ath10k_cal_mode_str(ar->cal_mode));
2258
2259 return 0;
2260 }
2261
ath10k_core_pre_cal_config(struct ath10k * ar)2262 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2263 {
2264 int ret;
2265
2266 ret = ath10k_core_pre_cal_download(ar);
2267 if (ret) {
2268 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2269 "failed to load pre cal data: %d\n", ret);
2270 return ret;
2271 }
2272
2273 ret = ath10k_core_get_board_id_from_otp(ar);
2274 if (ret) {
2275 ath10k_err(ar, "failed to get board id: %d\n", ret);
2276 return ret;
2277 }
2278
2279 ret = ath10k_download_and_run_otp(ar);
2280 if (ret) {
2281 ath10k_err(ar, "failed to run otp: %d\n", ret);
2282 return ret;
2283 }
2284
2285 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2286 "pre cal configuration done successfully\n");
2287
2288 return 0;
2289 }
2290
ath10k_download_cal_data(struct ath10k * ar)2291 static int ath10k_download_cal_data(struct ath10k *ar)
2292 {
2293 int ret;
2294
2295 ret = ath10k_core_pre_cal_config(ar);
2296 if (ret == 0)
2297 return 0;
2298
2299 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2300 "pre cal download procedure failed, try cal file: %d\n",
2301 ret);
2302
2303 ret = ath10k_download_cal_nvmem(ar, "calibration");
2304 if (ret == 0) {
2305 ar->cal_mode = ATH10K_CAL_MODE_NVMEM;
2306 goto done;
2307 } else if (ret == -EPROBE_DEFER) {
2308 return ret;
2309 }
2310
2311 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2312 "boot did not find a calibration nvmem-cell, try file next: %d\n",
2313 ret);
2314
2315 ret = ath10k_download_cal_file(ar, ar->cal_file);
2316 if (ret == 0) {
2317 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2318 goto done;
2319 }
2320
2321 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2322 "boot did not find a calibration file, try DT next: %d\n",
2323 ret);
2324
2325 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2326 if (ret == 0) {
2327 ar->cal_mode = ATH10K_CAL_MODE_DT;
2328 goto done;
2329 }
2330
2331 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2332 "boot did not find DT entry, try target EEPROM next: %d\n",
2333 ret);
2334
2335 ret = ath10k_download_cal_eeprom(ar);
2336 if (ret == 0) {
2337 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2338 goto done;
2339 }
2340
2341 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2342 "boot did not find target EEPROM entry, try OTP next: %d\n",
2343 ret);
2344
2345 ret = ath10k_download_and_run_otp(ar);
2346 if (ret) {
2347 ath10k_err(ar, "failed to run otp: %d\n", ret);
2348 return ret;
2349 }
2350
2351 ar->cal_mode = ATH10K_CAL_MODE_OTP;
2352
2353 done:
2354 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2355 ath10k_cal_mode_str(ar->cal_mode));
2356 return 0;
2357 }
2358
ath10k_core_fetch_btcoex_dt(struct ath10k * ar)2359 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
2360 {
2361 struct device_node *node;
2362 u8 coex_support = 0;
2363 int ret;
2364
2365 node = ar->dev->of_node;
2366 if (!node)
2367 goto out;
2368
2369 ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
2370 if (ret) {
2371 ar->coex_support = true;
2372 goto out;
2373 }
2374
2375 if (coex_support) {
2376 ar->coex_support = true;
2377 } else {
2378 ar->coex_support = false;
2379 ar->coex_gpio_pin = -1;
2380 goto out;
2381 }
2382
2383 ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
2384 &ar->coex_gpio_pin);
2385 if (ret)
2386 ar->coex_gpio_pin = -1;
2387
2388 out:
2389 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
2390 ar->coex_support, ar->coex_gpio_pin);
2391 }
2392
ath10k_init_uart(struct ath10k * ar)2393 static int ath10k_init_uart(struct ath10k *ar)
2394 {
2395 int ret;
2396
2397 /*
2398 * Explicitly setting UART prints to zero as target turns it on
2399 * based on scratch registers.
2400 */
2401 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2402 if (ret) {
2403 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2404 return ret;
2405 }
2406
2407 if (!uart_print) {
2408 if (ar->hw_params.uart_pin_workaround) {
2409 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2410 ar->hw_params.uart_pin);
2411 if (ret) {
2412 ath10k_warn(ar, "failed to set UART TX pin: %d",
2413 ret);
2414 return ret;
2415 }
2416 }
2417
2418 return 0;
2419 }
2420
2421 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2422 if (ret) {
2423 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2424 return ret;
2425 }
2426
2427 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2428 if (ret) {
2429 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2430 return ret;
2431 }
2432
2433 /* Set the UART baud rate to 19200. */
2434 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2435 if (ret) {
2436 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2437 return ret;
2438 }
2439
2440 ath10k_info(ar, "UART prints enabled\n");
2441 return 0;
2442 }
2443
ath10k_init_hw_params(struct ath10k * ar)2444 static int ath10k_init_hw_params(struct ath10k *ar)
2445 {
2446 const struct ath10k_hw_params *hw_params;
2447 int i;
2448
2449 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2450 hw_params = &ath10k_hw_params_list[i];
2451
2452 if (hw_params->bus == ar->hif.bus &&
2453 hw_params->id == ar->target_version &&
2454 hw_params->dev_id == ar->dev_id)
2455 break;
2456 }
2457
2458 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2459 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2460 ar->target_version);
2461 return -EINVAL;
2462 }
2463
2464 ar->hw_params = *hw_params;
2465
2466 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2467 ar->hw_params.name, ar->target_version);
2468
2469 return 0;
2470 }
2471
ath10k_core_start_recovery(struct ath10k * ar)2472 void ath10k_core_start_recovery(struct ath10k *ar)
2473 {
2474 if (test_and_set_bit(ATH10K_FLAG_RESTARTING, &ar->dev_flags)) {
2475 ath10k_warn(ar, "already restarting\n");
2476 return;
2477 }
2478
2479 queue_work(ar->workqueue, &ar->restart_work);
2480 }
2481 EXPORT_SYMBOL(ath10k_core_start_recovery);
2482
ath10k_core_napi_enable(struct ath10k * ar)2483 void ath10k_core_napi_enable(struct ath10k *ar)
2484 {
2485 lockdep_assert_held(&ar->conf_mutex);
2486
2487 if (test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2488 return;
2489
2490 napi_enable(&ar->napi);
2491 set_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2492 }
2493 EXPORT_SYMBOL(ath10k_core_napi_enable);
2494
ath10k_core_napi_sync_disable(struct ath10k * ar)2495 void ath10k_core_napi_sync_disable(struct ath10k *ar)
2496 {
2497 lockdep_assert_held(&ar->conf_mutex);
2498
2499 if (!test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2500 return;
2501
2502 napi_synchronize(&ar->napi);
2503 napi_disable(&ar->napi);
2504 clear_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2505 }
2506 EXPORT_SYMBOL(ath10k_core_napi_sync_disable);
2507
ath10k_core_restart(struct work_struct * work)2508 static void ath10k_core_restart(struct work_struct *work)
2509 {
2510 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2511 int ret;
2512
2513 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2514
2515 /* Place a barrier to make sure the compiler doesn't reorder
2516 * CRASH_FLUSH and calling other functions.
2517 */
2518 barrier();
2519
2520 ieee80211_stop_queues(ar->hw);
2521 ath10k_drain_tx(ar);
2522 complete(&ar->scan.started);
2523 complete(&ar->scan.completed);
2524 complete(&ar->scan.on_channel);
2525 complete(&ar->offchan_tx_completed);
2526 complete(&ar->install_key_done);
2527 complete(&ar->vdev_setup_done);
2528 complete(&ar->vdev_delete_done);
2529 complete(&ar->thermal.wmi_sync);
2530 complete(&ar->bss_survey_done);
2531 wake_up(&ar->htt.empty_tx_wq);
2532 wake_up(&ar->wmi.tx_credits_wq);
2533 wake_up(&ar->peer_mapping_wq);
2534
2535 /* TODO: We can have one instance of cancelling coverage_class_work by
2536 * moving it to ath10k_halt(), so that both stop() and restart() would
2537 * call that but it takes conf_mutex() and if we call cancel_work_sync()
2538 * with conf_mutex it will deadlock.
2539 */
2540 cancel_work_sync(&ar->set_coverage_class_work);
2541
2542 mutex_lock(&ar->conf_mutex);
2543
2544 switch (ar->state) {
2545 case ATH10K_STATE_ON:
2546 ar->state = ATH10K_STATE_RESTARTING;
2547 ath10k_halt(ar);
2548 ath10k_scan_finish(ar);
2549 ieee80211_restart_hw(ar->hw);
2550 break;
2551 case ATH10K_STATE_OFF:
2552 /* this can happen if driver is being unloaded
2553 * or if the crash happens during FW probing
2554 */
2555 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2556 break;
2557 case ATH10K_STATE_RESTARTING:
2558 /* hw restart might be requested from multiple places */
2559 break;
2560 case ATH10K_STATE_RESTARTED:
2561 ar->state = ATH10K_STATE_WEDGED;
2562 fallthrough;
2563 case ATH10K_STATE_WEDGED:
2564 ath10k_warn(ar, "device is wedged, will not restart\n");
2565 break;
2566 case ATH10K_STATE_UTF:
2567 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2568 break;
2569 }
2570
2571 mutex_unlock(&ar->conf_mutex);
2572
2573 ret = ath10k_coredump_submit(ar);
2574 if (ret)
2575 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2576 ret);
2577
2578 complete(&ar->driver_recovery);
2579 }
2580
ath10k_core_set_coverage_class_work(struct work_struct * work)2581 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2582 {
2583 struct ath10k *ar = container_of(work, struct ath10k,
2584 set_coverage_class_work);
2585
2586 if (ar->hw_params.hw_ops->set_coverage_class)
2587 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
2588 }
2589
ath10k_core_init_firmware_features(struct ath10k * ar)2590 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2591 {
2592 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2593 int max_num_peers;
2594
2595 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2596 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2597 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2598 return -EINVAL;
2599 }
2600
2601 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2602 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2603 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2604 return -EINVAL;
2605 }
2606
2607 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2608 switch (ath10k_cryptmode_param) {
2609 case ATH10K_CRYPT_MODE_HW:
2610 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2611 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2612 break;
2613 case ATH10K_CRYPT_MODE_SW:
2614 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2615 fw_file->fw_features)) {
2616 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2617 return -EINVAL;
2618 }
2619
2620 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2621 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2622 break;
2623 default:
2624 ath10k_info(ar, "invalid cryptmode: %d\n",
2625 ath10k_cryptmode_param);
2626 return -EINVAL;
2627 }
2628
2629 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2630 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2631
2632 if (ath10k_frame_mode == ATH10K_HW_TXRX_RAW) {
2633 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2634 fw_file->fw_features)) {
2635 ath10k_err(ar, "rawmode = 1 requires support from firmware");
2636 return -EINVAL;
2637 }
2638 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2639 }
2640
2641 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2642 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2643
2644 /* Workaround:
2645 *
2646 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2647 * and causes enormous performance issues (malformed frames,
2648 * etc).
2649 *
2650 * Disabling A-MSDU makes RAW mode stable with heavy traffic
2651 * albeit a bit slower compared to regular operation.
2652 */
2653 ar->htt.max_num_amsdu = 1;
2654 }
2655
2656 /* Backwards compatibility for firmwares without
2657 * ATH10K_FW_IE_WMI_OP_VERSION.
2658 */
2659 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2660 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2661 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2662 fw_file->fw_features))
2663 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2664 else
2665 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2666 } else {
2667 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2668 }
2669 }
2670
2671 switch (fw_file->wmi_op_version) {
2672 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2673 max_num_peers = TARGET_NUM_PEERS;
2674 ar->max_num_stations = TARGET_NUM_STATIONS;
2675 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2676 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2677 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2678 WMI_STAT_PEER;
2679 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2680 break;
2681 case ATH10K_FW_WMI_OP_VERSION_10_1:
2682 case ATH10K_FW_WMI_OP_VERSION_10_2:
2683 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2684 if (ath10k_peer_stats_enabled(ar)) {
2685 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2686 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2687 } else {
2688 max_num_peers = TARGET_10X_NUM_PEERS;
2689 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2690 }
2691 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2692 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2693 ar->fw_stats_req_mask = WMI_STAT_PEER;
2694 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2695 break;
2696 case ATH10K_FW_WMI_OP_VERSION_TLV:
2697 max_num_peers = TARGET_TLV_NUM_PEERS;
2698 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2699 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2700 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2701 if (ar->hif.bus == ATH10K_BUS_SDIO)
2702 ar->htt.max_num_pending_tx =
2703 TARGET_TLV_NUM_MSDU_DESC_HL;
2704 else
2705 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2706 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2707 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2708 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2709 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2710 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2711 break;
2712 case ATH10K_FW_WMI_OP_VERSION_10_4:
2713 max_num_peers = TARGET_10_4_NUM_PEERS;
2714 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2715 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2716 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2717 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2718 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2719 WMI_10_4_STAT_PEER_EXTD |
2720 WMI_10_4_STAT_VDEV_EXTD;
2721 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2722 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2723
2724 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2725 fw_file->fw_features))
2726 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2727 else
2728 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2729 break;
2730 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2731 case ATH10K_FW_WMI_OP_VERSION_MAX:
2732 default:
2733 WARN_ON(1);
2734 return -EINVAL;
2735 }
2736
2737 if (ar->hw_params.num_peers)
2738 ar->max_num_peers = ar->hw_params.num_peers;
2739 else
2740 ar->max_num_peers = max_num_peers;
2741
2742 /* Backwards compatibility for firmwares without
2743 * ATH10K_FW_IE_HTT_OP_VERSION.
2744 */
2745 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2746 switch (fw_file->wmi_op_version) {
2747 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2748 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2749 break;
2750 case ATH10K_FW_WMI_OP_VERSION_10_1:
2751 case ATH10K_FW_WMI_OP_VERSION_10_2:
2752 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2753 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2754 break;
2755 case ATH10K_FW_WMI_OP_VERSION_TLV:
2756 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2757 break;
2758 case ATH10K_FW_WMI_OP_VERSION_10_4:
2759 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2760 case ATH10K_FW_WMI_OP_VERSION_MAX:
2761 ath10k_err(ar, "htt op version not found from fw meta data");
2762 return -EINVAL;
2763 }
2764 }
2765
2766 return 0;
2767 }
2768
ath10k_core_reset_rx_filter(struct ath10k * ar)2769 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2770 {
2771 int ret;
2772 int vdev_id;
2773 int vdev_type;
2774 int vdev_subtype;
2775 const u8 *vdev_addr;
2776
2777 vdev_id = 0;
2778 vdev_type = WMI_VDEV_TYPE_STA;
2779 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2780 vdev_addr = ar->mac_addr;
2781
2782 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2783 vdev_addr);
2784 if (ret) {
2785 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2786 return ret;
2787 }
2788
2789 ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2790 if (ret) {
2791 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2792 return ret;
2793 }
2794
2795 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2796 * serialized properly implicitly.
2797 *
2798 * Moreover (most) WMI commands have no explicit acknowledges. It is
2799 * possible to infer it implicitly by poking firmware with echo
2800 * command - getting a reply means all preceding comments have been
2801 * (mostly) processed.
2802 *
2803 * In case of vdev create/delete this is sufficient.
2804 *
2805 * Without this it's possible to end up with a race when HTT Rx ring is
2806 * started before vdev create/delete hack is complete allowing a short
2807 * window of opportunity to receive (and Tx ACK) a bunch of frames.
2808 */
2809 ret = ath10k_wmi_barrier(ar);
2810 if (ret) {
2811 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2812 return ret;
2813 }
2814
2815 return 0;
2816 }
2817
ath10k_core_compat_services(struct ath10k * ar)2818 static int ath10k_core_compat_services(struct ath10k *ar)
2819 {
2820 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2821
2822 /* all 10.x firmware versions support thermal throttling but don't
2823 * advertise the support via service flags so we have to hardcode
2824 * it here
2825 */
2826 switch (fw_file->wmi_op_version) {
2827 case ATH10K_FW_WMI_OP_VERSION_10_1:
2828 case ATH10K_FW_WMI_OP_VERSION_10_2:
2829 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2830 case ATH10K_FW_WMI_OP_VERSION_10_4:
2831 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2832 break;
2833 default:
2834 break;
2835 }
2836
2837 return 0;
2838 }
2839
2840 #define TGT_IRAM_READ_PER_ITR (8 * 1024)
2841
ath10k_core_copy_target_iram(struct ath10k * ar)2842 static int ath10k_core_copy_target_iram(struct ath10k *ar)
2843 {
2844 const struct ath10k_hw_mem_layout *hw_mem;
2845 const struct ath10k_mem_region *tmp, *mem_region = NULL;
2846 dma_addr_t paddr;
2847 void *vaddr = NULL;
2848 u8 num_read_itr;
2849 int i, ret;
2850 u32 len, remaining_len;
2851
2852 /* copy target iram feature must work also when
2853 * ATH10K_FW_CRASH_DUMP_RAM_DATA is disabled, so
2854 * _ath10k_coredump_get_mem_layout() to accomplist that
2855 */
2856 hw_mem = _ath10k_coredump_get_mem_layout(ar);
2857 if (!hw_mem)
2858 /* if CONFIG_DEV_COREDUMP is disabled we get NULL, then
2859 * just silently disable the feature by doing nothing
2860 */
2861 return 0;
2862
2863 for (i = 0; i < hw_mem->region_table.size; i++) {
2864 tmp = &hw_mem->region_table.regions[i];
2865 if (tmp->type == ATH10K_MEM_REGION_TYPE_REG) {
2866 mem_region = tmp;
2867 break;
2868 }
2869 }
2870
2871 if (!mem_region)
2872 return -ENOMEM;
2873
2874 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2875 if (ar->wmi.mem_chunks[i].req_id ==
2876 WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID) {
2877 vaddr = ar->wmi.mem_chunks[i].vaddr;
2878 len = ar->wmi.mem_chunks[i].len;
2879 break;
2880 }
2881 }
2882
2883 if (!vaddr || !len) {
2884 ath10k_warn(ar, "No allocated memory for IRAM back up");
2885 return -ENOMEM;
2886 }
2887
2888 len = (len < mem_region->len) ? len : mem_region->len;
2889 paddr = mem_region->start;
2890 num_read_itr = len / TGT_IRAM_READ_PER_ITR;
2891 remaining_len = len % TGT_IRAM_READ_PER_ITR;
2892 for (i = 0; i < num_read_itr; i++) {
2893 ret = ath10k_hif_diag_read(ar, paddr, vaddr,
2894 TGT_IRAM_READ_PER_ITR);
2895 if (ret) {
2896 ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
2897 ret);
2898 return ret;
2899 }
2900
2901 paddr += TGT_IRAM_READ_PER_ITR;
2902 vaddr += TGT_IRAM_READ_PER_ITR;
2903 }
2904
2905 if (remaining_len) {
2906 ret = ath10k_hif_diag_read(ar, paddr, vaddr, remaining_len);
2907 if (ret) {
2908 ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
2909 ret);
2910 return ret;
2911 }
2912 }
2913
2914 ath10k_dbg(ar, ATH10K_DBG_BOOT, "target IRAM back up completed\n");
2915
2916 return 0;
2917 }
2918
ath10k_core_start(struct ath10k * ar,enum ath10k_firmware_mode mode,const struct ath10k_fw_components * fw)2919 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2920 const struct ath10k_fw_components *fw)
2921 {
2922 int status;
2923 u32 val;
2924
2925 lockdep_assert_held(&ar->conf_mutex);
2926
2927 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2928
2929 ar->running_fw = fw;
2930
2931 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2932 ar->running_fw->fw_file.fw_features)) {
2933 ath10k_bmi_start(ar);
2934
2935 /* Enable hardware clock to speed up firmware download */
2936 if (ar->hw_params.hw_ops->enable_pll_clk) {
2937 status = ar->hw_params.hw_ops->enable_pll_clk(ar);
2938 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot enable pll ret %d\n",
2939 status);
2940 }
2941
2942 if (ath10k_init_configure_target(ar)) {
2943 status = -EINVAL;
2944 goto err;
2945 }
2946
2947 status = ath10k_download_cal_data(ar);
2948 if (status)
2949 goto err;
2950
2951 /* Some of qca988x solutions are having global reset issue
2952 * during target initialization. Bypassing PLL setting before
2953 * downloading firmware and letting the SoC run on REF_CLK is
2954 * fixing the problem. Corresponding firmware change is also
2955 * needed to set the clock source once the target is
2956 * initialized.
2957 */
2958 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2959 ar->running_fw->fw_file.fw_features)) {
2960 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2961 if (status) {
2962 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2963 status);
2964 goto err;
2965 }
2966 }
2967
2968 status = ath10k_download_fw(ar);
2969 if (status)
2970 goto err;
2971
2972 status = ath10k_init_uart(ar);
2973 if (status)
2974 goto err;
2975
2976 if (ar->hif.bus == ATH10K_BUS_SDIO) {
2977 status = ath10k_init_sdio(ar, mode);
2978 if (status) {
2979 ath10k_err(ar, "failed to init SDIO: %d\n", status);
2980 goto err;
2981 }
2982 }
2983 }
2984
2985 ar->htc.htc_ops.target_send_suspend_complete =
2986 ath10k_send_suspend_complete;
2987
2988 status = ath10k_htc_init(ar);
2989 if (status) {
2990 ath10k_err(ar, "could not init HTC (%d)\n", status);
2991 goto err;
2992 }
2993
2994 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2995 ar->running_fw->fw_file.fw_features)) {
2996 status = ath10k_bmi_done(ar);
2997 if (status)
2998 goto err;
2999 }
3000
3001 status = ath10k_wmi_attach(ar);
3002 if (status) {
3003 ath10k_err(ar, "WMI attach failed: %d\n", status);
3004 goto err;
3005 }
3006
3007 status = ath10k_htt_init(ar);
3008 if (status) {
3009 ath10k_err(ar, "failed to init htt: %d\n", status);
3010 goto err_wmi_detach;
3011 }
3012
3013 status = ath10k_htt_tx_start(&ar->htt);
3014 if (status) {
3015 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
3016 goto err_wmi_detach;
3017 }
3018
3019 /* If firmware indicates Full Rx Reorder support it must be used in a
3020 * slightly different manner. Let HTT code know.
3021 */
3022 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
3023 ar->wmi.svc_map));
3024
3025 status = ath10k_htt_rx_alloc(&ar->htt);
3026 if (status) {
3027 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
3028 goto err_htt_tx_detach;
3029 }
3030
3031 status = ath10k_hif_start(ar);
3032 if (status) {
3033 ath10k_err(ar, "could not start HIF: %d\n", status);
3034 goto err_htt_rx_detach;
3035 }
3036
3037 status = ath10k_htc_wait_target(&ar->htc);
3038 if (status) {
3039 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
3040 goto err_hif_stop;
3041 }
3042
3043 status = ath10k_hif_start_post(ar);
3044 if (status) {
3045 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
3046 goto err_hif_stop;
3047 }
3048
3049 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3050 status = ath10k_htt_connect(&ar->htt);
3051 if (status) {
3052 ath10k_err(ar, "failed to connect htt (%d)\n", status);
3053 goto err_hif_stop;
3054 }
3055 }
3056
3057 status = ath10k_wmi_connect(ar);
3058 if (status) {
3059 ath10k_err(ar, "could not connect wmi: %d\n", status);
3060 goto err_hif_stop;
3061 }
3062
3063 status = ath10k_htc_start(&ar->htc);
3064 if (status) {
3065 ath10k_err(ar, "failed to start htc: %d\n", status);
3066 goto err_hif_stop;
3067 }
3068
3069 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3070 status = ath10k_wmi_wait_for_service_ready(ar);
3071 if (status) {
3072 ath10k_warn(ar, "wmi service ready event not received");
3073 goto err_hif_stop;
3074 }
3075 }
3076
3077 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
3078 ar->hw->wiphy->fw_version);
3079
3080 if (test_bit(ATH10K_FW_FEATURE_IRAM_RECOVERY,
3081 ar->running_fw->fw_file.fw_features)) {
3082 status = ath10k_core_copy_target_iram(ar);
3083 if (status) {
3084 ath10k_warn(ar, "failed to copy target iram contents: %d",
3085 status);
3086 goto err_hif_stop;
3087 }
3088 }
3089
3090 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
3091 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3092 val = 0;
3093 if (ath10k_peer_stats_enabled(ar))
3094 val = WMI_10_4_PEER_STATS;
3095
3096 /* Enable vdev stats by default */
3097 val |= WMI_10_4_VDEV_STATS;
3098
3099 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
3100 val |= WMI_10_4_BSS_CHANNEL_INFO_64;
3101
3102 ath10k_core_fetch_btcoex_dt(ar);
3103
3104 /* 10.4 firmware supports BT-Coex without reloading firmware
3105 * via pdev param. To support Bluetooth coexistence pdev param,
3106 * WMI_COEX_GPIO_SUPPORT of extended resource config should be
3107 * enabled always.
3108 *
3109 * We can still enable BTCOEX if firmware has the support
3110 * even though btceox_support value is
3111 * ATH10K_DT_BTCOEX_NOT_FOUND
3112 */
3113
3114 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
3115 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
3116 ar->running_fw->fw_file.fw_features) &&
3117 ar->coex_support)
3118 val |= WMI_10_4_COEX_GPIO_SUPPORT;
3119
3120 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
3121 ar->wmi.svc_map))
3122 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
3123
3124 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
3125 ar->wmi.svc_map))
3126 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
3127
3128 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
3129 ar->wmi.svc_map))
3130 val |= WMI_10_4_TX_DATA_ACK_RSSI;
3131
3132 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
3133 val |= WMI_10_4_REPORT_AIRTIME;
3134
3135 if (test_bit(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
3136 ar->wmi.svc_map))
3137 val |= WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT;
3138
3139 status = ath10k_mac_ext_resource_config(ar, val);
3140 if (status) {
3141 ath10k_err(ar,
3142 "failed to send ext resource cfg command : %d\n",
3143 status);
3144 goto err_hif_stop;
3145 }
3146 }
3147
3148 status = ath10k_wmi_cmd_init(ar);
3149 if (status) {
3150 ath10k_err(ar, "could not send WMI init command (%d)\n",
3151 status);
3152 goto err_hif_stop;
3153 }
3154
3155 status = ath10k_wmi_wait_for_unified_ready(ar);
3156 if (status) {
3157 ath10k_err(ar, "wmi unified ready event not received\n");
3158 goto err_hif_stop;
3159 }
3160
3161 status = ath10k_core_compat_services(ar);
3162 if (status) {
3163 ath10k_err(ar, "compat services failed: %d\n", status);
3164 goto err_hif_stop;
3165 }
3166
3167 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
3168 if (status && status != -EOPNOTSUPP) {
3169 ath10k_err(ar,
3170 "failed to set base mac address: %d\n", status);
3171 goto err_hif_stop;
3172 }
3173
3174 /* Some firmware revisions do not properly set up hardware rx filter
3175 * registers.
3176 *
3177 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
3178 * is filled with 0s instead of 1s allowing HW to respond with ACKs to
3179 * any frames that matches MAC_PCU_RX_FILTER which is also
3180 * misconfigured to accept anything.
3181 *
3182 * The ADDR1 is programmed using internal firmware structure field and
3183 * can't be (easily/sanely) reached from the driver explicitly. It is
3184 * possible to implicitly make it correct by creating a dummy vdev and
3185 * then deleting it.
3186 */
3187 if (ar->hw_params.hw_filter_reset_required &&
3188 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3189 status = ath10k_core_reset_rx_filter(ar);
3190 if (status) {
3191 ath10k_err(ar,
3192 "failed to reset rx filter: %d\n", status);
3193 goto err_hif_stop;
3194 }
3195 }
3196
3197 status = ath10k_htt_rx_ring_refill(ar);
3198 if (status) {
3199 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
3200 goto err_hif_stop;
3201 }
3202
3203 if (ar->max_num_vdevs >= 64)
3204 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
3205 else
3206 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
3207
3208 INIT_LIST_HEAD(&ar->arvifs);
3209
3210 /* we don't care about HTT in UTF mode */
3211 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3212 status = ath10k_htt_setup(&ar->htt);
3213 if (status) {
3214 ath10k_err(ar, "failed to setup htt: %d\n", status);
3215 goto err_hif_stop;
3216 }
3217 }
3218
3219 status = ath10k_debug_start(ar);
3220 if (status)
3221 goto err_hif_stop;
3222
3223 status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
3224 if (status && status != -EOPNOTSUPP) {
3225 ath10k_warn(ar, "set target log mode failed: %d\n", status);
3226 goto err_hif_stop;
3227 }
3228
3229 return 0;
3230
3231 err_hif_stop:
3232 ath10k_hif_stop(ar);
3233 err_htt_rx_detach:
3234 ath10k_htt_rx_free(&ar->htt);
3235 err_htt_tx_detach:
3236 ath10k_htt_tx_free(&ar->htt);
3237 err_wmi_detach:
3238 ath10k_wmi_detach(ar);
3239 err:
3240 return status;
3241 }
3242 EXPORT_SYMBOL(ath10k_core_start);
3243
ath10k_wait_for_suspend(struct ath10k * ar,u32 suspend_opt)3244 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
3245 {
3246 int ret;
3247 unsigned long time_left;
3248
3249 reinit_completion(&ar->target_suspend);
3250
3251 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
3252 if (ret) {
3253 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
3254 return ret;
3255 }
3256
3257 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
3258
3259 if (!time_left) {
3260 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
3261 return -ETIMEDOUT;
3262 }
3263
3264 return 0;
3265 }
3266
ath10k_core_stop(struct ath10k * ar)3267 void ath10k_core_stop(struct ath10k *ar)
3268 {
3269 lockdep_assert_held(&ar->conf_mutex);
3270 ath10k_debug_stop(ar);
3271
3272 /* try to suspend target */
3273 if (ar->state != ATH10K_STATE_RESTARTING &&
3274 ar->state != ATH10K_STATE_UTF)
3275 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
3276
3277 ath10k_hif_stop(ar);
3278 ath10k_htt_tx_stop(&ar->htt);
3279 ath10k_htt_rx_free(&ar->htt);
3280 ath10k_wmi_detach(ar);
3281
3282 ar->id.bmi_ids_valid = false;
3283 }
3284 EXPORT_SYMBOL(ath10k_core_stop);
3285
3286 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
3287 * order to know what hw capabilities should be advertised to mac80211 it is
3288 * necessary to load the firmware (and tear it down immediately since start
3289 * hook will try to init it again) before registering
3290 */
ath10k_core_probe_fw(struct ath10k * ar)3291 static int ath10k_core_probe_fw(struct ath10k *ar)
3292 {
3293 struct bmi_target_info target_info;
3294 int ret = 0;
3295
3296 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
3297 if (ret) {
3298 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
3299 return ret;
3300 }
3301
3302 switch (ar->hif.bus) {
3303 case ATH10K_BUS_SDIO:
3304 memset(&target_info, 0, sizeof(target_info));
3305 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
3306 if (ret) {
3307 ath10k_err(ar, "could not get target info (%d)\n", ret);
3308 goto err_power_down;
3309 }
3310 ar->target_version = target_info.version;
3311 ar->hw->wiphy->hw_version = target_info.version;
3312 break;
3313 case ATH10K_BUS_PCI:
3314 case ATH10K_BUS_AHB:
3315 case ATH10K_BUS_USB:
3316 memset(&target_info, 0, sizeof(target_info));
3317 ret = ath10k_bmi_get_target_info(ar, &target_info);
3318 if (ret) {
3319 ath10k_err(ar, "could not get target info (%d)\n", ret);
3320 goto err_power_down;
3321 }
3322 ar->target_version = target_info.version;
3323 ar->hw->wiphy->hw_version = target_info.version;
3324 break;
3325 case ATH10K_BUS_SNOC:
3326 memset(&target_info, 0, sizeof(target_info));
3327 ret = ath10k_hif_get_target_info(ar, &target_info);
3328 if (ret) {
3329 ath10k_err(ar, "could not get target info (%d)\n", ret);
3330 goto err_power_down;
3331 }
3332 ar->target_version = target_info.version;
3333 ar->hw->wiphy->hw_version = target_info.version;
3334 break;
3335 default:
3336 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
3337 }
3338
3339 ret = ath10k_init_hw_params(ar);
3340 if (ret) {
3341 ath10k_err(ar, "could not get hw params (%d)\n", ret);
3342 goto err_power_down;
3343 }
3344
3345 ret = ath10k_core_fetch_firmware_files(ar);
3346 if (ret) {
3347 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
3348 goto err_power_down;
3349 }
3350
3351 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
3352 sizeof(ar->normal_mode_fw.fw_file.fw_version));
3353 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
3354 sizeof(ar->hw->wiphy->fw_version));
3355
3356 ath10k_debug_print_hwfw_info(ar);
3357
3358 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3359 ar->normal_mode_fw.fw_file.fw_features)) {
3360 ret = ath10k_core_pre_cal_download(ar);
3361 if (ret) {
3362 /* pre calibration data download is not necessary
3363 * for all the chipsets. Ignore failures and continue.
3364 */
3365 ath10k_dbg(ar, ATH10K_DBG_BOOT,
3366 "could not load pre cal data: %d\n", ret);
3367 }
3368
3369 ret = ath10k_core_get_board_id_from_otp(ar);
3370 if (ret && ret != -EOPNOTSUPP) {
3371 ath10k_err(ar, "failed to get board id from otp: %d\n",
3372 ret);
3373 goto err_free_firmware_files;
3374 }
3375
3376 ret = ath10k_core_check_smbios(ar);
3377 if (ret)
3378 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
3379
3380 ret = ath10k_core_check_dt(ar);
3381 if (ret)
3382 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
3383
3384 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
3385 if (ret) {
3386 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
3387 goto err_free_firmware_files;
3388 }
3389
3390 ath10k_debug_print_board_info(ar);
3391 }
3392
3393 device_get_mac_address(ar->dev, ar->mac_addr);
3394
3395 ret = ath10k_core_init_firmware_features(ar);
3396 if (ret) {
3397 ath10k_err(ar, "fatal problem with firmware features: %d\n",
3398 ret);
3399 goto err_free_firmware_files;
3400 }
3401
3402 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3403 ar->normal_mode_fw.fw_file.fw_features)) {
3404 ret = ath10k_swap_code_seg_init(ar,
3405 &ar->normal_mode_fw.fw_file);
3406 if (ret) {
3407 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
3408 ret);
3409 goto err_free_firmware_files;
3410 }
3411 }
3412
3413 mutex_lock(&ar->conf_mutex);
3414
3415 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
3416 &ar->normal_mode_fw);
3417 if (ret) {
3418 ath10k_err(ar, "could not init core (%d)\n", ret);
3419 goto err_unlock;
3420 }
3421
3422 ath10k_debug_print_boot_info(ar);
3423 ath10k_core_stop(ar);
3424
3425 mutex_unlock(&ar->conf_mutex);
3426
3427 ath10k_hif_power_down(ar);
3428 return 0;
3429
3430 err_unlock:
3431 mutex_unlock(&ar->conf_mutex);
3432
3433 err_free_firmware_files:
3434 ath10k_core_free_firmware_files(ar);
3435
3436 err_power_down:
3437 ath10k_hif_power_down(ar);
3438
3439 return ret;
3440 }
3441
ath10k_core_register_work(struct work_struct * work)3442 static void ath10k_core_register_work(struct work_struct *work)
3443 {
3444 struct ath10k *ar = container_of(work, struct ath10k, register_work);
3445 int status;
3446
3447 /* peer stats are enabled by default */
3448 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3449
3450 status = ath10k_core_probe_fw(ar);
3451 if (status) {
3452 ath10k_err(ar, "could not probe fw (%d)\n", status);
3453 goto err;
3454 }
3455
3456 status = ath10k_mac_register(ar);
3457 if (status) {
3458 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3459 goto err_release_fw;
3460 }
3461
3462 status = ath10k_coredump_register(ar);
3463 if (status) {
3464 ath10k_err(ar, "unable to register coredump\n");
3465 goto err_unregister_mac;
3466 }
3467
3468 status = ath10k_debug_register(ar);
3469 if (status) {
3470 ath10k_err(ar, "unable to initialize debugfs\n");
3471 goto err_unregister_coredump;
3472 }
3473
3474 status = ath10k_spectral_create(ar);
3475 if (status) {
3476 ath10k_err(ar, "failed to initialize spectral\n");
3477 goto err_debug_destroy;
3478 }
3479
3480 status = ath10k_thermal_register(ar);
3481 if (status) {
3482 ath10k_err(ar, "could not register thermal device: %d\n",
3483 status);
3484 goto err_spectral_destroy;
3485 }
3486
3487 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3488 return;
3489
3490 err_spectral_destroy:
3491 ath10k_spectral_destroy(ar);
3492 err_debug_destroy:
3493 ath10k_debug_destroy(ar);
3494 err_unregister_coredump:
3495 ath10k_coredump_unregister(ar);
3496 err_unregister_mac:
3497 ath10k_mac_unregister(ar);
3498 err_release_fw:
3499 ath10k_core_free_firmware_files(ar);
3500 err:
3501 /* TODO: It's probably a good idea to release device from the driver
3502 * but calling device_release_driver() here will cause a deadlock.
3503 */
3504 return;
3505 }
3506
ath10k_core_register(struct ath10k * ar,const struct ath10k_bus_params * bus_params)3507 int ath10k_core_register(struct ath10k *ar,
3508 const struct ath10k_bus_params *bus_params)
3509 {
3510 ar->bus_param = *bus_params;
3511
3512 queue_work(ar->workqueue, &ar->register_work);
3513
3514 return 0;
3515 }
3516 EXPORT_SYMBOL(ath10k_core_register);
3517
ath10k_core_unregister(struct ath10k * ar)3518 void ath10k_core_unregister(struct ath10k *ar)
3519 {
3520 cancel_work_sync(&ar->register_work);
3521
3522 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3523 return;
3524
3525 ath10k_thermal_unregister(ar);
3526 /* Stop spectral before unregistering from mac80211 to remove the
3527 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3528 * would be already be free'd recursively, leading to a double free.
3529 */
3530 ath10k_spectral_destroy(ar);
3531
3532 /* We must unregister from mac80211 before we stop HTC and HIF.
3533 * Otherwise we will fail to submit commands to FW and mac80211 will be
3534 * unhappy about callback failures.
3535 */
3536 ath10k_mac_unregister(ar);
3537
3538 ath10k_testmode_destroy(ar);
3539
3540 ath10k_core_free_firmware_files(ar);
3541 ath10k_core_free_board_files(ar);
3542
3543 ath10k_debug_unregister(ar);
3544 }
3545 EXPORT_SYMBOL(ath10k_core_unregister);
3546
ath10k_core_create(size_t priv_size,struct device * dev,enum ath10k_bus bus,enum ath10k_hw_rev hw_rev,const struct ath10k_hif_ops * hif_ops)3547 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3548 enum ath10k_bus bus,
3549 enum ath10k_hw_rev hw_rev,
3550 const struct ath10k_hif_ops *hif_ops)
3551 {
3552 struct ath10k *ar;
3553 int ret;
3554
3555 ar = ath10k_mac_create(priv_size);
3556 if (!ar)
3557 return NULL;
3558
3559 ar->ath_common.priv = ar;
3560 ar->ath_common.hw = ar->hw;
3561 ar->dev = dev;
3562 ar->hw_rev = hw_rev;
3563 ar->hif.ops = hif_ops;
3564 ar->hif.bus = bus;
3565
3566 switch (hw_rev) {
3567 case ATH10K_HW_QCA988X:
3568 case ATH10K_HW_QCA9887:
3569 ar->regs = &qca988x_regs;
3570 ar->hw_ce_regs = &qcax_ce_regs;
3571 ar->hw_values = &qca988x_values;
3572 break;
3573 case ATH10K_HW_QCA6174:
3574 case ATH10K_HW_QCA9377:
3575 ar->regs = &qca6174_regs;
3576 ar->hw_ce_regs = &qcax_ce_regs;
3577 ar->hw_values = &qca6174_values;
3578 break;
3579 case ATH10K_HW_QCA99X0:
3580 case ATH10K_HW_QCA9984:
3581 ar->regs = &qca99x0_regs;
3582 ar->hw_ce_regs = &qcax_ce_regs;
3583 ar->hw_values = &qca99x0_values;
3584 break;
3585 case ATH10K_HW_QCA9888:
3586 ar->regs = &qca99x0_regs;
3587 ar->hw_ce_regs = &qcax_ce_regs;
3588 ar->hw_values = &qca9888_values;
3589 break;
3590 case ATH10K_HW_QCA4019:
3591 ar->regs = &qca4019_regs;
3592 ar->hw_ce_regs = &qcax_ce_regs;
3593 ar->hw_values = &qca4019_values;
3594 break;
3595 case ATH10K_HW_WCN3990:
3596 ar->regs = &wcn3990_regs;
3597 ar->hw_ce_regs = &wcn3990_ce_regs;
3598 ar->hw_values = &wcn3990_values;
3599 break;
3600 default:
3601 ath10k_err(ar, "unsupported core hardware revision %d\n",
3602 hw_rev);
3603 ret = -ENOTSUPP;
3604 goto err_free_mac;
3605 }
3606
3607 init_completion(&ar->scan.started);
3608 init_completion(&ar->scan.completed);
3609 init_completion(&ar->scan.on_channel);
3610 init_completion(&ar->target_suspend);
3611 init_completion(&ar->driver_recovery);
3612 init_completion(&ar->wow.wakeup_completed);
3613
3614 init_completion(&ar->install_key_done);
3615 init_completion(&ar->vdev_setup_done);
3616 init_completion(&ar->vdev_delete_done);
3617 init_completion(&ar->thermal.wmi_sync);
3618 init_completion(&ar->bss_survey_done);
3619 init_completion(&ar->peer_delete_done);
3620 init_completion(&ar->peer_stats_info_complete);
3621
3622 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3623
3624 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3625 if (!ar->workqueue)
3626 goto err_free_mac;
3627
3628 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3629 if (!ar->workqueue_aux)
3630 goto err_free_wq;
3631
3632 ar->workqueue_tx_complete =
3633 create_singlethread_workqueue("ath10k_tx_complete_wq");
3634 if (!ar->workqueue_tx_complete)
3635 goto err_free_aux_wq;
3636
3637 mutex_init(&ar->conf_mutex);
3638 mutex_init(&ar->dump_mutex);
3639 spin_lock_init(&ar->data_lock);
3640
3641 for (int ac = 0; ac < IEEE80211_NUM_ACS; ac++)
3642 spin_lock_init(&ar->queue_lock[ac]);
3643
3644 INIT_LIST_HEAD(&ar->peers);
3645 init_waitqueue_head(&ar->peer_mapping_wq);
3646 init_waitqueue_head(&ar->htt.empty_tx_wq);
3647 init_waitqueue_head(&ar->wmi.tx_credits_wq);
3648
3649 skb_queue_head_init(&ar->htt.rx_indication_head);
3650
3651 init_completion(&ar->offchan_tx_completed);
3652 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3653 skb_queue_head_init(&ar->offchan_tx_queue);
3654
3655 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3656 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3657
3658 INIT_WORK(&ar->register_work, ath10k_core_register_work);
3659 INIT_WORK(&ar->restart_work, ath10k_core_restart);
3660 INIT_WORK(&ar->set_coverage_class_work,
3661 ath10k_core_set_coverage_class_work);
3662
3663 init_dummy_netdev(&ar->napi_dev);
3664
3665 ret = ath10k_coredump_create(ar);
3666 if (ret)
3667 goto err_free_tx_complete;
3668
3669 ret = ath10k_debug_create(ar);
3670 if (ret)
3671 goto err_free_coredump;
3672
3673 return ar;
3674
3675 err_free_coredump:
3676 ath10k_coredump_destroy(ar);
3677 err_free_tx_complete:
3678 destroy_workqueue(ar->workqueue_tx_complete);
3679 err_free_aux_wq:
3680 destroy_workqueue(ar->workqueue_aux);
3681 err_free_wq:
3682 destroy_workqueue(ar->workqueue);
3683 err_free_mac:
3684 ath10k_mac_destroy(ar);
3685
3686 return NULL;
3687 }
3688 EXPORT_SYMBOL(ath10k_core_create);
3689
ath10k_core_destroy(struct ath10k * ar)3690 void ath10k_core_destroy(struct ath10k *ar)
3691 {
3692 destroy_workqueue(ar->workqueue);
3693
3694 destroy_workqueue(ar->workqueue_aux);
3695
3696 destroy_workqueue(ar->workqueue_tx_complete);
3697
3698 ath10k_debug_destroy(ar);
3699 ath10k_coredump_destroy(ar);
3700 ath10k_htt_tx_destroy(&ar->htt);
3701 ath10k_wmi_free_host_mem(ar);
3702 ath10k_mac_destroy(ar);
3703 }
3704 EXPORT_SYMBOL(ath10k_core_destroy);
3705
3706 MODULE_AUTHOR("Qualcomm Atheros");
3707 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3708 MODULE_LICENSE("Dual BSD/GPL");
3709