1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) ASPEED Technology Inc.
4 *
5 */
6
7 #include <asm/io.h>
8 #include <asm/byteorder.h>
9 #include <common.h>
10 #include <config.h>
11 #include <dm.h>
12 #include <fdtdec.h>
13 #include <reset.h>
14 #include <usbdevice.h>
15
16 #include "ep0.h"
17
18 /* number of endpoints on this UDC */
19 #define UDC_MAX_ENDPOINTS 21
20
21 struct aspeed_udc_priv {
22 u32 udc_base;
23 struct udevice *dev;
24 };
25
26 static struct urb *ep0_urb;
27 static struct usb_device_instance *udc_device;
28
29 static struct aspeed_udc_priv *aspeed_udc;
30
31 /*************************************************************************************/
32 #define AST_VHUB_CTRL 0x00
33 #define AST_VHUB_CONF 0x04
34 #define AST_VHUB_IER 0x08
35 #define AST_VHUB_ISR 0x0C
36 #define AST_VHUB_EP_ACK_IER 0x10
37 #define AST_VHUB_EP_NAK_IER 0x14
38 #define AST_VHUB_EP_ACK_ISR 0x18
39 #define AST_VHUB_EP_NAK_ISR 0x1C
40 #define AST_VHUB_DEV_RESET 0x20
41 #define AST_VHUB_USB_STS 0x24
42 #define AST_VHUB_EP_DATA 0x28
43 #define AST_VHUB_ISO_TX_FAIL 0x2C
44 #define AST_VHUB_EP0_CTRL 0x30
45 #define AST_VHUB_EP0_DATA_BUFF 0x34
46 #define AST_VHUB_EP1_CTRL 0x38
47 #define AST_VHUB_EP1_STS_CHG 0x3C
48
49 #define AST_VHUB_SETUP_DATA0 0x80
50 #define AST_VHUB_SETUP_DATA1 0x84
51
52 /* ************************************************************************************/
53 /* AST_VHUB_CTRL 0x00 */
54 #define ROOT_PHY_CLK_EN BIT(31)
55 #define ROOT_PHY_RESET_DIS BIT(11)
56 #define ROOT_UPSTREAM_EN BIT(0)
57
58 /* AST_VHUB_ISR 0x0C */
59 #define ISR_EP_NAK BIT(17)
60 #define ISR_EP_ACK_STALL BIT(16)
61 #define ISR_DEVICE7 BIT(15)
62 #define ISR_DEVICE6 BIT(14)
63 #define ISR_DEVICE5 BIT(13)
64 #define ISR_DEVICE4 BIT(12)
65 #define ISR_DEVICE3 BIT(11)
66 #define ISR_DEVICE2 BIT(10)
67 #define ISR_DEVICE1 BIT(9)
68 #define ISR_SUSPEND_RESUME BIT(8)
69 #define ISR_BUS_SUSPEND BIT(7)
70 #define ISR_BUS_RESET BIT(6)
71 #define ISR_HUB_EP1_IN_DATA_ACK BIT(5)
72 #define ISR_HUB_EP0_IN_DATA_NAK BIT(4)
73 #define ISR_HUB_EP0_IN_ACK_STALL BIT(3)
74 #define ISR_HUB_EP0_OUT_NAK BIT(2)
75 #define ISR_HUB_EP0_OUT_ACK_STALL BIT(1)
76 #define ISR_HUB_EP0_SETUP BIT(0)
77
78 /* AST_VHUB_USB_STS 0x24 */
79 #define USB_BUS_HIGH_SPEED BIT(27)
80
81 /* AST_VHUB_EP0_CTRL 0x30 */
82 #define EP0_GET_RX_LEN(x) (((x) >> 16) & 0x7f)
83 #define EP0_TX_LEN(x) (((x) & 0x7f) << 8)
84 #define EP0_RX_BUFF_RDY BIT(2)
85 #define EP0_TX_BUFF_RDY BIT(1)
86 #define EP0_STALL BIT(0)
87
88 #define AST_UDC_DEV_CTRL 0x00
89 #define AST_UDC_DEV_ISR 0x04
90 #define AST_UDC_DEV_EP0_CTRL 0x08
91 #define AST_UDC_DEV_EP0_DATA_BUFF 0x0C
92
93 /*************************************************************************************/
94 #define AST_EP_BASE 0x200
95 #define AST_EP_OFFSET 0x10
96 #define AST_EP_CONFIG 0x00
97 #define AST_EP_DMA_CTRL 0x04
98 #define AST_EP_DMA_BUFF 0x08
99 #define AST_EP_DMA_STS 0x0C
100
101 /*************************************************************************************/
102 /* AST_EP_CONFIG 0x00 */
103 #define EP_SET_MAX_PKT(x) (((x) & 0x3ff) << 16)
104 #define EP_SET_EP_STALL BIT(12)
105 #define EP_SET_EP_NUM(x) (((x) & 0xf) << 8)
106 #define EP_TYPE_BULK_IN (0x2 << 4)
107 #define EP_TYPE_BULK_OUT (0x3 << 4)
108 #define EP_TYPE_INT_IN (0x4 << 4)
109 #define EP_TYPE_INT_OUT (0x5 << 4)
110 #define EP_TYPE_ISO_IN (0x6 << 4)
111 #define EP_TYPE_ISO_OUT (0x7 << 4)
112 #define EP_ENABLE BIT(0)
113
114 /* AST_EP_DMA_CTRL 0x04 */
115 #define EP_SINGLE_DESC_MODE BIT(1)
116
117 /* AST_EP_DMA_STS 0x0C */
118 #define AST_EP_TX_DATA_BYTE(x) (((x) & 0x3ff) << 16)
119 #define AST_EP_START_TRANS BIT(0)
120
121 /*-------------------------------------------------------------------------*/
122 #define ast_udc_read(offset) \
123 __raw_readl(aspeed_udc->udc_base + (offset))
124 #define ast_udc_write(val, offset) \
125 __raw_writel((u32)val, aspeed_udc->udc_base + (offset))
126
127 #define ast_ep_read(ep_reg, reg) \
128 __raw_readl((ep_reg) + (reg))
129 #define ast_ep_write(ep_reg, val, reg) \
130 __raw_writel((u32)val, (ep_reg) + (reg))
131 /*-------------------------------------------------------------------------*/
132
is_usbd_high_speed(void)133 int is_usbd_high_speed(void)
134 {
135 if (ast_udc_read(AST_VHUB_USB_STS) & USB_BUS_HIGH_SPEED)
136 return 1;
137
138 return 0;
139 }
140
udc_stall_ep(u32 ep_num)141 static void udc_stall_ep(u32 ep_num)
142 {
143 u32 ep_reg;
144
145 usbdbg("stall ep: %d", ep_num);
146
147 if (ep_num) {
148 ep_reg = aspeed_udc->udc_base + AST_EP_BASE +
149 (AST_EP_OFFSET * (ep_num - 1));
150 ast_ep_write(ep_reg, ast_ep_read(ep_reg, AST_EP_CONFIG) |
151 EP_SET_EP_STALL,
152 AST_EP_CONFIG);
153
154 } else {
155 ast_udc_write(ast_udc_read(AST_VHUB_EP0_CTRL) | EP0_STALL,
156 AST_VHUB_EP0_CTRL);
157 }
158 }
159
udc_endpoint_write(struct usb_endpoint_instance * endpoint)160 int udc_endpoint_write(struct usb_endpoint_instance *endpoint)
161 {
162 struct urb *urb = endpoint->tx_urb;
163 u32 remaining_packet;
164 u32 ep_reg, length;
165 int timeout = 2000; // 2ms
166 int ep_num;
167 u8 *data;
168
169 if (!endpoint) {
170 usberr("Error input: endpoint\n");
171 return -1;
172 }
173
174 ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
175 ep_reg = aspeed_udc->udc_base + AST_EP_BASE + (AST_EP_OFFSET * (ep_num - 1));
176 remaining_packet = urb->actual_length - endpoint->sent;
177
178 if (endpoint->tx_packetSize < remaining_packet)
179 length = endpoint->tx_packetSize;
180 else
181 length = remaining_packet;
182
183 // usbdbg("ep: %d, trans len: %d, ep sent: %d, urb actual len: %d\n",
184 // ep_num, length, endpoint->sent, urb->actual_length);
185
186 data = (u8 *)urb->buffer;
187 data += endpoint->sent;
188
189 // tx trigger
190 ast_ep_write(ep_reg, data, AST_EP_DMA_BUFF);
191 ast_ep_write(ep_reg, AST_EP_TX_DATA_BYTE(length), AST_EP_DMA_STS);
192 ast_ep_write(ep_reg, AST_EP_TX_DATA_BYTE(length) | AST_EP_START_TRANS,
193 AST_EP_DMA_STS);
194
195 endpoint->last = length;
196
197 // wait for tx complete
198 while (ast_ep_read(ep_reg, AST_EP_DMA_STS) & 0x1) {
199 if (timeout-- == 0)
200 return -1;
201
202 udelay(1);
203 }
204
205 return 0;
206 }
207
aspeed_udc_ep_handle(struct usb_endpoint_instance * endpoint)208 static void aspeed_udc_ep_handle(struct usb_endpoint_instance *endpoint)
209 {
210 int ep_isout, ep_num;
211 int nbytes;
212 u32 ep_reg;
213
214 ep_isout = (endpoint->endpoint_address & USB_ENDPOINT_DIR_MASK) ==
215 USB_DIR_OUT;
216 ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
217
218 ep_reg = aspeed_udc->udc_base + AST_EP_BASE + (AST_EP_OFFSET * (ep_num - 1));
219
220 if (ep_isout) {
221 nbytes = (ast_ep_read(ep_reg, AST_EP_DMA_STS) >> 16) & 0x7ff;
222 usbd_rcv_complete(endpoint, nbytes, 0);
223
224 //trigger next
225 ast_ep_write(ep_reg, AST_EP_START_TRANS, AST_EP_DMA_STS);
226
227 } else {
228 usbd_tx_complete(endpoint);
229 }
230 }
231
aspeed_udc_ep0_rx(struct usb_endpoint_instance * endpoint)232 static void aspeed_udc_ep0_rx(struct usb_endpoint_instance *endpoint)
233 {
234 struct urb *urb;
235 u8 *buff;
236
237 if (!endpoint) {
238 usberr("Error input: endpoint\n");
239 return;
240 }
241
242 urb = endpoint->rcv_urb;
243 if (!urb) {
244 usberr("Error: rcv_urb is empty\n");
245 return;
246 }
247
248 buff = urb->buffer;
249 ast_udc_write(buff, AST_VHUB_EP0_DATA_BUFF);
250
251 // trigger rx
252 ast_udc_write(EP0_RX_BUFF_RDY, AST_VHUB_EP0_CTRL);
253 }
254
aspeed_udc_ep0_out(struct usb_endpoint_instance * endpoint)255 static void aspeed_udc_ep0_out(struct usb_endpoint_instance *endpoint)
256 {
257 u16 rx_len = EP0_GET_RX_LEN(ast_udc_read(AST_VHUB_EP0_CTRL));
258
259 /* Check direction */
260 if ((ep0_urb->device_request.bmRequestType & USB_REQ_DIRECTION_MASK) ==
261 USB_REQ_DEVICE2HOST) {
262 if (rx_len != 0)
263 usberr("Unexpected USB REQ direction: D2H\n");
264
265 } else {
266 usbdbg("EP0 OUT packet ACK, sent zero-length packet");
267 ast_udc_write(EP0_TX_BUFF_RDY, AST_VHUB_EP0_CTRL);
268 }
269 }
270
aspeed_udc_ep0_tx(struct usb_endpoint_instance * endpoint)271 static void aspeed_udc_ep0_tx(struct usb_endpoint_instance *endpoint)
272 {
273 struct urb *urb;
274 u32 last;
275
276 if (!endpoint) {
277 usberr("Error input: endpoint\n");
278 return;
279 }
280
281 urb = endpoint->tx_urb;
282 if (!urb) {
283 usberr("Error: tx_urb is empty\n");
284 return;
285 }
286
287 usbdbg("urb->buffer: %p, buffer_length: %d, actual_length: %d, sent:%d",
288 urb->buffer, urb->buffer_length,
289 urb->actual_length, endpoint->sent);
290
291 last = min((int)(urb->actual_length - endpoint->sent),
292 (int)endpoint->tx_packetSize);
293
294 if (last) {
295 u8 *cp = urb->buffer + endpoint->sent;
296
297 usbdbg("send address %x", (u32)cp);
298
299 /*
300 * This ensures that USBD packet fifo is accessed
301 * - through word aligned pointer or
302 * - through non word aligned pointer but only
303 * with a max length to make the next packet
304 * word aligned
305 */
306
307 usbdbg("ep sent: %d, tx_packetSize: %d, last: %d",
308 endpoint->sent, endpoint->tx_packetSize, last);
309
310 ast_udc_write(cp, AST_VHUB_EP0_DATA_BUFF);
311
312 // trigger tx
313 ast_udc_write(EP0_TX_LEN(last), AST_VHUB_EP0_CTRL);
314 ast_udc_write(EP0_TX_LEN(last) | EP0_TX_BUFF_RDY, AST_VHUB_EP0_CTRL);
315 }
316
317 endpoint->last = last;
318 }
319
aspeed_udc_ep0_in(struct usb_endpoint_instance * endpoint)320 void aspeed_udc_ep0_in(struct usb_endpoint_instance *endpoint)
321 {
322 struct usb_device_request *request = &ep0_urb->device_request;
323
324 usbdbg("aspeed_udc_ep0_in");
325
326 /* Check direction */
327 if ((request->bmRequestType & USB_REQ_DIRECTION_MASK) ==
328 USB_REQ_HOST2DEVICE) {
329 /*
330 * This tx interrupt must be for a control write status
331 * stage packet.
332 */
333 usbdbg("ACK on EP0 control write status stage packet");
334 } else {
335 /*
336 * This tx interrupt must be for a control read data
337 * stage packet.
338 */
339 int wLength = le16_to_cpu(request->wLength);
340
341 /*
342 * Update our count of bytes sent so far in this
343 * transfer.
344 */
345 endpoint->sent += endpoint->last;
346
347 /*
348 * We are finished with this transfer if we have sent
349 * all of the bytes in our tx urb (urb->actual_length)
350 * unless we need a zero-length terminating packet. We
351 * need a zero-length terminating packet if we returned
352 * fewer bytes than were requested (wLength) by the host,
353 * and the number of bytes we returned is an exact
354 * multiple of the packet size endpoint->tx_packetSize.
355 */
356 if (endpoint->sent == ep0_urb->actual_length &&
357 (ep0_urb->actual_length == wLength ||
358 endpoint->last != endpoint->tx_packetSize)) {
359 /* Done with control read data stage. */
360 usbdbg("control read data stage complete");
361 //trigger for rx
362 endpoint->rcv_urb = ep0_urb;
363 endpoint->sent = 0;
364 aspeed_udc_ep0_rx(endpoint);
365
366 } else {
367 /*
368 * We still have another packet of data to send
369 * in this control read data stage or else we
370 * need a zero-length terminating packet.
371 */
372 usbdbg("ACK control read data stage packet");
373
374 aspeed_udc_ep0_tx(endpoint);
375 }
376 }
377 }
378
aspeed_udc_setup_handle(struct usb_endpoint_instance * endpoint)379 static void aspeed_udc_setup_handle(struct usb_endpoint_instance *endpoint)
380 {
381 u32 *setup = (u32 *)(aspeed_udc->udc_base + AST_VHUB_SETUP_DATA0);
382 u8 *datap = (u8 *)&ep0_urb->device_request;
383
384 usbdbg("-> Entering device setup");
385
386 /* 8 bytes setup packet */
387 memcpy(datap, setup, sizeof(setup) * 2);
388
389 /* Try to process setup packet */
390 if (ep0_recv_setup(ep0_urb)) {
391 /* Not a setup packet, stall next EP0 transaction */
392 udc_stall_ep(0);
393 usbinfo("Cannot parse setup packet, wait another setup...\n");
394 return;
395 }
396
397 /* Check direction */
398 if ((ep0_urb->device_request.bmRequestType & USB_REQ_DIRECTION_MASK) ==
399 USB_REQ_HOST2DEVICE) {
400 switch (ep0_urb->device_request.bRequest) {
401 case USB_REQ_SET_ADDRESS:
402 usbdbg("set addr: %x", ep0_urb->device_request.wValue);
403 ast_udc_write(ep0_urb->device_request.wValue,
404 AST_VHUB_CONF);
405 ast_udc_write(EP0_TX_BUFF_RDY, AST_VHUB_EP0_CTRL);
406 usbd_device_event_irq(udc_device,
407 DEVICE_ADDRESS_ASSIGNED, 0);
408 break;
409
410 case USB_REQ_SET_CONFIGURATION:
411 usbdbg("set configuration");
412 ast_udc_write(EP0_TX_BUFF_RDY, AST_VHUB_EP0_CTRL);
413 usbd_device_event_irq(udc_device,
414 DEVICE_CONFIGURED, 0);
415 break;
416
417 default:
418 if (ep0_urb->device_request.wLength) {
419 endpoint->rcv_urb = ep0_urb;
420 endpoint->sent = 0;
421 aspeed_udc_ep0_rx(endpoint);
422
423 } else {
424 // send zero-length IN packet
425 ast_udc_write(EP0_TX_BUFF_RDY,
426 AST_VHUB_EP0_CTRL);
427 }
428 break;
429 }
430
431 } else {
432 usbdbg("control read on EP0");
433 /*
434 * The ep0_recv_setup function has already placed our response
435 * packet data in ep0_urb->buffer and the packet length in
436 * ep0_urb->actual_length.
437 */
438 endpoint->tx_urb = ep0_urb;
439 endpoint->sent = 0;
440 aspeed_udc_ep0_tx(endpoint);
441 }
442
443 usbdbg("<- Leaving device setup");
444 }
445
udc_irq(void)446 void udc_irq(void)
447 {
448 u32 isr = ast_udc_read(AST_VHUB_ISR);
449 u32 ep_isr;
450 int i;
451
452 if (!isr)
453 return;
454
455 if (isr & ISR_BUS_RESET) {
456 usbdbg("ISR_BUS_RESET");
457 ast_udc_write(ISR_BUS_RESET, AST_VHUB_ISR);
458 usbd_device_event_irq(udc_device, DEVICE_RESET, 0);
459 }
460
461 if (isr & ISR_BUS_SUSPEND) {
462 usbdbg("ISR_BUS_SUSPEND");
463 ast_udc_write(ISR_BUS_SUSPEND, AST_VHUB_ISR);
464 usbd_device_event_irq(udc_device, DEVICE_BUS_INACTIVE, 0);
465 }
466
467 if (isr & ISR_SUSPEND_RESUME) {
468 usbdbg("ISR_SUSPEND_RESUME");
469 ast_udc_write(ISR_SUSPEND_RESUME, AST_VHUB_ISR);
470 usbd_device_event_irq(udc_device, DEVICE_BUS_ACTIVITY, 0);
471 }
472
473 if (isr & ISR_HUB_EP0_IN_ACK_STALL) {
474 // usbdbg("ISR_HUB_EP0_IN_ACK_STALL");
475 ast_udc_write(ISR_HUB_EP0_IN_ACK_STALL, AST_VHUB_ISR);
476 aspeed_udc_ep0_in(udc_device->bus->endpoint_array);
477 }
478
479 if (isr & ISR_HUB_EP0_OUT_ACK_STALL) {
480 // usbdbg("ISR_HUB_EP0_OUT_ACK_STALL");
481 ast_udc_write(ISR_HUB_EP0_OUT_ACK_STALL, AST_VHUB_ISR);
482 aspeed_udc_ep0_out(udc_device->bus->endpoint_array);
483 }
484
485 if (isr & ISR_HUB_EP0_OUT_NAK) {
486 // usbdbg("ISR_HUB_EP0_OUT_NAK");
487 ast_udc_write(ISR_HUB_EP0_OUT_NAK, AST_VHUB_ISR);
488 }
489
490 if (isr & ISR_HUB_EP0_IN_DATA_NAK) {
491 // usbdbg("ISR_HUB_EP0_IN_DATA_ACK");
492 ast_udc_write(ISR_HUB_EP0_IN_DATA_NAK, AST_VHUB_ISR);
493 }
494
495 if (isr & ISR_HUB_EP0_SETUP) {
496 usbdbg("SETUP");
497 ast_udc_write(ISR_HUB_EP0_SETUP, AST_VHUB_ISR);
498 aspeed_udc_setup_handle(udc_device->bus->endpoint_array);
499 }
500
501 if (isr & ISR_HUB_EP1_IN_DATA_ACK) {
502 // HUB Bitmap control
503 usberr("Error: EP1 IN ACK");
504 ast_udc_write(ISR_HUB_EP1_IN_DATA_ACK, AST_VHUB_ISR);
505 ast_udc_write(0x00, AST_VHUB_EP1_STS_CHG);
506 }
507
508 if (isr & ISR_DEVICE1)
509 usberr("ISR_DEVICE1");
510
511 if (isr & ISR_DEVICE2)
512 usberr("ISR_DEVICE2");
513
514 if (isr & ISR_DEVICE3)
515 usberr("ISR_DEVICE3");
516
517 if (isr & ISR_DEVICE4)
518 usberr("ISR_DEVICE4");
519
520 if (isr & ISR_DEVICE5)
521 usberr("ISR_DEVICE5");
522
523 if (isr & ISR_DEVICE6)
524 usberr("ISR_DEVICE6");
525
526 if (isr & ISR_DEVICE7)
527 usberr("ISR_DEVICE7");
528
529 if (isr & ISR_EP_ACK_STALL) {
530 // usbdbg("ISR_EP_ACK_STALL");
531 ep_isr = ast_udc_read(AST_VHUB_EP_ACK_ISR);
532 for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
533 if (ep_isr & (0x1 << i)) {
534 ast_udc_write(BIT(i), AST_VHUB_EP_ACK_ISR);
535 aspeed_udc_ep_handle(udc_device->bus->endpoint_array + i + 1);
536 }
537 }
538 }
539
540 if (isr & ISR_EP_NAK) {
541 usbdbg("ISR_EP_NAK");
542 ast_udc_write(ISR_EP_NAK, AST_VHUB_ISR);
543 }
544 }
545
546 /*
547 * udc_unset_nak
548 *
549 * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint.
550 * Switch off NAKing on this endpoint to accept more data output from host.
551 */
udc_unset_nak(int ep_num)552 void udc_unset_nak(int ep_num)
553 {
554 /* Do nothing */
555 }
556
557 /*
558 * udc_set_nak
559 *
560 * Allow upper layers to signal lower layers should not accept more RX data
561 */
udc_set_nak(int ep_num)562 void udc_set_nak(int ep_num)
563 {
564 /* Do nothing */
565 }
566
567 /* Associate a physical endpoint with endpoint instance */
udc_setup_ep(struct usb_device_instance * device,unsigned int id,struct usb_endpoint_instance * endpoint)568 void udc_setup_ep(struct usb_device_instance *device, unsigned int id,
569 struct usb_endpoint_instance *endpoint)
570 {
571 int ep_num, ep_addr, ep_isout, ep_type, ep_size;
572 u32 ep_conf;
573 u32 ep_reg;
574
575 usbdbg("setting up endpoint id: %d", id);
576
577 if (!endpoint) {
578 usberr("Error: invalid endpoint");
579 return;
580 }
581
582 ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
583 if (ep_num >= UDC_MAX_ENDPOINTS) {
584 usberr("Error: ep num is out-of-range %d", ep_num);
585 return;
586 }
587
588 if (ep_num == 0) {
589 /* Done for ep0 */
590 return;
591 }
592
593 ep_addr = endpoint->endpoint_address;
594 ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT;
595 ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes;
596 ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize;
597
598 usbdbg("addr %x, num %d, dir %s, type %s, packet size %d",
599 ep_addr, ep_num,
600 ep_isout ? "out" : "in",
601 ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" :
602 ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" :
603 ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???",
604 ep_size);
605
606 /* Configure EP */
607 if (ep_size == 1024)
608 ep_conf = 0;
609 else
610 ep_conf = EP_SET_MAX_PKT(ep_size);
611
612 ep_conf |= EP_SET_EP_NUM(ep_num);
613
614 switch (ep_type) {
615 case USB_ENDPOINT_XFER_ISOC:
616 if (ep_isout)
617 ep_conf |= EP_TYPE_ISO_OUT;
618 else
619 ep_conf |= EP_TYPE_ISO_IN;
620 break;
621 case USB_ENDPOINT_XFER_BULK:
622 if (ep_isout)
623 ep_conf |= EP_TYPE_BULK_OUT;
624 else
625 ep_conf |= EP_TYPE_BULK_IN;
626 break;
627 case USB_ENDPOINT_XFER_INT:
628 if (ep_isout)
629 ep_conf |= EP_TYPE_INT_OUT;
630 else
631 ep_conf |= EP_TYPE_INT_IN;
632 break;
633 }
634
635 ep_reg = aspeed_udc->udc_base + AST_EP_BASE + (AST_EP_OFFSET * (ep_num - 1));
636
637 ast_ep_write(ep_reg, EP_SINGLE_DESC_MODE, AST_EP_DMA_CTRL);
638 ast_ep_write(ep_reg, 0, AST_EP_DMA_STS);
639 ast_ep_write(ep_reg, ep_conf | EP_ENABLE, AST_EP_CONFIG);
640
641 //also setup dma
642 if (ep_isout) {
643 ast_ep_write(ep_reg, endpoint->rcv_urb->buffer, AST_EP_DMA_BUFF);
644 ast_ep_write(ep_reg, AST_EP_START_TRANS, AST_EP_DMA_STS);
645
646 } else {
647 ast_ep_write(ep_reg, endpoint->tx_urb->buffer, AST_EP_DMA_BUFF);
648 }
649 }
650
651 /* Connect the USB device to the bus */
udc_connect(void)652 void udc_connect(void)
653 {
654 usbdbg("UDC connect");
655 ast_udc_write(ast_udc_read(AST_VHUB_CTRL) | ROOT_UPSTREAM_EN,
656 AST_VHUB_CTRL);
657 }
658
659 /* Disconnect the USB device to the bus */
udc_disconnect(void)660 void udc_disconnect(void)
661 {
662 usbdbg("UDC disconnect");
663 ast_udc_write(ast_udc_read(AST_VHUB_CTRL) & ~ROOT_UPSTREAM_EN,
664 AST_VHUB_CTRL);
665 }
666
udc_enable(struct usb_device_instance * device)667 void udc_enable(struct usb_device_instance *device)
668 {
669 usbdbg("enable UDC");
670
671 udc_device = device;
672 if (!ep0_urb)
673 ep0_urb = usbd_alloc_urb(udc_device,
674 udc_device->bus->endpoint_array);
675 else
676 usbinfo("ep0_urb %p already allocated", ep0_urb);
677 }
678
udc_disable(void)679 void udc_disable(void)
680 {
681 usbdbg("disable UDC");
682
683 /* Free ep0 URB */
684 if (ep0_urb) {
685 usbd_dealloc_urb(ep0_urb);
686 ep0_urb = NULL;
687 }
688
689 /* Reset device pointer */
690 udc_device = NULL;
691 }
692
693 /* Allow udc code to do any additional startup */
udc_startup_events(struct usb_device_instance * device)694 void udc_startup_events(struct usb_device_instance *device)
695 {
696 usbdbg("udc_startup_events");
697
698 /* The DEVICE_INIT event puts the USB device in the state STATE_INIT */
699 usbd_device_event_irq(device, DEVICE_INIT, 0);
700
701 /* The DEVICE_CREATE event puts the USB device in the state
702 * STATE_ATTACHED
703 */
704 usbd_device_event_irq(device, DEVICE_CREATE, 0);
705
706 udc_enable(device);
707 }
708
udc_init(void)709 int udc_init(void)
710 {
711 usbdbg("udc_init");
712
713 if (!aspeed_udc) {
714 usberr("Error: udc driver is not init yet");
715 return -1;
716 }
717
718 // Disable PHY reset
719 ast_udc_write(ROOT_PHY_CLK_EN | ROOT_PHY_RESET_DIS, AST_VHUB_CTRL);
720
721 ast_udc_write(0, AST_VHUB_DEV_RESET);
722
723 ast_udc_write(~BIT(18), AST_VHUB_ISR);
724 ast_udc_write(~BIT(18), AST_VHUB_IER);
725
726 ast_udc_write(~BIT(UDC_MAX_ENDPOINTS), AST_VHUB_EP_ACK_ISR);
727 ast_udc_write(~BIT(UDC_MAX_ENDPOINTS), AST_VHUB_EP_ACK_IER);
728
729 ast_udc_write(0, AST_VHUB_EP0_CTRL);
730 ast_udc_write(0, AST_VHUB_EP1_CTRL);
731
732 return 0;
733 }
734
aspeed_udc_probe(struct udevice * dev)735 static int aspeed_udc_probe(struct udevice *dev)
736 {
737 struct reset_ctl udc_reset_ctl;
738 int ret;
739
740 ret = reset_get_by_index(dev, 0, &udc_reset_ctl);
741 if (ret) {
742 printf("%s: Failed to get udc reset signal\n", __func__);
743 return ret;
744 }
745
746 reset_assert(&udc_reset_ctl);
747
748 // Wait 10ms for PLL locking
749 mdelay(10);
750 reset_deassert(&udc_reset_ctl);
751
752 return 0;
753 }
754
aspeed_udc_ofdata_to_platdata(struct udevice * dev)755 static int aspeed_udc_ofdata_to_platdata(struct udevice *dev)
756 {
757 aspeed_udc = dev_get_priv(dev);
758
759 /* Get the controller base address */
760 aspeed_udc->udc_base = (u32)devfdt_get_addr_index(dev, 0);
761
762 return 0;
763 }
764
765 static const struct udevice_id aspeed_udc_ids[] = {
766 { .compatible = "aspeed,ast2600-usb-vhub" },
767 { }
768 };
769
770 U_BOOT_DRIVER(aspeed_udc) = {
771 .name = "aspeed_udc",
772 .id = UCLASS_MISC,
773 .of_match = aspeed_udc_ids,
774 .probe = aspeed_udc_probe,
775 .ofdata_to_platdata = aspeed_udc_ofdata_to_platdata,
776 .priv_auto_alloc_size = sizeof(struct aspeed_udc_priv),
777 };
778