1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2003
4 * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
5 *
6 * (C) Copyright 2002
7 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
8 */
9
10 /*
11 * Altera FPGA support
12 */
13 #include <common.h>
14 #include <errno.h>
15 #include <ACEX1K.h>
16 #include <stratixII.h>
17
18 /* Define FPGA_DEBUG to 1 to get debug printf's */
19 #define FPGA_DEBUG 0
20
21 static const struct altera_fpga {
22 enum altera_family family;
23 const char *name;
24 int (*load)(Altera_desc *, const void *, size_t);
25 int (*dump)(Altera_desc *, const void *, size_t);
26 int (*info)(Altera_desc *);
27 } altera_fpga[] = {
28 #if defined(CONFIG_FPGA_ACEX1K)
29 { Altera_ACEX1K, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
30 { Altera_CYC2, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
31 #elif defined(CONFIG_FPGA_CYCLON2)
32 { Altera_ACEX1K, "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
33 { Altera_CYC2, "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
34 #endif
35 #if defined(CONFIG_FPGA_STRATIX_II)
36 { Altera_StratixII, "StratixII", StratixII_load,
37 StratixII_dump, StratixII_info },
38 #endif
39 #if defined(CONFIG_FPGA_STRATIX_V)
40 { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL },
41 #endif
42 #if defined(CONFIG_FPGA_STRATIX10)
43 { Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL, NULL },
44 #endif
45 #if defined(CONFIG_FPGA_SOCFPGA)
46 { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
47 #endif
48 };
49
altera_validate(Altera_desc * desc,const char * fn)50 static int altera_validate(Altera_desc *desc, const char *fn)
51 {
52 if (!desc) {
53 printf("%s: NULL descriptor!\n", fn);
54 return -EINVAL;
55 }
56
57 if ((desc->family < min_altera_type) ||
58 (desc->family > max_altera_type)) {
59 printf("%s: Invalid family type, %d\n", fn, desc->family);
60 return -EINVAL;
61 }
62
63 if ((desc->iface < min_altera_iface_type) ||
64 (desc->iface > max_altera_iface_type)) {
65 printf("%s: Invalid Interface type, %d\n", fn, desc->iface);
66 return -EINVAL;
67 }
68
69 if (!desc->size) {
70 printf("%s: NULL part size\n", fn);
71 return -EINVAL;
72 }
73
74 return 0;
75 }
76
77 static const struct altera_fpga *
altera_desc_to_fpga(Altera_desc * desc,const char * fn)78 altera_desc_to_fpga(Altera_desc *desc, const char *fn)
79 {
80 int i;
81
82 if (altera_validate(desc, fn)) {
83 printf("%s: Invalid device descriptor\n", fn);
84 return NULL;
85 }
86
87 for (i = 0; i < ARRAY_SIZE(altera_fpga); i++) {
88 if (desc->family == altera_fpga[i].family)
89 break;
90 }
91
92 if (i == ARRAY_SIZE(altera_fpga)) {
93 printf("%s: Unsupported family type, %d\n", fn, desc->family);
94 return NULL;
95 }
96
97 return &altera_fpga[i];
98 }
99
altera_load(Altera_desc * desc,const void * buf,size_t bsize)100 int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
101 {
102 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
103
104 if (!fpga)
105 return FPGA_FAIL;
106
107 debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n",
108 __func__, fpga->name);
109 if (fpga->load)
110 return fpga->load(desc, buf, bsize);
111 return 0;
112 }
113
altera_dump(Altera_desc * desc,const void * buf,size_t bsize)114 int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
115 {
116 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
117
118 if (!fpga)
119 return FPGA_FAIL;
120
121 debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n",
122 __func__, fpga->name);
123 if (fpga->dump)
124 return fpga->dump(desc, buf, bsize);
125 return 0;
126 }
127
altera_info(Altera_desc * desc)128 int altera_info(Altera_desc *desc)
129 {
130 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
131
132 if (!fpga)
133 return FPGA_FAIL;
134
135 printf("Family: \t%s\n", fpga->name);
136
137 printf("Interface type:\t");
138 switch (desc->iface) {
139 case passive_serial:
140 printf("Passive Serial (PS)\n");
141 break;
142 case passive_parallel_synchronous:
143 printf("Passive Parallel Synchronous (PPS)\n");
144 break;
145 case passive_parallel_asynchronous:
146 printf("Passive Parallel Asynchronous (PPA)\n");
147 break;
148 case passive_serial_asynchronous:
149 printf("Passive Serial Asynchronous (PSA)\n");
150 break;
151 case altera_jtag_mode: /* Not used */
152 printf("JTAG Mode\n");
153 break;
154 case fast_passive_parallel:
155 printf("Fast Passive Parallel (FPP)\n");
156 break;
157 case fast_passive_parallel_security:
158 printf("Fast Passive Parallel with Security (FPPS)\n");
159 break;
160 case secure_device_manager_mailbox:
161 puts("Secure Device Manager (SDM) Mailbox\n");
162 break;
163 /* Add new interface types here */
164 default:
165 printf("Unsupported interface type, %d\n", desc->iface);
166 }
167
168 printf("Device Size: \t%zd bytes\n"
169 "Cookie: \t0x%x (%d)\n",
170 desc->size, desc->cookie, desc->cookie);
171
172 if (desc->iface_fns) {
173 printf("Device Function Table @ 0x%p\n", desc->iface_fns);
174 if (fpga->info)
175 fpga->info(desc);
176 } else {
177 printf("No Device Function Table.\n");
178 }
179
180 return FPGA_SUCCESS;
181 }
182