1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright(c) 2022 Intel Corporation */
3 #include "adf_accel_devices.h"
4 #include "adf_cfg.h"
5 #include "adf_cfg_strings.h"
6 #include "adf_gen2_config.h"
7 #include "adf_common_drv.h"
8 #include "qat_crypto.h"
9 #include "qat_compression.h"
10 #include "adf_heartbeat.h"
11 #include "adf_transport_access_macros.h"
12
adf_gen2_crypto_dev_config(struct adf_accel_dev * accel_dev)13 static int adf_gen2_crypto_dev_config(struct adf_accel_dev *accel_dev)
14 {
15 char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
16 int banks = GET_MAX_BANKS(accel_dev);
17 int cpus = num_online_cpus();
18 unsigned long val;
19 int instances;
20 int ret;
21 int i;
22
23 if (adf_hw_dev_has_crypto(accel_dev))
24 instances = min(cpus, banks);
25 else
26 instances = 0;
27
28 for (i = 0; i < instances; i++) {
29 val = i;
30 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_BANK_NUM, i);
31 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
32 key, &val, ADF_DEC);
33 if (ret)
34 goto err;
35
36 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_BANK_NUM, i);
37 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
38 key, &val, ADF_DEC);
39 if (ret)
40 goto err;
41
42 snprintf(key, sizeof(key), ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY,
43 i);
44 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
45 key, &val, ADF_DEC);
46 if (ret)
47 goto err;
48
49 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_SIZE, i);
50 val = 128;
51 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
52 key, &val, ADF_DEC);
53 if (ret)
54 goto err;
55
56 val = 512;
57 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_SIZE, i);
58 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
59 key, &val, ADF_DEC);
60 if (ret)
61 goto err;
62
63 val = 0;
64 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_TX, i);
65 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
66 key, &val, ADF_DEC);
67 if (ret)
68 goto err;
69
70 val = 2;
71 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_TX, i);
72 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
73 key, &val, ADF_DEC);
74 if (ret)
75 goto err;
76
77 val = 8;
78 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_RX, i);
79 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
80 key, &val, ADF_DEC);
81 if (ret)
82 goto err;
83
84 val = 10;
85 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_RX, i);
86 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
87 key, &val, ADF_DEC);
88 if (ret)
89 goto err;
90
91 val = ADF_COALESCING_DEF_TIME;
92 snprintf(key, sizeof(key), ADF_ETRMGR_COALESCE_TIMER_FORMAT, i);
93 ret = adf_cfg_add_key_value_param(accel_dev, "Accelerator0",
94 key, &val, ADF_DEC);
95 if (ret)
96 goto err;
97 }
98
99 val = i;
100 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
101 &val, ADF_DEC);
102 if (ret)
103 goto err;
104
105 return ret;
106
107 err:
108 dev_err(&GET_DEV(accel_dev), "Failed to add configuration for crypto\n");
109 return ret;
110 }
111
adf_gen2_comp_dev_config(struct adf_accel_dev * accel_dev)112 static int adf_gen2_comp_dev_config(struct adf_accel_dev *accel_dev)
113 {
114 char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
115 int banks = GET_MAX_BANKS(accel_dev);
116 int cpus = num_online_cpus();
117 unsigned long val;
118 int instances;
119 int ret;
120 int i;
121
122 if (adf_hw_dev_has_compression(accel_dev))
123 instances = min(cpus, banks);
124 else
125 instances = 0;
126
127 for (i = 0; i < instances; i++) {
128 val = i;
129 snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_BANK_NUM, i);
130 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
131 key, &val, ADF_DEC);
132 if (ret)
133 goto err;
134
135 val = 512;
136 snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_SIZE, i);
137 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
138 key, &val, ADF_DEC);
139 if (ret)
140 goto err;
141
142 val = 6;
143 snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_TX, i);
144 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
145 key, &val, ADF_DEC);
146 if (ret)
147 goto err;
148
149 val = 14;
150 snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_RX, i);
151 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
152 key, &val, ADF_DEC);
153 if (ret)
154 goto err;
155 }
156
157 val = i;
158 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_DC,
159 &val, ADF_DEC);
160 if (ret)
161 return ret;
162
163 return ret;
164
165 err:
166 dev_err(&GET_DEV(accel_dev), "Failed to add configuration for compression\n");
167 return ret;
168 }
169
170 /**
171 * adf_gen2_dev_config() - create dev config required to create instances
172 *
173 * @accel_dev: Pointer to acceleration device.
174 *
175 * Function creates device configuration required to create instances
176 *
177 * Return: 0 on success, error code otherwise.
178 */
adf_gen2_dev_config(struct adf_accel_dev * accel_dev)179 int adf_gen2_dev_config(struct adf_accel_dev *accel_dev)
180 {
181 int ret;
182
183 ret = adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC);
184 if (ret)
185 goto err;
186
187 ret = adf_cfg_section_add(accel_dev, "Accelerator0");
188 if (ret)
189 goto err;
190
191 ret = adf_gen2_crypto_dev_config(accel_dev);
192 if (ret)
193 goto err;
194
195 ret = adf_gen2_comp_dev_config(accel_dev);
196 if (ret)
197 goto err;
198
199 ret = adf_cfg_section_add(accel_dev, ADF_GENERAL_SEC);
200 if (ret)
201 goto err;
202
203 adf_heartbeat_save_cfg_param(accel_dev, ADF_CFG_HB_TIMER_DEFAULT_MS);
204
205 set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status);
206
207 return ret;
208
209 err:
210 dev_err(&GET_DEV(accel_dev), "Failed to configure QAT driver\n");
211 return ret;
212 }
213 EXPORT_SYMBOL_GPL(adf_gen2_dev_config);
214