1 /*
2 * RAM allocation and memory access
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "exec/page-vary.h"
22 #include "qapi/error.h"
23
24 #include "qemu/cutils.h"
25 #include "qemu/cacheflush.h"
26 #include "qemu/hbitmap.h"
27 #include "qemu/madvise.h"
28 #include "qemu/lockable.h"
29
30 #ifdef CONFIG_TCG
31 #include "hw/core/tcg-cpu-ops.h"
32 #endif /* CONFIG_TCG */
33
34 #include "exec/exec-all.h"
35 #include "exec/page-protection.h"
36 #include "exec/target_page.h"
37 #include "hw/qdev-core.h"
38 #include "hw/qdev-properties.h"
39 #include "hw/boards.h"
40 #include "sysemu/xen.h"
41 #include "sysemu/kvm.h"
42 #include "sysemu/tcg.h"
43 #include "sysemu/qtest.h"
44 #include "qemu/timer.h"
45 #include "qemu/config-file.h"
46 #include "qemu/error-report.h"
47 #include "qemu/qemu-print.h"
48 #include "qemu/log.h"
49 #include "qemu/memalign.h"
50 #include "exec/memory.h"
51 #include "exec/ioport.h"
52 #include "sysemu/dma.h"
53 #include "sysemu/hostmem.h"
54 #include "sysemu/hw_accel.h"
55 #include "sysemu/xen-mapcache.h"
56 #include "trace.h"
57
58 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
59 #include <linux/falloc.h>
60 #endif
61
62 #include "qemu/rcu_queue.h"
63 #include "qemu/main-loop.h"
64 #include "exec/translate-all.h"
65 #include "sysemu/replay.h"
66
67 #include "exec/memory-internal.h"
68 #include "exec/ram_addr.h"
69
70 #include "qemu/pmem.h"
71
72 #include "migration/vmstate.h"
73
74 #include "qemu/range.h"
75 #ifndef _WIN32
76 #include "qemu/mmap-alloc.h"
77 #endif
78
79 #include "monitor/monitor.h"
80
81 #ifdef CONFIG_LIBDAXCTL
82 #include <daxctl/libdaxctl.h>
83 #endif
84
85 //#define DEBUG_SUBPAGE
86
87 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
88 * are protected by the ramlist lock.
89 */
90 RAMList ram_list = { .blocks = QLIST_HEAD_INITIALIZER(ram_list.blocks) };
91
92 static MemoryRegion *system_memory;
93 static MemoryRegion *system_io;
94
95 AddressSpace address_space_io;
96 AddressSpace address_space_memory;
97
98 static MemoryRegion io_mem_unassigned;
99
100 typedef struct PhysPageEntry PhysPageEntry;
101
102 struct PhysPageEntry {
103 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
104 uint32_t skip : 6;
105 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
106 uint32_t ptr : 26;
107 };
108
109 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
110
111 /* Size of the L2 (and L3, etc) page tables. */
112 #define ADDR_SPACE_BITS 64
113
114 #define P_L2_BITS 9
115 #define P_L2_SIZE (1 << P_L2_BITS)
116
117 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
118
119 typedef PhysPageEntry Node[P_L2_SIZE];
120
121 typedef struct PhysPageMap {
122 struct rcu_head rcu;
123
124 unsigned sections_nb;
125 unsigned sections_nb_alloc;
126 unsigned nodes_nb;
127 unsigned nodes_nb_alloc;
128 Node *nodes;
129 MemoryRegionSection *sections;
130 } PhysPageMap;
131
132 struct AddressSpaceDispatch {
133 MemoryRegionSection *mru_section;
134 /* This is a multi-level map on the physical address space.
135 * The bottom level has pointers to MemoryRegionSections.
136 */
137 PhysPageEntry phys_map;
138 PhysPageMap map;
139 };
140
141 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
142 typedef struct subpage_t {
143 MemoryRegion iomem;
144 FlatView *fv;
145 hwaddr base;
146 uint16_t sub_section[];
147 } subpage_t;
148
149 #define PHYS_SECTION_UNASSIGNED 0
150
151 static void io_mem_init(void);
152 static void memory_map_init(void);
153 static void tcg_log_global_after_sync(MemoryListener *listener);
154 static void tcg_commit(MemoryListener *listener);
155
156 /**
157 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
158 * @cpu: the CPU whose AddressSpace this is
159 * @as: the AddressSpace itself
160 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
161 * @tcg_as_listener: listener for tracking changes to the AddressSpace
162 */
163 typedef struct CPUAddressSpace {
164 CPUState *cpu;
165 AddressSpace *as;
166 struct AddressSpaceDispatch *memory_dispatch;
167 MemoryListener tcg_as_listener;
168 } CPUAddressSpace;
169
170 struct DirtyBitmapSnapshot {
171 ram_addr_t start;
172 ram_addr_t end;
173 unsigned long dirty[];
174 };
175
phys_map_node_reserve(PhysPageMap * map,unsigned nodes)176 static void phys_map_node_reserve(PhysPageMap *map, unsigned nodes)
177 {
178 static unsigned alloc_hint = 16;
179 if (map->nodes_nb + nodes > map->nodes_nb_alloc) {
180 map->nodes_nb_alloc = MAX(alloc_hint, map->nodes_nb + nodes);
181 map->nodes = g_renew(Node, map->nodes, map->nodes_nb_alloc);
182 alloc_hint = map->nodes_nb_alloc;
183 }
184 }
185
phys_map_node_alloc(PhysPageMap * map,bool leaf)186 static uint32_t phys_map_node_alloc(PhysPageMap *map, bool leaf)
187 {
188 unsigned i;
189 uint32_t ret;
190 PhysPageEntry e;
191 PhysPageEntry *p;
192
193 ret = map->nodes_nb++;
194 p = map->nodes[ret];
195 assert(ret != PHYS_MAP_NODE_NIL);
196 assert(ret != map->nodes_nb_alloc);
197
198 e.skip = leaf ? 0 : 1;
199 e.ptr = leaf ? PHYS_SECTION_UNASSIGNED : PHYS_MAP_NODE_NIL;
200 for (i = 0; i < P_L2_SIZE; ++i) {
201 memcpy(&p[i], &e, sizeof(e));
202 }
203 return ret;
204 }
205
phys_page_set_level(PhysPageMap * map,PhysPageEntry * lp,hwaddr * index,uint64_t * nb,uint16_t leaf,int level)206 static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp,
207 hwaddr *index, uint64_t *nb, uint16_t leaf,
208 int level)
209 {
210 PhysPageEntry *p;
211 hwaddr step = (hwaddr)1 << (level * P_L2_BITS);
212
213 if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) {
214 lp->ptr = phys_map_node_alloc(map, level == 0);
215 }
216 p = map->nodes[lp->ptr];
217 lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)];
218
219 while (*nb && lp < &p[P_L2_SIZE]) {
220 if ((*index & (step - 1)) == 0 && *nb >= step) {
221 lp->skip = 0;
222 lp->ptr = leaf;
223 *index += step;
224 *nb -= step;
225 } else {
226 phys_page_set_level(map, lp, index, nb, leaf, level - 1);
227 }
228 ++lp;
229 }
230 }
231
phys_page_set(AddressSpaceDispatch * d,hwaddr index,uint64_t nb,uint16_t leaf)232 static void phys_page_set(AddressSpaceDispatch *d,
233 hwaddr index, uint64_t nb,
234 uint16_t leaf)
235 {
236 /* Wildly overreserve - it doesn't matter much. */
237 phys_map_node_reserve(&d->map, 3 * P_L2_LEVELS);
238
239 phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
240 }
241
242 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
243 * and update our entry so we can skip it and go directly to the destination.
244 */
phys_page_compact(PhysPageEntry * lp,Node * nodes)245 static void phys_page_compact(PhysPageEntry *lp, Node *nodes)
246 {
247 unsigned valid_ptr = P_L2_SIZE;
248 int valid = 0;
249 PhysPageEntry *p;
250 int i;
251
252 if (lp->ptr == PHYS_MAP_NODE_NIL) {
253 return;
254 }
255
256 p = nodes[lp->ptr];
257 for (i = 0; i < P_L2_SIZE; i++) {
258 if (p[i].ptr == PHYS_MAP_NODE_NIL) {
259 continue;
260 }
261
262 valid_ptr = i;
263 valid++;
264 if (p[i].skip) {
265 phys_page_compact(&p[i], nodes);
266 }
267 }
268
269 /* We can only compress if there's only one child. */
270 if (valid != 1) {
271 return;
272 }
273
274 assert(valid_ptr < P_L2_SIZE);
275
276 /* Don't compress if it won't fit in the # of bits we have. */
277 if (P_L2_LEVELS >= (1 << 6) &&
278 lp->skip + p[valid_ptr].skip >= (1 << 6)) {
279 return;
280 }
281
282 lp->ptr = p[valid_ptr].ptr;
283 if (!p[valid_ptr].skip) {
284 /* If our only child is a leaf, make this a leaf. */
285 /* By design, we should have made this node a leaf to begin with so we
286 * should never reach here.
287 * But since it's so simple to handle this, let's do it just in case we
288 * change this rule.
289 */
290 lp->skip = 0;
291 } else {
292 lp->skip += p[valid_ptr].skip;
293 }
294 }
295
address_space_dispatch_compact(AddressSpaceDispatch * d)296 void address_space_dispatch_compact(AddressSpaceDispatch *d)
297 {
298 if (d->phys_map.skip) {
299 phys_page_compact(&d->phys_map, d->map.nodes);
300 }
301 }
302
section_covers_addr(const MemoryRegionSection * section,hwaddr addr)303 static inline bool section_covers_addr(const MemoryRegionSection *section,
304 hwaddr addr)
305 {
306 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
307 * the section must cover the entire address space.
308 */
309 return int128_gethi(section->size) ||
310 range_covers_byte(section->offset_within_address_space,
311 int128_getlo(section->size), addr);
312 }
313
phys_page_find(AddressSpaceDispatch * d,hwaddr addr)314 static MemoryRegionSection *phys_page_find(AddressSpaceDispatch *d, hwaddr addr)
315 {
316 PhysPageEntry lp = d->phys_map, *p;
317 Node *nodes = d->map.nodes;
318 MemoryRegionSection *sections = d->map.sections;
319 hwaddr index = addr >> TARGET_PAGE_BITS;
320 int i;
321
322 for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) {
323 if (lp.ptr == PHYS_MAP_NODE_NIL) {
324 return §ions[PHYS_SECTION_UNASSIGNED];
325 }
326 p = nodes[lp.ptr];
327 lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)];
328 }
329
330 if (section_covers_addr(§ions[lp.ptr], addr)) {
331 return §ions[lp.ptr];
332 } else {
333 return §ions[PHYS_SECTION_UNASSIGNED];
334 }
335 }
336
337 /* Called from RCU critical section */
address_space_lookup_region(AddressSpaceDispatch * d,hwaddr addr,bool resolve_subpage)338 static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
339 hwaddr addr,
340 bool resolve_subpage)
341 {
342 MemoryRegionSection *section = qatomic_read(&d->mru_section);
343 subpage_t *subpage;
344
345 if (!section || section == &d->map.sections[PHYS_SECTION_UNASSIGNED] ||
346 !section_covers_addr(section, addr)) {
347 section = phys_page_find(d, addr);
348 qatomic_set(&d->mru_section, section);
349 }
350 if (resolve_subpage && section->mr->subpage) {
351 subpage = container_of(section->mr, subpage_t, iomem);
352 section = &d->map.sections[subpage->sub_section[SUBPAGE_IDX(addr)]];
353 }
354 return section;
355 }
356
357 /* Called from RCU critical section */
358 static MemoryRegionSection *
address_space_translate_internal(AddressSpaceDispatch * d,hwaddr addr,hwaddr * xlat,hwaddr * plen,bool resolve_subpage)359 address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat,
360 hwaddr *plen, bool resolve_subpage)
361 {
362 MemoryRegionSection *section;
363 MemoryRegion *mr;
364 Int128 diff;
365
366 section = address_space_lookup_region(d, addr, resolve_subpage);
367 /* Compute offset within MemoryRegionSection */
368 addr -= section->offset_within_address_space;
369
370 /* Compute offset within MemoryRegion */
371 *xlat = addr + section->offset_within_region;
372
373 mr = section->mr;
374
375 /* MMIO registers can be expected to perform full-width accesses based only
376 * on their address, without considering adjacent registers that could
377 * decode to completely different MemoryRegions. When such registers
378 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
379 * regions overlap wildly. For this reason we cannot clamp the accesses
380 * here.
381 *
382 * If the length is small (as is the case for address_space_ldl/stl),
383 * everything works fine. If the incoming length is large, however,
384 * the caller really has to do the clamping through memory_access_size.
385 */
386 if (memory_region_is_ram(mr)) {
387 diff = int128_sub(section->size, int128_make64(addr));
388 *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
389 }
390 return section;
391 }
392
393 /**
394 * address_space_translate_iommu - translate an address through an IOMMU
395 * memory region and then through the target address space.
396 *
397 * @iommu_mr: the IOMMU memory region that we start the translation from
398 * @addr: the address to be translated through the MMU
399 * @xlat: the translated address offset within the destination memory region.
400 * It cannot be %NULL.
401 * @plen_out: valid read/write length of the translated address. It
402 * cannot be %NULL.
403 * @page_mask_out: page mask for the translated address. This
404 * should only be meaningful for IOMMU translated
405 * addresses, since there may be huge pages that this bit
406 * would tell. It can be %NULL if we don't care about it.
407 * @is_write: whether the translation operation is for write
408 * @is_mmio: whether this can be MMIO, set true if it can
409 * @target_as: the address space targeted by the IOMMU
410 * @attrs: transaction attributes
411 *
412 * This function is called from RCU critical section. It is the common
413 * part of flatview_do_translate and address_space_translate_cached.
414 */
address_space_translate_iommu(IOMMUMemoryRegion * iommu_mr,hwaddr * xlat,hwaddr * plen_out,hwaddr * page_mask_out,bool is_write,bool is_mmio,AddressSpace ** target_as,MemTxAttrs attrs)415 static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion *iommu_mr,
416 hwaddr *xlat,
417 hwaddr *plen_out,
418 hwaddr *page_mask_out,
419 bool is_write,
420 bool is_mmio,
421 AddressSpace **target_as,
422 MemTxAttrs attrs)
423 {
424 MemoryRegionSection *section;
425 hwaddr page_mask = (hwaddr)-1;
426
427 do {
428 hwaddr addr = *xlat;
429 IOMMUMemoryRegionClass *imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
430 int iommu_idx = 0;
431 IOMMUTLBEntry iotlb;
432
433 if (imrc->attrs_to_index) {
434 iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
435 }
436
437 iotlb = imrc->translate(iommu_mr, addr, is_write ?
438 IOMMU_WO : IOMMU_RO, iommu_idx);
439
440 if (!(iotlb.perm & (1 << is_write))) {
441 goto unassigned;
442 }
443
444 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
445 | (addr & iotlb.addr_mask));
446 page_mask &= iotlb.addr_mask;
447 *plen_out = MIN(*plen_out, (addr | iotlb.addr_mask) - addr + 1);
448 *target_as = iotlb.target_as;
449
450 section = address_space_translate_internal(
451 address_space_to_dispatch(iotlb.target_as), addr, xlat,
452 plen_out, is_mmio);
453
454 iommu_mr = memory_region_get_iommu(section->mr);
455 } while (unlikely(iommu_mr));
456
457 if (page_mask_out) {
458 *page_mask_out = page_mask;
459 }
460 return *section;
461
462 unassigned:
463 return (MemoryRegionSection) { .mr = &io_mem_unassigned };
464 }
465
466 /**
467 * flatview_do_translate - translate an address in FlatView
468 *
469 * @fv: the flat view that we want to translate on
470 * @addr: the address to be translated in above address space
471 * @xlat: the translated address offset within memory region. It
472 * cannot be @NULL.
473 * @plen_out: valid read/write length of the translated address. It
474 * can be @NULL when we don't care about it.
475 * @page_mask_out: page mask for the translated address. This
476 * should only be meaningful for IOMMU translated
477 * addresses, since there may be huge pages that this bit
478 * would tell. It can be @NULL if we don't care about it.
479 * @is_write: whether the translation operation is for write
480 * @is_mmio: whether this can be MMIO, set true if it can
481 * @target_as: the address space targeted by the IOMMU
482 * @attrs: memory transaction attributes
483 *
484 * This function is called from RCU critical section
485 */
flatview_do_translate(FlatView * fv,hwaddr addr,hwaddr * xlat,hwaddr * plen_out,hwaddr * page_mask_out,bool is_write,bool is_mmio,AddressSpace ** target_as,MemTxAttrs attrs)486 static MemoryRegionSection flatview_do_translate(FlatView *fv,
487 hwaddr addr,
488 hwaddr *xlat,
489 hwaddr *plen_out,
490 hwaddr *page_mask_out,
491 bool is_write,
492 bool is_mmio,
493 AddressSpace **target_as,
494 MemTxAttrs attrs)
495 {
496 MemoryRegionSection *section;
497 IOMMUMemoryRegion *iommu_mr;
498 hwaddr plen = (hwaddr)(-1);
499
500 if (!plen_out) {
501 plen_out = &plen;
502 }
503
504 section = address_space_translate_internal(
505 flatview_to_dispatch(fv), addr, xlat,
506 plen_out, is_mmio);
507
508 iommu_mr = memory_region_get_iommu(section->mr);
509 if (unlikely(iommu_mr)) {
510 return address_space_translate_iommu(iommu_mr, xlat,
511 plen_out, page_mask_out,
512 is_write, is_mmio,
513 target_as, attrs);
514 }
515 if (page_mask_out) {
516 /* Not behind an IOMMU, use default page size. */
517 *page_mask_out = ~TARGET_PAGE_MASK;
518 }
519
520 return *section;
521 }
522
523 /* Called from RCU critical section */
address_space_get_iotlb_entry(AddressSpace * as,hwaddr addr,bool is_write,MemTxAttrs attrs)524 IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,
525 bool is_write, MemTxAttrs attrs)
526 {
527 MemoryRegionSection section;
528 hwaddr xlat, page_mask;
529
530 /*
531 * This can never be MMIO, and we don't really care about plen,
532 * but page mask.
533 */
534 section = flatview_do_translate(address_space_to_flatview(as), addr, &xlat,
535 NULL, &page_mask, is_write, false, &as,
536 attrs);
537
538 /* Illegal translation */
539 if (section.mr == &io_mem_unassigned) {
540 goto iotlb_fail;
541 }
542
543 /* Convert memory region offset into address space offset */
544 xlat += section.offset_within_address_space -
545 section.offset_within_region;
546
547 return (IOMMUTLBEntry) {
548 .target_as = as,
549 .iova = addr & ~page_mask,
550 .translated_addr = xlat & ~page_mask,
551 .addr_mask = page_mask,
552 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
553 .perm = IOMMU_RW,
554 };
555
556 iotlb_fail:
557 return (IOMMUTLBEntry) {0};
558 }
559
560 /* Called from RCU critical section */
flatview_translate(FlatView * fv,hwaddr addr,hwaddr * xlat,hwaddr * plen,bool is_write,MemTxAttrs attrs)561 MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat,
562 hwaddr *plen, bool is_write,
563 MemTxAttrs attrs)
564 {
565 MemoryRegion *mr;
566 MemoryRegionSection section;
567 AddressSpace *as = NULL;
568
569 /* This can be MMIO, so setup MMIO bit. */
570 section = flatview_do_translate(fv, addr, xlat, plen, NULL,
571 is_write, true, &as, attrs);
572 mr = section.mr;
573
574 if (xen_enabled() && memory_access_is_direct(mr, is_write)) {
575 hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr;
576 *plen = MIN(page, *plen);
577 }
578
579 return mr;
580 }
581
582 typedef struct TCGIOMMUNotifier {
583 IOMMUNotifier n;
584 MemoryRegion *mr;
585 CPUState *cpu;
586 int iommu_idx;
587 bool active;
588 } TCGIOMMUNotifier;
589
tcg_iommu_unmap_notify(IOMMUNotifier * n,IOMMUTLBEntry * iotlb)590 static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb)
591 {
592 TCGIOMMUNotifier *notifier = container_of(n, TCGIOMMUNotifier, n);
593
594 if (!notifier->active) {
595 return;
596 }
597 tlb_flush(notifier->cpu);
598 notifier->active = false;
599 /* We leave the notifier struct on the list to avoid reallocating it later.
600 * Generally the number of IOMMUs a CPU deals with will be small.
601 * In any case we can't unregister the iommu notifier from a notify
602 * callback.
603 */
604 }
605
tcg_register_iommu_notifier(CPUState * cpu,IOMMUMemoryRegion * iommu_mr,int iommu_idx)606 static void tcg_register_iommu_notifier(CPUState *cpu,
607 IOMMUMemoryRegion *iommu_mr,
608 int iommu_idx)
609 {
610 /* Make sure this CPU has an IOMMU notifier registered for this
611 * IOMMU/IOMMU index combination, so that we can flush its TLB
612 * when the IOMMU tells us the mappings we've cached have changed.
613 */
614 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
615 TCGIOMMUNotifier *notifier = NULL;
616 int i;
617
618 for (i = 0; i < cpu->iommu_notifiers->len; i++) {
619 notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i);
620 if (notifier->mr == mr && notifier->iommu_idx == iommu_idx) {
621 break;
622 }
623 }
624 if (i == cpu->iommu_notifiers->len) {
625 /* Not found, add a new entry at the end of the array */
626 cpu->iommu_notifiers = g_array_set_size(cpu->iommu_notifiers, i + 1);
627 notifier = g_new0(TCGIOMMUNotifier, 1);
628 g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i) = notifier;
629
630 notifier->mr = mr;
631 notifier->iommu_idx = iommu_idx;
632 notifier->cpu = cpu;
633 /* Rather than trying to register interest in the specific part
634 * of the iommu's address space that we've accessed and then
635 * expand it later as subsequent accesses touch more of it, we
636 * just register interest in the whole thing, on the assumption
637 * that iommu reconfiguration will be rare.
638 */
639 iommu_notifier_init(¬ifier->n,
640 tcg_iommu_unmap_notify,
641 IOMMU_NOTIFIER_UNMAP,
642 0,
643 HWADDR_MAX,
644 iommu_idx);
645 memory_region_register_iommu_notifier(notifier->mr, ¬ifier->n,
646 &error_fatal);
647 }
648
649 if (!notifier->active) {
650 notifier->active = true;
651 }
652 }
653
tcg_iommu_free_notifier_list(CPUState * cpu)654 void tcg_iommu_free_notifier_list(CPUState *cpu)
655 {
656 /* Destroy the CPU's notifier list */
657 int i;
658 TCGIOMMUNotifier *notifier;
659
660 for (i = 0; i < cpu->iommu_notifiers->len; i++) {
661 notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i);
662 memory_region_unregister_iommu_notifier(notifier->mr, ¬ifier->n);
663 g_free(notifier);
664 }
665 g_array_free(cpu->iommu_notifiers, true);
666 }
667
tcg_iommu_init_notifier_list(CPUState * cpu)668 void tcg_iommu_init_notifier_list(CPUState *cpu)
669 {
670 cpu->iommu_notifiers = g_array_new(false, true, sizeof(TCGIOMMUNotifier *));
671 }
672
673 /* Called from RCU critical section */
674 MemoryRegionSection *
address_space_translate_for_iotlb(CPUState * cpu,int asidx,hwaddr orig_addr,hwaddr * xlat,hwaddr * plen,MemTxAttrs attrs,int * prot)675 address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr orig_addr,
676 hwaddr *xlat, hwaddr *plen,
677 MemTxAttrs attrs, int *prot)
678 {
679 MemoryRegionSection *section;
680 IOMMUMemoryRegion *iommu_mr;
681 IOMMUMemoryRegionClass *imrc;
682 IOMMUTLBEntry iotlb;
683 int iommu_idx;
684 hwaddr addr = orig_addr;
685 AddressSpaceDispatch *d = cpu->cpu_ases[asidx].memory_dispatch;
686
687 for (;;) {
688 section = address_space_translate_internal(d, addr, &addr, plen, false);
689
690 iommu_mr = memory_region_get_iommu(section->mr);
691 if (!iommu_mr) {
692 break;
693 }
694
695 imrc = memory_region_get_iommu_class_nocheck(iommu_mr);
696
697 iommu_idx = imrc->attrs_to_index(iommu_mr, attrs);
698 tcg_register_iommu_notifier(cpu, iommu_mr, iommu_idx);
699 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
700 * doesn't short-cut its translation table walk.
701 */
702 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, iommu_idx);
703 addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
704 | (addr & iotlb.addr_mask));
705 /* Update the caller's prot bits to remove permissions the IOMMU
706 * is giving us a failure response for. If we get down to no
707 * permissions left at all we can give up now.
708 */
709 if (!(iotlb.perm & IOMMU_RO)) {
710 *prot &= ~(PAGE_READ | PAGE_EXEC);
711 }
712 if (!(iotlb.perm & IOMMU_WO)) {
713 *prot &= ~PAGE_WRITE;
714 }
715
716 if (!*prot) {
717 goto translate_fail;
718 }
719
720 d = flatview_to_dispatch(address_space_to_flatview(iotlb.target_as));
721 }
722
723 assert(!memory_region_is_iommu(section->mr));
724 *xlat = addr;
725 return section;
726
727 translate_fail:
728 /*
729 * We should be given a page-aligned address -- certainly
730 * tlb_set_page_with_attrs() does so. The page offset of xlat
731 * is used to index sections[], and PHYS_SECTION_UNASSIGNED = 0.
732 * The page portion of xlat will be logged by memory_region_access_valid()
733 * when this memory access is rejected, so use the original untranslated
734 * physical address.
735 */
736 assert((orig_addr & ~TARGET_PAGE_MASK) == 0);
737 *xlat = orig_addr;
738 return &d->map.sections[PHYS_SECTION_UNASSIGNED];
739 }
740
cpu_address_space_init(CPUState * cpu,int asidx,const char * prefix,MemoryRegion * mr)741 void cpu_address_space_init(CPUState *cpu, int asidx,
742 const char *prefix, MemoryRegion *mr)
743 {
744 CPUAddressSpace *newas;
745 AddressSpace *as = g_new0(AddressSpace, 1);
746 char *as_name;
747
748 assert(mr);
749 as_name = g_strdup_printf("%s-%d", prefix, cpu->cpu_index);
750 address_space_init(as, mr, as_name);
751 g_free(as_name);
752
753 /* Target code should have set num_ases before calling us */
754 assert(asidx < cpu->num_ases);
755
756 if (asidx == 0) {
757 /* address space 0 gets the convenience alias */
758 cpu->as = as;
759 }
760
761 /* KVM cannot currently support multiple address spaces. */
762 assert(asidx == 0 || !kvm_enabled());
763
764 if (!cpu->cpu_ases) {
765 cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases);
766 cpu->cpu_ases_count = cpu->num_ases;
767 }
768
769 newas = &cpu->cpu_ases[asidx];
770 newas->cpu = cpu;
771 newas->as = as;
772 if (tcg_enabled()) {
773 newas->tcg_as_listener.log_global_after_sync = tcg_log_global_after_sync;
774 newas->tcg_as_listener.commit = tcg_commit;
775 newas->tcg_as_listener.name = "tcg";
776 memory_listener_register(&newas->tcg_as_listener, as);
777 }
778 }
779
cpu_address_space_destroy(CPUState * cpu,int asidx)780 void cpu_address_space_destroy(CPUState *cpu, int asidx)
781 {
782 CPUAddressSpace *cpuas;
783
784 assert(cpu->cpu_ases);
785 assert(asidx >= 0 && asidx < cpu->num_ases);
786 /* KVM cannot currently support multiple address spaces. */
787 assert(asidx == 0 || !kvm_enabled());
788
789 cpuas = &cpu->cpu_ases[asidx];
790 if (tcg_enabled()) {
791 memory_listener_unregister(&cpuas->tcg_as_listener);
792 }
793
794 address_space_destroy(cpuas->as);
795 g_free_rcu(cpuas->as, rcu);
796
797 if (asidx == 0) {
798 /* reset the convenience alias for address space 0 */
799 cpu->as = NULL;
800 }
801
802 if (--cpu->cpu_ases_count == 0) {
803 g_free(cpu->cpu_ases);
804 cpu->cpu_ases = NULL;
805 }
806 }
807
cpu_get_address_space(CPUState * cpu,int asidx)808 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx)
809 {
810 /* Return the AddressSpace corresponding to the specified index */
811 return cpu->cpu_ases[asidx].as;
812 }
813
814 /* Called from RCU critical section */
qemu_get_ram_block(ram_addr_t addr)815 static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
816 {
817 RAMBlock *block;
818
819 block = qatomic_rcu_read(&ram_list.mru_block);
820 if (block && addr - block->offset < block->max_length) {
821 return block;
822 }
823 RAMBLOCK_FOREACH(block) {
824 if (addr - block->offset < block->max_length) {
825 goto found;
826 }
827 }
828
829 fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
830 abort();
831
832 found:
833 /* It is safe to write mru_block outside the BQL. This
834 * is what happens:
835 *
836 * mru_block = xxx
837 * rcu_read_unlock()
838 * xxx removed from list
839 * rcu_read_lock()
840 * read mru_block
841 * mru_block = NULL;
842 * call_rcu(reclaim_ramblock, xxx);
843 * rcu_read_unlock()
844 *
845 * qatomic_rcu_set is not needed here. The block was already published
846 * when it was placed into the list. Here we're just making an extra
847 * copy of the pointer.
848 */
849 ram_list.mru_block = block;
850 return block;
851 }
852
tlb_reset_dirty_range_all(ram_addr_t start,ram_addr_t length)853 void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
854 {
855 CPUState *cpu;
856 ram_addr_t start1;
857 RAMBlock *block;
858 ram_addr_t end;
859
860 assert(tcg_enabled());
861 end = TARGET_PAGE_ALIGN(start + length);
862 start &= TARGET_PAGE_MASK;
863
864 RCU_READ_LOCK_GUARD();
865 block = qemu_get_ram_block(start);
866 assert(block == qemu_get_ram_block(end - 1));
867 start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);
868 CPU_FOREACH(cpu) {
869 tlb_reset_dirty(cpu, start1, length);
870 }
871 }
872
873 /* Note: start and end must be within the same ram block. */
cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,ram_addr_t length,unsigned client)874 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start,
875 ram_addr_t length,
876 unsigned client)
877 {
878 DirtyMemoryBlocks *blocks;
879 unsigned long end, page, start_page;
880 bool dirty = false;
881 RAMBlock *ramblock;
882 uint64_t mr_offset, mr_size;
883
884 if (length == 0) {
885 return false;
886 }
887
888 end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS;
889 start_page = start >> TARGET_PAGE_BITS;
890 page = start_page;
891
892 WITH_RCU_READ_LOCK_GUARD() {
893 blocks = qatomic_rcu_read(&ram_list.dirty_memory[client]);
894 ramblock = qemu_get_ram_block(start);
895 /* Range sanity check on the ramblock */
896 assert(start >= ramblock->offset &&
897 start + length <= ramblock->offset + ramblock->used_length);
898
899 while (page < end) {
900 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
901 unsigned long offset = page % DIRTY_MEMORY_BLOCK_SIZE;
902 unsigned long num = MIN(end - page,
903 DIRTY_MEMORY_BLOCK_SIZE - offset);
904
905 dirty |= bitmap_test_and_clear_atomic(blocks->blocks[idx],
906 offset, num);
907 page += num;
908 }
909
910 mr_offset = (ram_addr_t)(start_page << TARGET_PAGE_BITS) - ramblock->offset;
911 mr_size = (end - start_page) << TARGET_PAGE_BITS;
912 memory_region_clear_dirty_bitmap(ramblock->mr, mr_offset, mr_size);
913 }
914
915 if (dirty) {
916 cpu_physical_memory_dirty_bits_cleared(start, length);
917 }
918
919 return dirty;
920 }
921
cpu_physical_memory_snapshot_and_clear_dirty(MemoryRegion * mr,hwaddr offset,hwaddr length,unsigned client)922 DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty
923 (MemoryRegion *mr, hwaddr offset, hwaddr length, unsigned client)
924 {
925 DirtyMemoryBlocks *blocks;
926 ram_addr_t start, first, last;
927 unsigned long align = 1UL << (TARGET_PAGE_BITS + BITS_PER_LEVEL);
928 DirtyBitmapSnapshot *snap;
929 unsigned long page, end, dest;
930
931 start = memory_region_get_ram_addr(mr);
932 /* We know we're only called for RAM MemoryRegions */
933 assert(start != RAM_ADDR_INVALID);
934 start += offset;
935
936 first = QEMU_ALIGN_DOWN(start, align);
937 last = QEMU_ALIGN_UP(start + length, align);
938
939 snap = g_malloc0(sizeof(*snap) +
940 ((last - first) >> (TARGET_PAGE_BITS + 3)));
941 snap->start = first;
942 snap->end = last;
943
944 page = first >> TARGET_PAGE_BITS;
945 end = last >> TARGET_PAGE_BITS;
946 dest = 0;
947
948 WITH_RCU_READ_LOCK_GUARD() {
949 blocks = qatomic_rcu_read(&ram_list.dirty_memory[client]);
950
951 while (page < end) {
952 unsigned long idx = page / DIRTY_MEMORY_BLOCK_SIZE;
953 unsigned long ofs = page % DIRTY_MEMORY_BLOCK_SIZE;
954 unsigned long num = MIN(end - page,
955 DIRTY_MEMORY_BLOCK_SIZE - ofs);
956
957 assert(QEMU_IS_ALIGNED(ofs, (1 << BITS_PER_LEVEL)));
958 assert(QEMU_IS_ALIGNED(num, (1 << BITS_PER_LEVEL)));
959 ofs >>= BITS_PER_LEVEL;
960
961 bitmap_copy_and_clear_atomic(snap->dirty + dest,
962 blocks->blocks[idx] + ofs,
963 num);
964 page += num;
965 dest += num >> BITS_PER_LEVEL;
966 }
967 }
968
969 cpu_physical_memory_dirty_bits_cleared(start, length);
970
971 memory_region_clear_dirty_bitmap(mr, offset, length);
972
973 return snap;
974 }
975
cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot * snap,ram_addr_t start,ram_addr_t length)976 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap,
977 ram_addr_t start,
978 ram_addr_t length)
979 {
980 unsigned long page, end;
981
982 assert(start >= snap->start);
983 assert(start + length <= snap->end);
984
985 end = TARGET_PAGE_ALIGN(start + length - snap->start) >> TARGET_PAGE_BITS;
986 page = (start - snap->start) >> TARGET_PAGE_BITS;
987
988 while (page < end) {
989 if (test_bit(page, snap->dirty)) {
990 return true;
991 }
992 page++;
993 }
994 return false;
995 }
996
997 /* Called from RCU critical section */
memory_region_section_get_iotlb(CPUState * cpu,MemoryRegionSection * section)998 hwaddr memory_region_section_get_iotlb(CPUState *cpu,
999 MemoryRegionSection *section)
1000 {
1001 AddressSpaceDispatch *d = flatview_to_dispatch(section->fv);
1002 return section - d->map.sections;
1003 }
1004
1005 static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
1006 uint16_t section);
1007 static subpage_t *subpage_init(FlatView *fv, hwaddr base);
1008
phys_section_add(PhysPageMap * map,MemoryRegionSection * section)1009 static uint16_t phys_section_add(PhysPageMap *map,
1010 MemoryRegionSection *section)
1011 {
1012 /* The physical section number is ORed with a page-aligned
1013 * pointer to produce the iotlb entries. Thus it should
1014 * never overflow into the page-aligned value.
1015 */
1016 assert(map->sections_nb < TARGET_PAGE_SIZE);
1017
1018 if (map->sections_nb == map->sections_nb_alloc) {
1019 map->sections_nb_alloc = MAX(map->sections_nb_alloc * 2, 16);
1020 map->sections = g_renew(MemoryRegionSection, map->sections,
1021 map->sections_nb_alloc);
1022 }
1023 map->sections[map->sections_nb] = *section;
1024 memory_region_ref(section->mr);
1025 return map->sections_nb++;
1026 }
1027
phys_section_destroy(MemoryRegion * mr)1028 static void phys_section_destroy(MemoryRegion *mr)
1029 {
1030 bool have_sub_page = mr->subpage;
1031
1032 memory_region_unref(mr);
1033
1034 if (have_sub_page) {
1035 subpage_t *subpage = container_of(mr, subpage_t, iomem);
1036 object_unref(OBJECT(&subpage->iomem));
1037 g_free(subpage);
1038 }
1039 }
1040
phys_sections_free(PhysPageMap * map)1041 static void phys_sections_free(PhysPageMap *map)
1042 {
1043 while (map->sections_nb > 0) {
1044 MemoryRegionSection *section = &map->sections[--map->sections_nb];
1045 phys_section_destroy(section->mr);
1046 }
1047 g_free(map->sections);
1048 g_free(map->nodes);
1049 }
1050
register_subpage(FlatView * fv,MemoryRegionSection * section)1051 static void register_subpage(FlatView *fv, MemoryRegionSection *section)
1052 {
1053 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
1054 subpage_t *subpage;
1055 hwaddr base = section->offset_within_address_space
1056 & TARGET_PAGE_MASK;
1057 MemoryRegionSection *existing = phys_page_find(d, base);
1058 MemoryRegionSection subsection = {
1059 .offset_within_address_space = base,
1060 .size = int128_make64(TARGET_PAGE_SIZE),
1061 };
1062 hwaddr start, end;
1063
1064 assert(existing->mr->subpage || existing->mr == &io_mem_unassigned);
1065
1066 if (!(existing->mr->subpage)) {
1067 subpage = subpage_init(fv, base);
1068 subsection.fv = fv;
1069 subsection.mr = &subpage->iomem;
1070 phys_page_set(d, base >> TARGET_PAGE_BITS, 1,
1071 phys_section_add(&d->map, &subsection));
1072 } else {
1073 subpage = container_of(existing->mr, subpage_t, iomem);
1074 }
1075 start = section->offset_within_address_space & ~TARGET_PAGE_MASK;
1076 end = start + int128_get64(section->size) - 1;
1077 subpage_register(subpage, start, end,
1078 phys_section_add(&d->map, section));
1079 }
1080
1081
register_multipage(FlatView * fv,MemoryRegionSection * section)1082 static void register_multipage(FlatView *fv,
1083 MemoryRegionSection *section)
1084 {
1085 AddressSpaceDispatch *d = flatview_to_dispatch(fv);
1086 hwaddr start_addr = section->offset_within_address_space;
1087 uint16_t section_index = phys_section_add(&d->map, section);
1088 uint64_t num_pages = int128_get64(int128_rshift(section->size,
1089 TARGET_PAGE_BITS));
1090
1091 assert(num_pages);
1092 phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
1093 }
1094
1095 /*
1096 * The range in *section* may look like this:
1097 *
1098 * |s|PPPPPPP|s|
1099 *
1100 * where s stands for subpage and P for page.
1101 */
flatview_add_to_dispatch(FlatView * fv,MemoryRegionSection * section)1102 void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section)
1103 {
1104 MemoryRegionSection remain = *section;
1105 Int128 page_size = int128_make64(TARGET_PAGE_SIZE);
1106
1107 /* register first subpage */
1108 if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {
1109 uint64_t left = TARGET_PAGE_ALIGN(remain.offset_within_address_space)
1110 - remain.offset_within_address_space;
1111
1112 MemoryRegionSection now = remain;
1113 now.size = int128_min(int128_make64(left), now.size);
1114 register_subpage(fv, &now);
1115 if (int128_eq(remain.size, now.size)) {
1116 return;
1117 }
1118 remain.size = int128_sub(remain.size, now.size);
1119 remain.offset_within_address_space += int128_get64(now.size);
1120 remain.offset_within_region += int128_get64(now.size);
1121 }
1122
1123 /* register whole pages */
1124 if (int128_ge(remain.size, page_size)) {
1125 MemoryRegionSection now = remain;
1126 now.size = int128_and(now.size, int128_neg(page_size));
1127 register_multipage(fv, &now);
1128 if (int128_eq(remain.size, now.size)) {
1129 return;
1130 }
1131 remain.size = int128_sub(remain.size, now.size);
1132 remain.offset_within_address_space += int128_get64(now.size);
1133 remain.offset_within_region += int128_get64(now.size);
1134 }
1135
1136 /* register last subpage */
1137 register_subpage(fv, &remain);
1138 }
1139
qemu_flush_coalesced_mmio_buffer(void)1140 void qemu_flush_coalesced_mmio_buffer(void)
1141 {
1142 if (kvm_enabled())
1143 kvm_flush_coalesced_mmio_buffer();
1144 }
1145
qemu_mutex_lock_ramlist(void)1146 void qemu_mutex_lock_ramlist(void)
1147 {
1148 qemu_mutex_lock(&ram_list.mutex);
1149 }
1150
qemu_mutex_unlock_ramlist(void)1151 void qemu_mutex_unlock_ramlist(void)
1152 {
1153 qemu_mutex_unlock(&ram_list.mutex);
1154 }
1155
ram_block_format(void)1156 GString *ram_block_format(void)
1157 {
1158 RAMBlock *block;
1159 char *psize;
1160 GString *buf = g_string_new("");
1161
1162 RCU_READ_LOCK_GUARD();
1163 g_string_append_printf(buf, "%24s %8s %18s %18s %18s %18s %3s\n",
1164 "Block Name", "PSize", "Offset", "Used", "Total",
1165 "HVA", "RO");
1166
1167 RAMBLOCK_FOREACH(block) {
1168 psize = size_to_str(block->page_size);
1169 g_string_append_printf(buf, "%24s %8s 0x%016" PRIx64 " 0x%016" PRIx64
1170 " 0x%016" PRIx64 " 0x%016" PRIx64 " %3s\n",
1171 block->idstr, psize,
1172 (uint64_t)block->offset,
1173 (uint64_t)block->used_length,
1174 (uint64_t)block->max_length,
1175 (uint64_t)(uintptr_t)block->host,
1176 block->mr->readonly ? "ro" : "rw");
1177
1178 g_free(psize);
1179 }
1180
1181 return buf;
1182 }
1183
find_min_backend_pagesize(Object * obj,void * opaque)1184 static int find_min_backend_pagesize(Object *obj, void *opaque)
1185 {
1186 long *hpsize_min = opaque;
1187
1188 if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) {
1189 HostMemoryBackend *backend = MEMORY_BACKEND(obj);
1190 long hpsize = host_memory_backend_pagesize(backend);
1191
1192 if (host_memory_backend_is_mapped(backend) && (hpsize < *hpsize_min)) {
1193 *hpsize_min = hpsize;
1194 }
1195 }
1196
1197 return 0;
1198 }
1199
find_max_backend_pagesize(Object * obj,void * opaque)1200 static int find_max_backend_pagesize(Object *obj, void *opaque)
1201 {
1202 long *hpsize_max = opaque;
1203
1204 if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) {
1205 HostMemoryBackend *backend = MEMORY_BACKEND(obj);
1206 long hpsize = host_memory_backend_pagesize(backend);
1207
1208 if (host_memory_backend_is_mapped(backend) && (hpsize > *hpsize_max)) {
1209 *hpsize_max = hpsize;
1210 }
1211 }
1212
1213 return 0;
1214 }
1215
1216 /*
1217 * TODO: We assume right now that all mapped host memory backends are
1218 * used as RAM, however some might be used for different purposes.
1219 */
qemu_minrampagesize(void)1220 long qemu_minrampagesize(void)
1221 {
1222 long hpsize = LONG_MAX;
1223 Object *memdev_root = object_resolve_path("/objects", NULL);
1224
1225 object_child_foreach(memdev_root, find_min_backend_pagesize, &hpsize);
1226 return hpsize;
1227 }
1228
qemu_maxrampagesize(void)1229 long qemu_maxrampagesize(void)
1230 {
1231 long pagesize = 0;
1232 Object *memdev_root = object_resolve_path("/objects", NULL);
1233
1234 object_child_foreach(memdev_root, find_max_backend_pagesize, &pagesize);
1235 return pagesize;
1236 }
1237
1238 #ifdef CONFIG_POSIX
get_file_size(int fd)1239 static int64_t get_file_size(int fd)
1240 {
1241 int64_t size;
1242 #if defined(__linux__)
1243 struct stat st;
1244
1245 if (fstat(fd, &st) < 0) {
1246 return -errno;
1247 }
1248
1249 /* Special handling for devdax character devices */
1250 if (S_ISCHR(st.st_mode)) {
1251 g_autofree char *subsystem_path = NULL;
1252 g_autofree char *subsystem = NULL;
1253
1254 subsystem_path = g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
1255 major(st.st_rdev), minor(st.st_rdev));
1256 subsystem = g_file_read_link(subsystem_path, NULL);
1257
1258 if (subsystem && g_str_has_suffix(subsystem, "/dax")) {
1259 g_autofree char *size_path = NULL;
1260 g_autofree char *size_str = NULL;
1261
1262 size_path = g_strdup_printf("/sys/dev/char/%d:%d/size",
1263 major(st.st_rdev), minor(st.st_rdev));
1264
1265 if (g_file_get_contents(size_path, &size_str, NULL, NULL)) {
1266 return g_ascii_strtoll(size_str, NULL, 0);
1267 }
1268 }
1269 }
1270 #endif /* defined(__linux__) */
1271
1272 /* st.st_size may be zero for special files yet lseek(2) works */
1273 size = lseek(fd, 0, SEEK_END);
1274 if (size < 0) {
1275 return -errno;
1276 }
1277 return size;
1278 }
1279
get_file_align(int fd)1280 static int64_t get_file_align(int fd)
1281 {
1282 int64_t align = -1;
1283 #if defined(__linux__) && defined(CONFIG_LIBDAXCTL)
1284 struct stat st;
1285
1286 if (fstat(fd, &st) < 0) {
1287 return -errno;
1288 }
1289
1290 /* Special handling for devdax character devices */
1291 if (S_ISCHR(st.st_mode)) {
1292 g_autofree char *path = NULL;
1293 g_autofree char *rpath = NULL;
1294 struct daxctl_ctx *ctx;
1295 struct daxctl_region *region;
1296 int rc = 0;
1297
1298 path = g_strdup_printf("/sys/dev/char/%d:%d",
1299 major(st.st_rdev), minor(st.st_rdev));
1300 rpath = realpath(path, NULL);
1301 if (!rpath) {
1302 return -errno;
1303 }
1304
1305 rc = daxctl_new(&ctx);
1306 if (rc) {
1307 return -1;
1308 }
1309
1310 daxctl_region_foreach(ctx, region) {
1311 if (strstr(rpath, daxctl_region_get_path(region))) {
1312 align = daxctl_region_get_align(region);
1313 break;
1314 }
1315 }
1316 daxctl_unref(ctx);
1317 }
1318 #endif /* defined(__linux__) && defined(CONFIG_LIBDAXCTL) */
1319
1320 return align;
1321 }
1322
file_ram_open(const char * path,const char * region_name,bool readonly,bool * created)1323 static int file_ram_open(const char *path,
1324 const char *region_name,
1325 bool readonly,
1326 bool *created)
1327 {
1328 char *filename;
1329 char *sanitized_name;
1330 char *c;
1331 int fd = -1;
1332
1333 *created = false;
1334 for (;;) {
1335 fd = open(path, readonly ? O_RDONLY : O_RDWR);
1336 if (fd >= 0) {
1337 /*
1338 * open(O_RDONLY) won't fail with EISDIR. Check manually if we
1339 * opened a directory and fail similarly to how we fail ENOENT
1340 * in readonly mode. Note that mkstemp() would imply O_RDWR.
1341 */
1342 if (readonly) {
1343 struct stat file_stat;
1344
1345 if (fstat(fd, &file_stat)) {
1346 close(fd);
1347 if (errno == EINTR) {
1348 continue;
1349 }
1350 return -errno;
1351 } else if (S_ISDIR(file_stat.st_mode)) {
1352 close(fd);
1353 return -EISDIR;
1354 }
1355 }
1356 /* @path names an existing file, use it */
1357 break;
1358 }
1359 if (errno == ENOENT) {
1360 if (readonly) {
1361 /* Refuse to create new, readonly files. */
1362 return -ENOENT;
1363 }
1364 /* @path names a file that doesn't exist, create it */
1365 fd = open(path, O_RDWR | O_CREAT | O_EXCL, 0644);
1366 if (fd >= 0) {
1367 *created = true;
1368 break;
1369 }
1370 } else if (errno == EISDIR) {
1371 /* @path names a directory, create a file there */
1372 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1373 sanitized_name = g_strdup(region_name);
1374 for (c = sanitized_name; *c != '\0'; c++) {
1375 if (*c == '/') {
1376 *c = '_';
1377 }
1378 }
1379
1380 filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path,
1381 sanitized_name);
1382 g_free(sanitized_name);
1383
1384 fd = mkstemp(filename);
1385 if (fd >= 0) {
1386 unlink(filename);
1387 g_free(filename);
1388 break;
1389 }
1390 g_free(filename);
1391 }
1392 if (errno != EEXIST && errno != EINTR) {
1393 return -errno;
1394 }
1395 /*
1396 * Try again on EINTR and EEXIST. The latter happens when
1397 * something else creates the file between our two open().
1398 */
1399 }
1400
1401 return fd;
1402 }
1403
file_ram_alloc(RAMBlock * block,ram_addr_t memory,int fd,bool truncate,off_t offset,Error ** errp)1404 static void *file_ram_alloc(RAMBlock *block,
1405 ram_addr_t memory,
1406 int fd,
1407 bool truncate,
1408 off_t offset,
1409 Error **errp)
1410 {
1411 uint32_t qemu_map_flags;
1412 void *area;
1413
1414 block->page_size = qemu_fd_getpagesize(fd);
1415 if (block->mr->align % block->page_size) {
1416 error_setg(errp, "alignment 0x%" PRIx64
1417 " must be multiples of page size 0x%zx",
1418 block->mr->align, block->page_size);
1419 return NULL;
1420 } else if (block->mr->align && !is_power_of_2(block->mr->align)) {
1421 error_setg(errp, "alignment 0x%" PRIx64
1422 " must be a power of two", block->mr->align);
1423 return NULL;
1424 } else if (offset % block->page_size) {
1425 error_setg(errp, "offset 0x%" PRIx64
1426 " must be multiples of page size 0x%zx",
1427 offset, block->page_size);
1428 return NULL;
1429 }
1430 block->mr->align = MAX(block->page_size, block->mr->align);
1431 #if defined(__s390x__)
1432 if (kvm_enabled()) {
1433 block->mr->align = MAX(block->mr->align, QEMU_VMALLOC_ALIGN);
1434 }
1435 #endif
1436
1437 if (memory < block->page_size) {
1438 error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to "
1439 "or larger than page size 0x%zx",
1440 memory, block->page_size);
1441 return NULL;
1442 }
1443
1444 memory = ROUND_UP(memory, block->page_size);
1445
1446 /*
1447 * ftruncate is not supported by hugetlbfs in older
1448 * hosts, so don't bother bailing out on errors.
1449 * If anything goes wrong with it under other filesystems,
1450 * mmap will fail.
1451 *
1452 * Do not truncate the non-empty backend file to avoid corrupting
1453 * the existing data in the file. Disabling shrinking is not
1454 * enough. For example, the current vNVDIMM implementation stores
1455 * the guest NVDIMM labels at the end of the backend file. If the
1456 * backend file is later extended, QEMU will not be able to find
1457 * those labels. Therefore, extending the non-empty backend file
1458 * is disabled as well.
1459 */
1460 if (truncate && ftruncate(fd, offset + memory)) {
1461 perror("ftruncate");
1462 }
1463
1464 qemu_map_flags = (block->flags & RAM_READONLY) ? QEMU_MAP_READONLY : 0;
1465 qemu_map_flags |= (block->flags & RAM_SHARED) ? QEMU_MAP_SHARED : 0;
1466 qemu_map_flags |= (block->flags & RAM_PMEM) ? QEMU_MAP_SYNC : 0;
1467 qemu_map_flags |= (block->flags & RAM_NORESERVE) ? QEMU_MAP_NORESERVE : 0;
1468 area = qemu_ram_mmap(fd, memory, block->mr->align, qemu_map_flags, offset);
1469 if (area == MAP_FAILED) {
1470 error_setg_errno(errp, errno,
1471 "unable to map backing store for guest RAM");
1472 return NULL;
1473 }
1474
1475 block->fd = fd;
1476 block->fd_offset = offset;
1477 return area;
1478 }
1479 #endif
1480
1481 /* Allocate space within the ram_addr_t space that governs the
1482 * dirty bitmaps.
1483 * Called with the ramlist lock held.
1484 */
find_ram_offset(ram_addr_t size)1485 static ram_addr_t find_ram_offset(ram_addr_t size)
1486 {
1487 RAMBlock *block, *next_block;
1488 ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX;
1489
1490 assert(size != 0); /* it would hand out same offset multiple times */
1491
1492 if (QLIST_EMPTY_RCU(&ram_list.blocks)) {
1493 return 0;
1494 }
1495
1496 RAMBLOCK_FOREACH(block) {
1497 ram_addr_t candidate, next = RAM_ADDR_MAX;
1498
1499 /* Align blocks to start on a 'long' in the bitmap
1500 * which makes the bitmap sync'ing take the fast path.
1501 */
1502 candidate = block->offset + block->max_length;
1503 candidate = ROUND_UP(candidate, BITS_PER_LONG << TARGET_PAGE_BITS);
1504
1505 /* Search for the closest following block
1506 * and find the gap.
1507 */
1508 RAMBLOCK_FOREACH(next_block) {
1509 if (next_block->offset >= candidate) {
1510 next = MIN(next, next_block->offset);
1511 }
1512 }
1513
1514 /* If it fits remember our place and remember the size
1515 * of gap, but keep going so that we might find a smaller
1516 * gap to fill so avoiding fragmentation.
1517 */
1518 if (next - candidate >= size && next - candidate < mingap) {
1519 offset = candidate;
1520 mingap = next - candidate;
1521 }
1522
1523 trace_find_ram_offset_loop(size, candidate, offset, next, mingap);
1524 }
1525
1526 if (offset == RAM_ADDR_MAX) {
1527 fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n",
1528 (uint64_t)size);
1529 abort();
1530 }
1531
1532 trace_find_ram_offset(size, offset);
1533
1534 return offset;
1535 }
1536
last_ram_page(void)1537 static unsigned long last_ram_page(void)
1538 {
1539 RAMBlock *block;
1540 ram_addr_t last = 0;
1541
1542 RCU_READ_LOCK_GUARD();
1543 RAMBLOCK_FOREACH(block) {
1544 last = MAX(last, block->offset + block->max_length);
1545 }
1546 return last >> TARGET_PAGE_BITS;
1547 }
1548
qemu_ram_setup_dump(void * addr,ram_addr_t size)1549 static void qemu_ram_setup_dump(void *addr, ram_addr_t size)
1550 {
1551 int ret;
1552
1553 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1554 if (!machine_dump_guest_core(current_machine)) {
1555 ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP);
1556 if (ret) {
1557 perror("qemu_madvise");
1558 fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, "
1559 "but dump-guest-core=off specified\n");
1560 }
1561 }
1562 }
1563
qemu_ram_get_idstr(RAMBlock * rb)1564 const char *qemu_ram_get_idstr(RAMBlock *rb)
1565 {
1566 return rb->idstr;
1567 }
1568
qemu_ram_get_host_addr(RAMBlock * rb)1569 void *qemu_ram_get_host_addr(RAMBlock *rb)
1570 {
1571 return rb->host;
1572 }
1573
qemu_ram_get_offset(RAMBlock * rb)1574 ram_addr_t qemu_ram_get_offset(RAMBlock *rb)
1575 {
1576 return rb->offset;
1577 }
1578
qemu_ram_get_used_length(RAMBlock * rb)1579 ram_addr_t qemu_ram_get_used_length(RAMBlock *rb)
1580 {
1581 return rb->used_length;
1582 }
1583
qemu_ram_get_max_length(RAMBlock * rb)1584 ram_addr_t qemu_ram_get_max_length(RAMBlock *rb)
1585 {
1586 return rb->max_length;
1587 }
1588
qemu_ram_is_shared(RAMBlock * rb)1589 bool qemu_ram_is_shared(RAMBlock *rb)
1590 {
1591 return rb->flags & RAM_SHARED;
1592 }
1593
qemu_ram_is_noreserve(RAMBlock * rb)1594 bool qemu_ram_is_noreserve(RAMBlock *rb)
1595 {
1596 return rb->flags & RAM_NORESERVE;
1597 }
1598
1599 /* Note: Only set at the start of postcopy */
qemu_ram_is_uf_zeroable(RAMBlock * rb)1600 bool qemu_ram_is_uf_zeroable(RAMBlock *rb)
1601 {
1602 return rb->flags & RAM_UF_ZEROPAGE;
1603 }
1604
qemu_ram_set_uf_zeroable(RAMBlock * rb)1605 void qemu_ram_set_uf_zeroable(RAMBlock *rb)
1606 {
1607 rb->flags |= RAM_UF_ZEROPAGE;
1608 }
1609
qemu_ram_is_migratable(RAMBlock * rb)1610 bool qemu_ram_is_migratable(RAMBlock *rb)
1611 {
1612 return rb->flags & RAM_MIGRATABLE;
1613 }
1614
qemu_ram_set_migratable(RAMBlock * rb)1615 void qemu_ram_set_migratable(RAMBlock *rb)
1616 {
1617 rb->flags |= RAM_MIGRATABLE;
1618 }
1619
qemu_ram_unset_migratable(RAMBlock * rb)1620 void qemu_ram_unset_migratable(RAMBlock *rb)
1621 {
1622 rb->flags &= ~RAM_MIGRATABLE;
1623 }
1624
qemu_ram_is_named_file(RAMBlock * rb)1625 bool qemu_ram_is_named_file(RAMBlock *rb)
1626 {
1627 return rb->flags & RAM_NAMED_FILE;
1628 }
1629
qemu_ram_get_fd(RAMBlock * rb)1630 int qemu_ram_get_fd(RAMBlock *rb)
1631 {
1632 return rb->fd;
1633 }
1634
1635 /* Called with the BQL held. */
qemu_ram_set_idstr(RAMBlock * new_block,const char * name,DeviceState * dev)1636 void qemu_ram_set_idstr(RAMBlock *new_block, const char *name, DeviceState *dev)
1637 {
1638 RAMBlock *block;
1639
1640 assert(new_block);
1641 assert(!new_block->idstr[0]);
1642
1643 if (dev) {
1644 char *id = qdev_get_dev_path(dev);
1645 if (id) {
1646 snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id);
1647 g_free(id);
1648 }
1649 }
1650 pstrcat(new_block->idstr, sizeof(new_block->idstr), name);
1651
1652 RCU_READ_LOCK_GUARD();
1653 RAMBLOCK_FOREACH(block) {
1654 if (block != new_block &&
1655 !strcmp(block->idstr, new_block->idstr)) {
1656 fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n",
1657 new_block->idstr);
1658 abort();
1659 }
1660 }
1661 }
1662
1663 /* Called with the BQL held. */
qemu_ram_unset_idstr(RAMBlock * block)1664 void qemu_ram_unset_idstr(RAMBlock *block)
1665 {
1666 /* FIXME: arch_init.c assumes that this is not called throughout
1667 * migration. Ignore the problem since hot-unplug during migration
1668 * does not work anyway.
1669 */
1670 if (block) {
1671 memset(block->idstr, 0, sizeof(block->idstr));
1672 }
1673 }
1674
qemu_ram_pagesize(RAMBlock * rb)1675 size_t qemu_ram_pagesize(RAMBlock *rb)
1676 {
1677 return rb->page_size;
1678 }
1679
1680 /* Returns the largest size of page in use */
qemu_ram_pagesize_largest(void)1681 size_t qemu_ram_pagesize_largest(void)
1682 {
1683 RAMBlock *block;
1684 size_t largest = 0;
1685
1686 RAMBLOCK_FOREACH(block) {
1687 largest = MAX(largest, qemu_ram_pagesize(block));
1688 }
1689
1690 return largest;
1691 }
1692
memory_try_enable_merging(void * addr,size_t len)1693 static int memory_try_enable_merging(void *addr, size_t len)
1694 {
1695 if (!machine_mem_merge(current_machine)) {
1696 /* disabled by the user */
1697 return 0;
1698 }
1699
1700 return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE);
1701 }
1702
1703 /*
1704 * Resizing RAM while migrating can result in the migration being canceled.
1705 * Care has to be taken if the guest might have already detected the memory.
1706 *
1707 * As memory core doesn't know how is memory accessed, it is up to
1708 * resize callback to update device state and/or add assertions to detect
1709 * misuse, if necessary.
1710 */
qemu_ram_resize(RAMBlock * block,ram_addr_t newsize,Error ** errp)1711 int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp)
1712 {
1713 const ram_addr_t oldsize = block->used_length;
1714 const ram_addr_t unaligned_size = newsize;
1715
1716 assert(block);
1717
1718 newsize = TARGET_PAGE_ALIGN(newsize);
1719 newsize = REAL_HOST_PAGE_ALIGN(newsize);
1720
1721 if (block->used_length == newsize) {
1722 /*
1723 * We don't have to resize the ram block (which only knows aligned
1724 * sizes), however, we have to notify if the unaligned size changed.
1725 */
1726 if (unaligned_size != memory_region_size(block->mr)) {
1727 memory_region_set_size(block->mr, unaligned_size);
1728 if (block->resized) {
1729 block->resized(block->idstr, unaligned_size, block->host);
1730 }
1731 }
1732 return 0;
1733 }
1734
1735 if (!(block->flags & RAM_RESIZEABLE)) {
1736 error_setg_errno(errp, EINVAL,
1737 "Size mismatch: %s: 0x" RAM_ADDR_FMT
1738 " != 0x" RAM_ADDR_FMT, block->idstr,
1739 newsize, block->used_length);
1740 return -EINVAL;
1741 }
1742
1743 if (block->max_length < newsize) {
1744 error_setg_errno(errp, EINVAL,
1745 "Size too large: %s: 0x" RAM_ADDR_FMT
1746 " > 0x" RAM_ADDR_FMT, block->idstr,
1747 newsize, block->max_length);
1748 return -EINVAL;
1749 }
1750
1751 /* Notify before modifying the ram block and touching the bitmaps. */
1752 if (block->host) {
1753 ram_block_notify_resize(block->host, oldsize, newsize);
1754 }
1755
1756 cpu_physical_memory_clear_dirty_range(block->offset, block->used_length);
1757 block->used_length = newsize;
1758 cpu_physical_memory_set_dirty_range(block->offset, block->used_length,
1759 DIRTY_CLIENTS_ALL);
1760 memory_region_set_size(block->mr, unaligned_size);
1761 if (block->resized) {
1762 block->resized(block->idstr, unaligned_size, block->host);
1763 }
1764 return 0;
1765 }
1766
1767 /*
1768 * Trigger sync on the given ram block for range [start, start + length]
1769 * with the backing store if one is available.
1770 * Otherwise no-op.
1771 * @Note: this is supposed to be a synchronous op.
1772 */
qemu_ram_msync(RAMBlock * block,ram_addr_t start,ram_addr_t length)1773 void qemu_ram_msync(RAMBlock *block, ram_addr_t start, ram_addr_t length)
1774 {
1775 /* The requested range should fit in within the block range */
1776 g_assert((start + length) <= block->used_length);
1777
1778 #ifdef CONFIG_LIBPMEM
1779 /* The lack of support for pmem should not block the sync */
1780 if (ramblock_is_pmem(block)) {
1781 void *addr = ramblock_ptr(block, start);
1782 pmem_persist(addr, length);
1783 return;
1784 }
1785 #endif
1786 if (block->fd >= 0) {
1787 /**
1788 * Case there is no support for PMEM or the memory has not been
1789 * specified as persistent (or is not one) - use the msync.
1790 * Less optimal but still achieves the same goal
1791 */
1792 void *addr = ramblock_ptr(block, start);
1793 if (qemu_msync(addr, length, block->fd)) {
1794 warn_report("%s: failed to sync memory range: start: "
1795 RAM_ADDR_FMT " length: " RAM_ADDR_FMT,
1796 __func__, start, length);
1797 }
1798 }
1799 }
1800
1801 /* Called with ram_list.mutex held */
dirty_memory_extend(ram_addr_t old_ram_size,ram_addr_t new_ram_size)1802 static void dirty_memory_extend(ram_addr_t old_ram_size,
1803 ram_addr_t new_ram_size)
1804 {
1805 ram_addr_t old_num_blocks = DIV_ROUND_UP(old_ram_size,
1806 DIRTY_MEMORY_BLOCK_SIZE);
1807 ram_addr_t new_num_blocks = DIV_ROUND_UP(new_ram_size,
1808 DIRTY_MEMORY_BLOCK_SIZE);
1809 int i;
1810
1811 /* Only need to extend if block count increased */
1812 if (new_num_blocks <= old_num_blocks) {
1813 return;
1814 }
1815
1816 for (i = 0; i < DIRTY_MEMORY_NUM; i++) {
1817 DirtyMemoryBlocks *old_blocks;
1818 DirtyMemoryBlocks *new_blocks;
1819 int j;
1820
1821 old_blocks = qatomic_rcu_read(&ram_list.dirty_memory[i]);
1822 new_blocks = g_malloc(sizeof(*new_blocks) +
1823 sizeof(new_blocks->blocks[0]) * new_num_blocks);
1824
1825 if (old_num_blocks) {
1826 memcpy(new_blocks->blocks, old_blocks->blocks,
1827 old_num_blocks * sizeof(old_blocks->blocks[0]));
1828 }
1829
1830 for (j = old_num_blocks; j < new_num_blocks; j++) {
1831 new_blocks->blocks[j] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE);
1832 }
1833
1834 qatomic_rcu_set(&ram_list.dirty_memory[i], new_blocks);
1835
1836 if (old_blocks) {
1837 g_free_rcu(old_blocks, rcu);
1838 }
1839 }
1840 }
1841
ram_block_add(RAMBlock * new_block,Error ** errp)1842 static void ram_block_add(RAMBlock *new_block, Error **errp)
1843 {
1844 const bool noreserve = qemu_ram_is_noreserve(new_block);
1845 const bool shared = qemu_ram_is_shared(new_block);
1846 RAMBlock *block;
1847 RAMBlock *last_block = NULL;
1848 bool free_on_error = false;
1849 ram_addr_t old_ram_size, new_ram_size;
1850 Error *err = NULL;
1851
1852 old_ram_size = last_ram_page();
1853
1854 qemu_mutex_lock_ramlist();
1855 new_block->offset = find_ram_offset(new_block->max_length);
1856
1857 if (!new_block->host) {
1858 if (xen_enabled()) {
1859 xen_ram_alloc(new_block->offset, new_block->max_length,
1860 new_block->mr, &err);
1861 if (err) {
1862 error_propagate(errp, err);
1863 qemu_mutex_unlock_ramlist();
1864 return;
1865 }
1866 } else {
1867 new_block->host = qemu_anon_ram_alloc(new_block->max_length,
1868 &new_block->mr->align,
1869 shared, noreserve);
1870 if (!new_block->host) {
1871 error_setg_errno(errp, errno,
1872 "cannot set up guest memory '%s'",
1873 memory_region_name(new_block->mr));
1874 qemu_mutex_unlock_ramlist();
1875 return;
1876 }
1877 memory_try_enable_merging(new_block->host, new_block->max_length);
1878 free_on_error = true;
1879 }
1880 }
1881
1882 if (new_block->flags & RAM_GUEST_MEMFD) {
1883 int ret;
1884
1885 assert(kvm_enabled());
1886 assert(new_block->guest_memfd < 0);
1887
1888 ret = ram_block_discard_require(true);
1889 if (ret < 0) {
1890 error_setg_errno(errp, -ret,
1891 "cannot set up private guest memory: discard currently blocked");
1892 error_append_hint(errp, "Are you using assigned devices?\n");
1893 goto out_free;
1894 }
1895
1896 new_block->guest_memfd = kvm_create_guest_memfd(new_block->max_length,
1897 0, errp);
1898 if (new_block->guest_memfd < 0) {
1899 qemu_mutex_unlock_ramlist();
1900 goto out_free;
1901 }
1902 }
1903
1904 new_ram_size = MAX(old_ram_size,
1905 (new_block->offset + new_block->max_length) >> TARGET_PAGE_BITS);
1906 if (new_ram_size > old_ram_size) {
1907 dirty_memory_extend(old_ram_size, new_ram_size);
1908 }
1909 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
1910 * QLIST (which has an RCU-friendly variant) does not have insertion at
1911 * tail, so save the last element in last_block.
1912 */
1913 RAMBLOCK_FOREACH(block) {
1914 last_block = block;
1915 if (block->max_length < new_block->max_length) {
1916 break;
1917 }
1918 }
1919 if (block) {
1920 QLIST_INSERT_BEFORE_RCU(block, new_block, next);
1921 } else if (last_block) {
1922 QLIST_INSERT_AFTER_RCU(last_block, new_block, next);
1923 } else { /* list is empty */
1924 QLIST_INSERT_HEAD_RCU(&ram_list.blocks, new_block, next);
1925 }
1926 ram_list.mru_block = NULL;
1927
1928 /* Write list before version */
1929 smp_wmb();
1930 ram_list.version++;
1931 qemu_mutex_unlock_ramlist();
1932
1933 cpu_physical_memory_set_dirty_range(new_block->offset,
1934 new_block->used_length,
1935 DIRTY_CLIENTS_ALL);
1936
1937 if (new_block->host) {
1938 qemu_ram_setup_dump(new_block->host, new_block->max_length);
1939 qemu_madvise(new_block->host, new_block->max_length, QEMU_MADV_HUGEPAGE);
1940 /*
1941 * MADV_DONTFORK is also needed by KVM in absence of synchronous MMU
1942 * Configure it unless the machine is a qtest server, in which case
1943 * KVM is not used and it may be forked (eg for fuzzing purposes).
1944 */
1945 if (!qtest_enabled()) {
1946 qemu_madvise(new_block->host, new_block->max_length,
1947 QEMU_MADV_DONTFORK);
1948 }
1949 ram_block_notify_add(new_block->host, new_block->used_length,
1950 new_block->max_length);
1951 }
1952 return;
1953
1954 out_free:
1955 if (free_on_error) {
1956 qemu_anon_ram_free(new_block->host, new_block->max_length);
1957 new_block->host = NULL;
1958 }
1959 }
1960
1961 #ifdef CONFIG_POSIX
qemu_ram_alloc_from_fd(ram_addr_t size,MemoryRegion * mr,uint32_t ram_flags,int fd,off_t offset,Error ** errp)1962 RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr,
1963 uint32_t ram_flags, int fd, off_t offset,
1964 Error **errp)
1965 {
1966 RAMBlock *new_block;
1967 Error *local_err = NULL;
1968 int64_t file_size, file_align;
1969
1970 /* Just support these ram flags by now. */
1971 assert((ram_flags & ~(RAM_SHARED | RAM_PMEM | RAM_NORESERVE |
1972 RAM_PROTECTED | RAM_NAMED_FILE | RAM_READONLY |
1973 RAM_READONLY_FD | RAM_GUEST_MEMFD)) == 0);
1974
1975 if (xen_enabled()) {
1976 error_setg(errp, "-mem-path not supported with Xen");
1977 return NULL;
1978 }
1979
1980 if (kvm_enabled() && !kvm_has_sync_mmu()) {
1981 error_setg(errp,
1982 "host lacks kvm mmu notifiers, -mem-path unsupported");
1983 return NULL;
1984 }
1985
1986 size = TARGET_PAGE_ALIGN(size);
1987 size = REAL_HOST_PAGE_ALIGN(size);
1988
1989 file_size = get_file_size(fd);
1990 if (file_size > offset && file_size < (offset + size)) {
1991 error_setg(errp, "backing store size 0x%" PRIx64
1992 " does not match 'size' option 0x" RAM_ADDR_FMT,
1993 file_size, size);
1994 return NULL;
1995 }
1996
1997 file_align = get_file_align(fd);
1998 if (file_align > 0 && file_align > mr->align) {
1999 error_setg(errp, "backing store align 0x%" PRIx64
2000 " is larger than 'align' option 0x%" PRIx64,
2001 file_align, mr->align);
2002 return NULL;
2003 }
2004
2005 new_block = g_malloc0(sizeof(*new_block));
2006 new_block->mr = mr;
2007 new_block->used_length = size;
2008 new_block->max_length = size;
2009 new_block->flags = ram_flags;
2010 new_block->guest_memfd = -1;
2011 new_block->host = file_ram_alloc(new_block, size, fd, !file_size, offset,
2012 errp);
2013 if (!new_block->host) {
2014 g_free(new_block);
2015 return NULL;
2016 }
2017
2018 ram_block_add(new_block, &local_err);
2019 if (local_err) {
2020 g_free(new_block);
2021 error_propagate(errp, local_err);
2022 return NULL;
2023 }
2024 return new_block;
2025
2026 }
2027
2028
qemu_ram_alloc_from_file(ram_addr_t size,MemoryRegion * mr,uint32_t ram_flags,const char * mem_path,off_t offset,Error ** errp)2029 RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr,
2030 uint32_t ram_flags, const char *mem_path,
2031 off_t offset, Error **errp)
2032 {
2033 int fd;
2034 bool created;
2035 RAMBlock *block;
2036
2037 fd = file_ram_open(mem_path, memory_region_name(mr),
2038 !!(ram_flags & RAM_READONLY_FD), &created);
2039 if (fd < 0) {
2040 error_setg_errno(errp, -fd, "can't open backing store %s for guest RAM",
2041 mem_path);
2042 if (!(ram_flags & RAM_READONLY_FD) && !(ram_flags & RAM_SHARED) &&
2043 fd == -EACCES) {
2044 /*
2045 * If we can open the file R/O (note: will never create a new file)
2046 * and we are dealing with a private mapping, there are still ways
2047 * to consume such files and get RAM instead of ROM.
2048 */
2049 fd = file_ram_open(mem_path, memory_region_name(mr), true,
2050 &created);
2051 if (fd < 0) {
2052 return NULL;
2053 }
2054 assert(!created);
2055 close(fd);
2056 error_append_hint(errp, "Consider opening the backing store"
2057 " read-only but still creating writable RAM using"
2058 " '-object memory-backend-file,readonly=on,rom=off...'"
2059 " (see \"VM templating\" documentation)\n");
2060 }
2061 return NULL;
2062 }
2063
2064 block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset, errp);
2065 if (!block) {
2066 if (created) {
2067 unlink(mem_path);
2068 }
2069 close(fd);
2070 return NULL;
2071 }
2072
2073 return block;
2074 }
2075 #endif
2076
2077 static
qemu_ram_alloc_internal(ram_addr_t size,ram_addr_t max_size,void (* resized)(const char *,uint64_t length,void * host),void * host,uint32_t ram_flags,MemoryRegion * mr,Error ** errp)2078 RAMBlock *qemu_ram_alloc_internal(ram_addr_t size, ram_addr_t max_size,
2079 void (*resized)(const char*,
2080 uint64_t length,
2081 void *host),
2082 void *host, uint32_t ram_flags,
2083 MemoryRegion *mr, Error **errp)
2084 {
2085 RAMBlock *new_block;
2086 Error *local_err = NULL;
2087 int align;
2088
2089 assert((ram_flags & ~(RAM_SHARED | RAM_RESIZEABLE | RAM_PREALLOC |
2090 RAM_NORESERVE | RAM_GUEST_MEMFD)) == 0);
2091 assert(!host ^ (ram_flags & RAM_PREALLOC));
2092
2093 align = qemu_real_host_page_size();
2094 align = MAX(align, TARGET_PAGE_SIZE);
2095 size = ROUND_UP(size, align);
2096 max_size = ROUND_UP(max_size, align);
2097
2098 new_block = g_malloc0(sizeof(*new_block));
2099 new_block->mr = mr;
2100 new_block->resized = resized;
2101 new_block->used_length = size;
2102 new_block->max_length = max_size;
2103 assert(max_size >= size);
2104 new_block->fd = -1;
2105 new_block->guest_memfd = -1;
2106 new_block->page_size = qemu_real_host_page_size();
2107 new_block->host = host;
2108 new_block->flags = ram_flags;
2109 ram_block_add(new_block, &local_err);
2110 if (local_err) {
2111 g_free(new_block);
2112 error_propagate(errp, local_err);
2113 return NULL;
2114 }
2115 return new_block;
2116 }
2117
qemu_ram_alloc_from_ptr(ram_addr_t size,void * host,MemoryRegion * mr,Error ** errp)2118 RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
2119 MemoryRegion *mr, Error **errp)
2120 {
2121 return qemu_ram_alloc_internal(size, size, NULL, host, RAM_PREALLOC, mr,
2122 errp);
2123 }
2124
qemu_ram_alloc(ram_addr_t size,uint32_t ram_flags,MemoryRegion * mr,Error ** errp)2125 RAMBlock *qemu_ram_alloc(ram_addr_t size, uint32_t ram_flags,
2126 MemoryRegion *mr, Error **errp)
2127 {
2128 assert((ram_flags & ~(RAM_SHARED | RAM_NORESERVE | RAM_GUEST_MEMFD)) == 0);
2129 return qemu_ram_alloc_internal(size, size, NULL, NULL, ram_flags, mr, errp);
2130 }
2131
qemu_ram_alloc_resizeable(ram_addr_t size,ram_addr_t maxsz,void (* resized)(const char *,uint64_t length,void * host),MemoryRegion * mr,Error ** errp)2132 RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz,
2133 void (*resized)(const char*,
2134 uint64_t length,
2135 void *host),
2136 MemoryRegion *mr, Error **errp)
2137 {
2138 return qemu_ram_alloc_internal(size, maxsz, resized, NULL,
2139 RAM_RESIZEABLE, mr, errp);
2140 }
2141
reclaim_ramblock(RAMBlock * block)2142 static void reclaim_ramblock(RAMBlock *block)
2143 {
2144 if (block->flags & RAM_PREALLOC) {
2145 ;
2146 } else if (xen_enabled()) {
2147 xen_invalidate_map_cache_entry(block->host);
2148 #ifndef _WIN32
2149 } else if (block->fd >= 0) {
2150 qemu_ram_munmap(block->fd, block->host, block->max_length);
2151 close(block->fd);
2152 #endif
2153 } else {
2154 qemu_anon_ram_free(block->host, block->max_length);
2155 }
2156
2157 if (block->guest_memfd >= 0) {
2158 close(block->guest_memfd);
2159 ram_block_discard_require(false);
2160 }
2161
2162 g_free(block);
2163 }
2164
qemu_ram_free(RAMBlock * block)2165 void qemu_ram_free(RAMBlock *block)
2166 {
2167 if (!block) {
2168 return;
2169 }
2170
2171 if (block->host) {
2172 ram_block_notify_remove(block->host, block->used_length,
2173 block->max_length);
2174 }
2175
2176 qemu_mutex_lock_ramlist();
2177 QLIST_REMOVE_RCU(block, next);
2178 ram_list.mru_block = NULL;
2179 /* Write list before version */
2180 smp_wmb();
2181 ram_list.version++;
2182 call_rcu(block, reclaim_ramblock, rcu);
2183 qemu_mutex_unlock_ramlist();
2184 }
2185
2186 #ifndef _WIN32
qemu_ram_remap(ram_addr_t addr,ram_addr_t length)2187 void qemu_ram_remap(ram_addr_t addr, ram_addr_t length)
2188 {
2189 RAMBlock *block;
2190 ram_addr_t offset;
2191 int flags;
2192 void *area, *vaddr;
2193 int prot;
2194
2195 RAMBLOCK_FOREACH(block) {
2196 offset = addr - block->offset;
2197 if (offset < block->max_length) {
2198 vaddr = ramblock_ptr(block, offset);
2199 if (block->flags & RAM_PREALLOC) {
2200 ;
2201 } else if (xen_enabled()) {
2202 abort();
2203 } else {
2204 flags = MAP_FIXED;
2205 flags |= block->flags & RAM_SHARED ?
2206 MAP_SHARED : MAP_PRIVATE;
2207 flags |= block->flags & RAM_NORESERVE ? MAP_NORESERVE : 0;
2208 prot = PROT_READ;
2209 prot |= block->flags & RAM_READONLY ? 0 : PROT_WRITE;
2210 if (block->fd >= 0) {
2211 area = mmap(vaddr, length, prot, flags, block->fd,
2212 offset + block->fd_offset);
2213 } else {
2214 flags |= MAP_ANONYMOUS;
2215 area = mmap(vaddr, length, prot, flags, -1, 0);
2216 }
2217 if (area != vaddr) {
2218 error_report("Could not remap addr: "
2219 RAM_ADDR_FMT "@" RAM_ADDR_FMT "",
2220 length, addr);
2221 exit(1);
2222 }
2223 memory_try_enable_merging(vaddr, length);
2224 qemu_ram_setup_dump(vaddr, length);
2225 }
2226 }
2227 }
2228 }
2229 #endif /* !_WIN32 */
2230
2231 /*
2232 * Return a host pointer to guest's ram.
2233 * For Xen, foreign mappings get created if they don't already exist.
2234 *
2235 * @block: block for the RAM to lookup (optional and may be NULL).
2236 * @addr: address within the memory region.
2237 * @size: pointer to requested size (optional and may be NULL).
2238 * size may get modified and return a value smaller than
2239 * what was requested.
2240 * @lock: wether to lock the mapping in xen-mapcache until invalidated.
2241 * @is_write: hint wether to map RW or RO in the xen-mapcache.
2242 * (optional and may always be set to true).
2243 *
2244 * Called within RCU critical section.
2245 */
qemu_ram_ptr_length(RAMBlock * block,ram_addr_t addr,hwaddr * size,bool lock,bool is_write)2246 static void *qemu_ram_ptr_length(RAMBlock *block, ram_addr_t addr,
2247 hwaddr *size, bool lock,
2248 bool is_write)
2249 {
2250 hwaddr len = 0;
2251
2252 if (size && *size == 0) {
2253 return NULL;
2254 }
2255
2256 if (block == NULL) {
2257 block = qemu_get_ram_block(addr);
2258 addr -= block->offset;
2259 }
2260 if (size) {
2261 *size = MIN(*size, block->max_length - addr);
2262 len = *size;
2263 }
2264
2265 if (xen_enabled() && block->host == NULL) {
2266 /* We need to check if the requested address is in the RAM
2267 * because we don't want to map the entire memory in QEMU.
2268 * In that case just map the requested area.
2269 */
2270 if (xen_mr_is_memory(block->mr)) {
2271 return xen_map_cache(block->mr, block->offset + addr,
2272 len, block->offset,
2273 lock, lock, is_write);
2274 }
2275
2276 block->host = xen_map_cache(block->mr, block->offset,
2277 block->max_length,
2278 block->offset,
2279 1, lock, is_write);
2280 }
2281
2282 return ramblock_ptr(block, addr);
2283 }
2284
2285 /*
2286 * Return a host pointer to ram allocated with qemu_ram_alloc.
2287 * This should not be used for general purpose DMA. Use address_space_map
2288 * or address_space_rw instead. For local memory (e.g. video ram) that the
2289 * device owns, use memory_region_get_ram_ptr.
2290 *
2291 * Called within RCU critical section.
2292 */
qemu_map_ram_ptr(RAMBlock * ram_block,ram_addr_t addr)2293 void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr)
2294 {
2295 return qemu_ram_ptr_length(ram_block, addr, NULL, false, true);
2296 }
2297
2298 /* Return the offset of a hostpointer within a ramblock */
qemu_ram_block_host_offset(RAMBlock * rb,void * host)2299 ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host)
2300 {
2301 ram_addr_t res = (uint8_t *)host - (uint8_t *)rb->host;
2302 assert((uintptr_t)host >= (uintptr_t)rb->host);
2303 assert(res < rb->max_length);
2304
2305 return res;
2306 }
2307
qemu_ram_block_from_host(void * ptr,bool round_offset,ram_addr_t * offset)2308 RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
2309 ram_addr_t *offset)
2310 {
2311 RAMBlock *block;
2312 uint8_t *host = ptr;
2313
2314 if (xen_enabled()) {
2315 ram_addr_t ram_addr;
2316 RCU_READ_LOCK_GUARD();
2317 ram_addr = xen_ram_addr_from_mapcache(ptr);
2318 if (ram_addr == RAM_ADDR_INVALID) {
2319 return NULL;
2320 }
2321
2322 block = qemu_get_ram_block(ram_addr);
2323 if (block) {
2324 *offset = ram_addr - block->offset;
2325 }
2326 return block;
2327 }
2328
2329 RCU_READ_LOCK_GUARD();
2330 block = qatomic_rcu_read(&ram_list.mru_block);
2331 if (block && block->host && host - block->host < block->max_length) {
2332 goto found;
2333 }
2334
2335 RAMBLOCK_FOREACH(block) {
2336 /* This case append when the block is not mapped. */
2337 if (block->host == NULL) {
2338 continue;
2339 }
2340 if (host - block->host < block->max_length) {
2341 goto found;
2342 }
2343 }
2344
2345 return NULL;
2346
2347 found:
2348 *offset = (host - block->host);
2349 if (round_offset) {
2350 *offset &= TARGET_PAGE_MASK;
2351 }
2352 return block;
2353 }
2354
2355 /*
2356 * Finds the named RAMBlock
2357 *
2358 * name: The name of RAMBlock to find
2359 *
2360 * Returns: RAMBlock (or NULL if not found)
2361 */
qemu_ram_block_by_name(const char * name)2362 RAMBlock *qemu_ram_block_by_name(const char *name)
2363 {
2364 RAMBlock *block;
2365
2366 RAMBLOCK_FOREACH(block) {
2367 if (!strcmp(name, block->idstr)) {
2368 return block;
2369 }
2370 }
2371
2372 return NULL;
2373 }
2374
2375 /*
2376 * Some of the system routines need to translate from a host pointer
2377 * (typically a TLB entry) back to a ram offset.
2378 */
qemu_ram_addr_from_host(void * ptr)2379 ram_addr_t qemu_ram_addr_from_host(void *ptr)
2380 {
2381 RAMBlock *block;
2382 ram_addr_t offset;
2383
2384 block = qemu_ram_block_from_host(ptr, false, &offset);
2385 if (!block) {
2386 return RAM_ADDR_INVALID;
2387 }
2388
2389 return block->offset + offset;
2390 }
2391
qemu_ram_addr_from_host_nofail(void * ptr)2392 ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr)
2393 {
2394 ram_addr_t ram_addr;
2395
2396 ram_addr = qemu_ram_addr_from_host(ptr);
2397 if (ram_addr == RAM_ADDR_INVALID) {
2398 error_report("Bad ram pointer %p", ptr);
2399 abort();
2400 }
2401 return ram_addr;
2402 }
2403
2404 static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
2405 MemTxAttrs attrs, void *buf, hwaddr len);
2406 static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
2407 const void *buf, hwaddr len);
2408 static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len,
2409 bool is_write, MemTxAttrs attrs);
2410
subpage_read(void * opaque,hwaddr addr,uint64_t * data,unsigned len,MemTxAttrs attrs)2411 static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,
2412 unsigned len, MemTxAttrs attrs)
2413 {
2414 subpage_t *subpage = opaque;
2415 uint8_t buf[8];
2416 MemTxResult res;
2417
2418 #if defined(DEBUG_SUBPAGE)
2419 printf("%s: subpage %p len %u addr " HWADDR_FMT_plx "\n", __func__,
2420 subpage, len, addr);
2421 #endif
2422 res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
2423 if (res) {
2424 return res;
2425 }
2426 *data = ldn_p(buf, len);
2427 return MEMTX_OK;
2428 }
2429
subpage_write(void * opaque,hwaddr addr,uint64_t value,unsigned len,MemTxAttrs attrs)2430 static MemTxResult subpage_write(void *opaque, hwaddr addr,
2431 uint64_t value, unsigned len, MemTxAttrs attrs)
2432 {
2433 subpage_t *subpage = opaque;
2434 uint8_t buf[8];
2435
2436 #if defined(DEBUG_SUBPAGE)
2437 printf("%s: subpage %p len %u addr " HWADDR_FMT_plx
2438 " value %"PRIx64"\n",
2439 __func__, subpage, len, addr, value);
2440 #endif
2441 stn_p(buf, len, value);
2442 return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
2443 }
2444
subpage_accepts(void * opaque,hwaddr addr,unsigned len,bool is_write,MemTxAttrs attrs)2445 static bool subpage_accepts(void *opaque, hwaddr addr,
2446 unsigned len, bool is_write,
2447 MemTxAttrs attrs)
2448 {
2449 subpage_t *subpage = opaque;
2450 #if defined(DEBUG_SUBPAGE)
2451 printf("%s: subpage %p %c len %u addr " HWADDR_FMT_plx "\n",
2452 __func__, subpage, is_write ? 'w' : 'r', len, addr);
2453 #endif
2454
2455 return flatview_access_valid(subpage->fv, addr + subpage->base,
2456 len, is_write, attrs);
2457 }
2458
2459 static const MemoryRegionOps subpage_ops = {
2460 .read_with_attrs = subpage_read,
2461 .write_with_attrs = subpage_write,
2462 .impl.min_access_size = 1,
2463 .impl.max_access_size = 8,
2464 .valid.min_access_size = 1,
2465 .valid.max_access_size = 8,
2466 .valid.accepts = subpage_accepts,
2467 .endianness = DEVICE_NATIVE_ENDIAN,
2468 };
2469
subpage_register(subpage_t * mmio,uint32_t start,uint32_t end,uint16_t section)2470 static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
2471 uint16_t section)
2472 {
2473 int idx, eidx;
2474
2475 if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE)
2476 return -1;
2477 idx = SUBPAGE_IDX(start);
2478 eidx = SUBPAGE_IDX(end);
2479 #if defined(DEBUG_SUBPAGE)
2480 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2481 __func__, mmio, start, end, idx, eidx, section);
2482 #endif
2483 for (; idx <= eidx; idx++) {
2484 mmio->sub_section[idx] = section;
2485 }
2486
2487 return 0;
2488 }
2489
subpage_init(FlatView * fv,hwaddr base)2490 static subpage_t *subpage_init(FlatView *fv, hwaddr base)
2491 {
2492 subpage_t *mmio;
2493
2494 /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */
2495 mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
2496 mmio->fv = fv;
2497 mmio->base = base;
2498 memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,
2499 NULL, TARGET_PAGE_SIZE);
2500 mmio->iomem.subpage = true;
2501 #if defined(DEBUG_SUBPAGE)
2502 printf("%s: %p base " HWADDR_FMT_plx " len %08x\n", __func__,
2503 mmio, base, TARGET_PAGE_SIZE);
2504 #endif
2505
2506 return mmio;
2507 }
2508
dummy_section(PhysPageMap * map,FlatView * fv,MemoryRegion * mr)2509 static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr)
2510 {
2511 assert(fv);
2512 MemoryRegionSection section = {
2513 .fv = fv,
2514 .mr = mr,
2515 .offset_within_address_space = 0,
2516 .offset_within_region = 0,
2517 .size = int128_2_64(),
2518 };
2519
2520 return phys_section_add(map, §ion);
2521 }
2522
iotlb_to_section(CPUState * cpu,hwaddr index,MemTxAttrs attrs)2523 MemoryRegionSection *iotlb_to_section(CPUState *cpu,
2524 hwaddr index, MemTxAttrs attrs)
2525 {
2526 int asidx = cpu_asidx_from_attrs(cpu, attrs);
2527 CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
2528 AddressSpaceDispatch *d = cpuas->memory_dispatch;
2529 int section_index = index & ~TARGET_PAGE_MASK;
2530 MemoryRegionSection *ret;
2531
2532 assert(section_index < d->map.sections_nb);
2533 ret = d->map.sections + section_index;
2534 assert(ret->mr);
2535 assert(ret->mr->ops);
2536
2537 return ret;
2538 }
2539
io_mem_init(void)2540 static void io_mem_init(void)
2541 {
2542 memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
2543 NULL, UINT64_MAX);
2544 }
2545
address_space_dispatch_new(FlatView * fv)2546 AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv)
2547 {
2548 AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1);
2549 uint16_t n;
2550
2551 n = dummy_section(&d->map, fv, &io_mem_unassigned);
2552 assert(n == PHYS_SECTION_UNASSIGNED);
2553
2554 d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 };
2555
2556 return d;
2557 }
2558
address_space_dispatch_free(AddressSpaceDispatch * d)2559 void address_space_dispatch_free(AddressSpaceDispatch *d)
2560 {
2561 phys_sections_free(&d->map);
2562 g_free(d);
2563 }
2564
do_nothing(CPUState * cpu,run_on_cpu_data d)2565 static void do_nothing(CPUState *cpu, run_on_cpu_data d)
2566 {
2567 }
2568
tcg_log_global_after_sync(MemoryListener * listener)2569 static void tcg_log_global_after_sync(MemoryListener *listener)
2570 {
2571 CPUAddressSpace *cpuas;
2572
2573 /* Wait for the CPU to end the current TB. This avoids the following
2574 * incorrect race:
2575 *
2576 * vCPU migration
2577 * ---------------------- -------------------------
2578 * TLB check -> slow path
2579 * notdirty_mem_write
2580 * write to RAM
2581 * mark dirty
2582 * clear dirty flag
2583 * TLB check -> fast path
2584 * read memory
2585 * write to RAM
2586 *
2587 * by pushing the migration thread's memory read after the vCPU thread has
2588 * written the memory.
2589 */
2590 if (replay_mode == REPLAY_MODE_NONE) {
2591 /*
2592 * VGA can make calls to this function while updating the screen.
2593 * In record/replay mode this causes a deadlock, because
2594 * run_on_cpu waits for rr mutex. Therefore no races are possible
2595 * in this case and no need for making run_on_cpu when
2596 * record/replay is enabled.
2597 */
2598 cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
2599 run_on_cpu(cpuas->cpu, do_nothing, RUN_ON_CPU_NULL);
2600 }
2601 }
2602
tcg_commit_cpu(CPUState * cpu,run_on_cpu_data data)2603 static void tcg_commit_cpu(CPUState *cpu, run_on_cpu_data data)
2604 {
2605 CPUAddressSpace *cpuas = data.host_ptr;
2606
2607 cpuas->memory_dispatch = address_space_to_dispatch(cpuas->as);
2608 tlb_flush(cpu);
2609 }
2610
tcg_commit(MemoryListener * listener)2611 static void tcg_commit(MemoryListener *listener)
2612 {
2613 CPUAddressSpace *cpuas;
2614 CPUState *cpu;
2615
2616 assert(tcg_enabled());
2617 /* since each CPU stores ram addresses in its TLB cache, we must
2618 reset the modified entries */
2619 cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
2620 cpu = cpuas->cpu;
2621
2622 /*
2623 * Defer changes to as->memory_dispatch until the cpu is quiescent.
2624 * Otherwise we race between (1) other cpu threads and (2) ongoing
2625 * i/o for the current cpu thread, with data cached by mmu_lookup().
2626 *
2627 * In addition, queueing the work function will kick the cpu back to
2628 * the main loop, which will end the RCU critical section and reclaim
2629 * the memory data structures.
2630 *
2631 * That said, the listener is also called during realize, before
2632 * all of the tcg machinery for run-on is initialized: thus halt_cond.
2633 */
2634 if (cpu->halt_cond) {
2635 async_run_on_cpu(cpu, tcg_commit_cpu, RUN_ON_CPU_HOST_PTR(cpuas));
2636 } else {
2637 tcg_commit_cpu(cpu, RUN_ON_CPU_HOST_PTR(cpuas));
2638 }
2639 }
2640
memory_map_init(void)2641 static void memory_map_init(void)
2642 {
2643 system_memory = g_malloc(sizeof(*system_memory));
2644
2645 memory_region_init(system_memory, NULL, "system", UINT64_MAX);
2646 address_space_init(&address_space_memory, system_memory, "memory");
2647
2648 system_io = g_malloc(sizeof(*system_io));
2649 memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io",
2650 65536);
2651 address_space_init(&address_space_io, system_io, "I/O");
2652 }
2653
get_system_memory(void)2654 MemoryRegion *get_system_memory(void)
2655 {
2656 return system_memory;
2657 }
2658
get_system_io(void)2659 MemoryRegion *get_system_io(void)
2660 {
2661 return system_io;
2662 }
2663
invalidate_and_set_dirty(MemoryRegion * mr,hwaddr addr,hwaddr length)2664 static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr,
2665 hwaddr length)
2666 {
2667 uint8_t dirty_log_mask = memory_region_get_dirty_log_mask(mr);
2668 ram_addr_t ramaddr = memory_region_get_ram_addr(mr);
2669
2670 /* We know we're only called for RAM MemoryRegions */
2671 assert(ramaddr != RAM_ADDR_INVALID);
2672 addr += ramaddr;
2673
2674 /* No early return if dirty_log_mask is or becomes 0, because
2675 * cpu_physical_memory_set_dirty_range will still call
2676 * xen_modified_memory.
2677 */
2678 if (dirty_log_mask) {
2679 dirty_log_mask =
2680 cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask);
2681 }
2682 if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) {
2683 assert(tcg_enabled());
2684 tb_invalidate_phys_range(addr, addr + length - 1);
2685 dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
2686 }
2687 cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
2688 }
2689
memory_region_flush_rom_device(MemoryRegion * mr,hwaddr addr,hwaddr size)2690 void memory_region_flush_rom_device(MemoryRegion *mr, hwaddr addr, hwaddr size)
2691 {
2692 /*
2693 * In principle this function would work on other memory region types too,
2694 * but the ROM device use case is the only one where this operation is
2695 * necessary. Other memory regions should use the
2696 * address_space_read/write() APIs.
2697 */
2698 assert(memory_region_is_romd(mr));
2699
2700 invalidate_and_set_dirty(mr, addr, size);
2701 }
2702
memory_access_size(MemoryRegion * mr,unsigned l,hwaddr addr)2703 int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
2704 {
2705 unsigned access_size_max = mr->ops->valid.max_access_size;
2706
2707 /* Regions are assumed to support 1-4 byte accesses unless
2708 otherwise specified. */
2709 if (access_size_max == 0) {
2710 access_size_max = 4;
2711 }
2712
2713 /* Bound the maximum access by the alignment of the address. */
2714 if (!mr->ops->impl.unaligned) {
2715 unsigned align_size_max = addr & -addr;
2716 if (align_size_max != 0 && align_size_max < access_size_max) {
2717 access_size_max = align_size_max;
2718 }
2719 }
2720
2721 /* Don't attempt accesses larger than the maximum. */
2722 if (l > access_size_max) {
2723 l = access_size_max;
2724 }
2725 l = pow2floor(l);
2726
2727 return l;
2728 }
2729
prepare_mmio_access(MemoryRegion * mr)2730 bool prepare_mmio_access(MemoryRegion *mr)
2731 {
2732 bool release_lock = false;
2733
2734 if (!bql_locked()) {
2735 bql_lock();
2736 release_lock = true;
2737 }
2738 if (mr->flush_coalesced_mmio) {
2739 qemu_flush_coalesced_mmio_buffer();
2740 }
2741
2742 return release_lock;
2743 }
2744
2745 /**
2746 * flatview_access_allowed
2747 * @mr: #MemoryRegion to be accessed
2748 * @attrs: memory transaction attributes
2749 * @addr: address within that memory region
2750 * @len: the number of bytes to access
2751 *
2752 * Check if a memory transaction is allowed.
2753 *
2754 * Returns: true if transaction is allowed, false if denied.
2755 */
flatview_access_allowed(MemoryRegion * mr,MemTxAttrs attrs,hwaddr addr,hwaddr len)2756 static bool flatview_access_allowed(MemoryRegion *mr, MemTxAttrs attrs,
2757 hwaddr addr, hwaddr len)
2758 {
2759 if (likely(!attrs.memory)) {
2760 return true;
2761 }
2762 if (memory_region_is_ram(mr)) {
2763 return true;
2764 }
2765 qemu_log_mask(LOG_GUEST_ERROR,
2766 "Invalid access to non-RAM device at "
2767 "addr 0x%" HWADDR_PRIX ", size %" HWADDR_PRIu ", "
2768 "region '%s'\n", addr, len, memory_region_name(mr));
2769 return false;
2770 }
2771
flatview_write_continue_step(MemTxAttrs attrs,const uint8_t * buf,hwaddr len,hwaddr mr_addr,hwaddr * l,MemoryRegion * mr)2772 static MemTxResult flatview_write_continue_step(MemTxAttrs attrs,
2773 const uint8_t *buf,
2774 hwaddr len, hwaddr mr_addr,
2775 hwaddr *l, MemoryRegion *mr)
2776 {
2777 if (!flatview_access_allowed(mr, attrs, mr_addr, *l)) {
2778 return MEMTX_ACCESS_ERROR;
2779 }
2780
2781 if (!memory_access_is_direct(mr, true)) {
2782 uint64_t val;
2783 MemTxResult result;
2784 bool release_lock = prepare_mmio_access(mr);
2785
2786 *l = memory_access_size(mr, *l, mr_addr);
2787 /*
2788 * XXX: could force current_cpu to NULL to avoid
2789 * potential bugs
2790 */
2791
2792 /*
2793 * Assure Coverity (and ourselves) that we are not going to OVERRUN
2794 * the buffer by following ldn_he_p().
2795 */
2796 #ifdef QEMU_STATIC_ANALYSIS
2797 assert((*l == 1 && len >= 1) ||
2798 (*l == 2 && len >= 2) ||
2799 (*l == 4 && len >= 4) ||
2800 (*l == 8 && len >= 8));
2801 #endif
2802 val = ldn_he_p(buf, *l);
2803 result = memory_region_dispatch_write(mr, mr_addr, val,
2804 size_memop(*l), attrs);
2805 if (release_lock) {
2806 bql_unlock();
2807 }
2808
2809 return result;
2810 } else {
2811 /* RAM case */
2812 uint8_t *ram_ptr = qemu_ram_ptr_length(mr->ram_block, mr_addr, l,
2813 false, true);
2814
2815 memmove(ram_ptr, buf, *l);
2816 invalidate_and_set_dirty(mr, mr_addr, *l);
2817
2818 return MEMTX_OK;
2819 }
2820 }
2821
2822 /* Called within RCU critical section. */
flatview_write_continue(FlatView * fv,hwaddr addr,MemTxAttrs attrs,const void * ptr,hwaddr len,hwaddr mr_addr,hwaddr l,MemoryRegion * mr)2823 static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,
2824 MemTxAttrs attrs,
2825 const void *ptr,
2826 hwaddr len, hwaddr mr_addr,
2827 hwaddr l, MemoryRegion *mr)
2828 {
2829 MemTxResult result = MEMTX_OK;
2830 const uint8_t *buf = ptr;
2831
2832 for (;;) {
2833 result |= flatview_write_continue_step(attrs, buf, len, mr_addr, &l,
2834 mr);
2835
2836 len -= l;
2837 buf += l;
2838 addr += l;
2839
2840 if (!len) {
2841 break;
2842 }
2843
2844 l = len;
2845 mr = flatview_translate(fv, addr, &mr_addr, &l, true, attrs);
2846 }
2847
2848 return result;
2849 }
2850
2851 /* Called from RCU critical section. */
flatview_write(FlatView * fv,hwaddr addr,MemTxAttrs attrs,const void * buf,hwaddr len)2852 static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
2853 const void *buf, hwaddr len)
2854 {
2855 hwaddr l;
2856 hwaddr mr_addr;
2857 MemoryRegion *mr;
2858
2859 l = len;
2860 mr = flatview_translate(fv, addr, &mr_addr, &l, true, attrs);
2861 if (!flatview_access_allowed(mr, attrs, addr, len)) {
2862 return MEMTX_ACCESS_ERROR;
2863 }
2864 return flatview_write_continue(fv, addr, attrs, buf, len,
2865 mr_addr, l, mr);
2866 }
2867
flatview_read_continue_step(MemTxAttrs attrs,uint8_t * buf,hwaddr len,hwaddr mr_addr,hwaddr * l,MemoryRegion * mr)2868 static MemTxResult flatview_read_continue_step(MemTxAttrs attrs, uint8_t *buf,
2869 hwaddr len, hwaddr mr_addr,
2870 hwaddr *l,
2871 MemoryRegion *mr)
2872 {
2873 if (!flatview_access_allowed(mr, attrs, mr_addr, *l)) {
2874 return MEMTX_ACCESS_ERROR;
2875 }
2876
2877 if (!memory_access_is_direct(mr, false)) {
2878 /* I/O case */
2879 uint64_t val;
2880 MemTxResult result;
2881 bool release_lock = prepare_mmio_access(mr);
2882
2883 *l = memory_access_size(mr, *l, mr_addr);
2884 result = memory_region_dispatch_read(mr, mr_addr, &val, size_memop(*l),
2885 attrs);
2886
2887 /*
2888 * Assure Coverity (and ourselves) that we are not going to OVERRUN
2889 * the buffer by following stn_he_p().
2890 */
2891 #ifdef QEMU_STATIC_ANALYSIS
2892 assert((*l == 1 && len >= 1) ||
2893 (*l == 2 && len >= 2) ||
2894 (*l == 4 && len >= 4) ||
2895 (*l == 8 && len >= 8));
2896 #endif
2897 stn_he_p(buf, *l, val);
2898
2899 if (release_lock) {
2900 bql_unlock();
2901 }
2902 return result;
2903 } else {
2904 /* RAM case */
2905 uint8_t *ram_ptr = qemu_ram_ptr_length(mr->ram_block, mr_addr, l,
2906 false, false);
2907
2908 memcpy(buf, ram_ptr, *l);
2909
2910 return MEMTX_OK;
2911 }
2912 }
2913
2914 /* Called within RCU critical section. */
flatview_read_continue(FlatView * fv,hwaddr addr,MemTxAttrs attrs,void * ptr,hwaddr len,hwaddr mr_addr,hwaddr l,MemoryRegion * mr)2915 MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
2916 MemTxAttrs attrs, void *ptr,
2917 hwaddr len, hwaddr mr_addr, hwaddr l,
2918 MemoryRegion *mr)
2919 {
2920 MemTxResult result = MEMTX_OK;
2921 uint8_t *buf = ptr;
2922
2923 fuzz_dma_read_cb(addr, len, mr);
2924 for (;;) {
2925 result |= flatview_read_continue_step(attrs, buf, len, mr_addr, &l, mr);
2926
2927 len -= l;
2928 buf += l;
2929 addr += l;
2930
2931 if (!len) {
2932 break;
2933 }
2934
2935 l = len;
2936 mr = flatview_translate(fv, addr, &mr_addr, &l, false, attrs);
2937 }
2938
2939 return result;
2940 }
2941
2942 /* Called from RCU critical section. */
flatview_read(FlatView * fv,hwaddr addr,MemTxAttrs attrs,void * buf,hwaddr len)2943 static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
2944 MemTxAttrs attrs, void *buf, hwaddr len)
2945 {
2946 hwaddr l;
2947 hwaddr mr_addr;
2948 MemoryRegion *mr;
2949
2950 l = len;
2951 mr = flatview_translate(fv, addr, &mr_addr, &l, false, attrs);
2952 if (!flatview_access_allowed(mr, attrs, addr, len)) {
2953 return MEMTX_ACCESS_ERROR;
2954 }
2955 return flatview_read_continue(fv, addr, attrs, buf, len,
2956 mr_addr, l, mr);
2957 }
2958
address_space_read_full(AddressSpace * as,hwaddr addr,MemTxAttrs attrs,void * buf,hwaddr len)2959 MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
2960 MemTxAttrs attrs, void *buf, hwaddr len)
2961 {
2962 MemTxResult result = MEMTX_OK;
2963 FlatView *fv;
2964
2965 if (len > 0) {
2966 RCU_READ_LOCK_GUARD();
2967 fv = address_space_to_flatview(as);
2968 result = flatview_read(fv, addr, attrs, buf, len);
2969 }
2970
2971 return result;
2972 }
2973
address_space_write(AddressSpace * as,hwaddr addr,MemTxAttrs attrs,const void * buf,hwaddr len)2974 MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
2975 MemTxAttrs attrs,
2976 const void *buf, hwaddr len)
2977 {
2978 MemTxResult result = MEMTX_OK;
2979 FlatView *fv;
2980
2981 if (len > 0) {
2982 RCU_READ_LOCK_GUARD();
2983 fv = address_space_to_flatview(as);
2984 result = flatview_write(fv, addr, attrs, buf, len);
2985 }
2986
2987 return result;
2988 }
2989
address_space_rw(AddressSpace * as,hwaddr addr,MemTxAttrs attrs,void * buf,hwaddr len,bool is_write)2990 MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
2991 void *buf, hwaddr len, bool is_write)
2992 {
2993 if (is_write) {
2994 return address_space_write(as, addr, attrs, buf, len);
2995 } else {
2996 return address_space_read_full(as, addr, attrs, buf, len);
2997 }
2998 }
2999
address_space_set(AddressSpace * as,hwaddr addr,uint8_t c,hwaddr len,MemTxAttrs attrs)3000 MemTxResult address_space_set(AddressSpace *as, hwaddr addr,
3001 uint8_t c, hwaddr len, MemTxAttrs attrs)
3002 {
3003 #define FILLBUF_SIZE 512
3004 uint8_t fillbuf[FILLBUF_SIZE];
3005 int l;
3006 MemTxResult error = MEMTX_OK;
3007
3008 memset(fillbuf, c, FILLBUF_SIZE);
3009 while (len > 0) {
3010 l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE;
3011 error |= address_space_write(as, addr, attrs, fillbuf, l);
3012 len -= l;
3013 addr += l;
3014 }
3015
3016 return error;
3017 }
3018
cpu_physical_memory_rw(hwaddr addr,void * buf,hwaddr len,bool is_write)3019 void cpu_physical_memory_rw(hwaddr addr, void *buf,
3020 hwaddr len, bool is_write)
3021 {
3022 address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
3023 buf, len, is_write);
3024 }
3025
3026 enum write_rom_type {
3027 WRITE_DATA,
3028 FLUSH_CACHE,
3029 };
3030
address_space_write_rom_internal(AddressSpace * as,hwaddr addr,MemTxAttrs attrs,const void * ptr,hwaddr len,enum write_rom_type type)3031 static inline MemTxResult address_space_write_rom_internal(AddressSpace *as,
3032 hwaddr addr,
3033 MemTxAttrs attrs,
3034 const void *ptr,
3035 hwaddr len,
3036 enum write_rom_type type)
3037 {
3038 hwaddr l;
3039 uint8_t *ram_ptr;
3040 hwaddr addr1;
3041 MemoryRegion *mr;
3042 const uint8_t *buf = ptr;
3043
3044 RCU_READ_LOCK_GUARD();
3045 while (len > 0) {
3046 l = len;
3047 mr = address_space_translate(as, addr, &addr1, &l, true, attrs);
3048
3049 if (!(memory_region_is_ram(mr) ||
3050 memory_region_is_romd(mr))) {
3051 l = memory_access_size(mr, l, addr1);
3052 } else {
3053 /* ROM/RAM case */
3054 ram_ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
3055 switch (type) {
3056 case WRITE_DATA:
3057 memcpy(ram_ptr, buf, l);
3058 invalidate_and_set_dirty(mr, addr1, l);
3059 break;
3060 case FLUSH_CACHE:
3061 flush_idcache_range((uintptr_t)ram_ptr, (uintptr_t)ram_ptr, l);
3062 break;
3063 }
3064 }
3065 len -= l;
3066 buf += l;
3067 addr += l;
3068 }
3069 return MEMTX_OK;
3070 }
3071
3072 /* used for ROM loading : can write in RAM and ROM */
address_space_write_rom(AddressSpace * as,hwaddr addr,MemTxAttrs attrs,const void * buf,hwaddr len)3073 MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
3074 MemTxAttrs attrs,
3075 const void *buf, hwaddr len)
3076 {
3077 return address_space_write_rom_internal(as, addr, attrs,
3078 buf, len, WRITE_DATA);
3079 }
3080
cpu_flush_icache_range(hwaddr start,hwaddr len)3081 void cpu_flush_icache_range(hwaddr start, hwaddr len)
3082 {
3083 /*
3084 * This function should do the same thing as an icache flush that was
3085 * triggered from within the guest. For TCG we are always cache coherent,
3086 * so there is no need to flush anything. For KVM / Xen we need to flush
3087 * the host's instruction cache at least.
3088 */
3089 if (tcg_enabled()) {
3090 return;
3091 }
3092
3093 address_space_write_rom_internal(&address_space_memory,
3094 start, MEMTXATTRS_UNSPECIFIED,
3095 NULL, len, FLUSH_CACHE);
3096 }
3097
3098 static void
address_space_unregister_map_client_do(AddressSpaceMapClient * client)3099 address_space_unregister_map_client_do(AddressSpaceMapClient *client)
3100 {
3101 QLIST_REMOVE(client, link);
3102 g_free(client);
3103 }
3104
address_space_notify_map_clients_locked(AddressSpace * as)3105 static void address_space_notify_map_clients_locked(AddressSpace *as)
3106 {
3107 AddressSpaceMapClient *client;
3108
3109 while (!QLIST_EMPTY(&as->map_client_list)) {
3110 client = QLIST_FIRST(&as->map_client_list);
3111 qemu_bh_schedule(client->bh);
3112 address_space_unregister_map_client_do(client);
3113 }
3114 }
3115
address_space_register_map_client(AddressSpace * as,QEMUBH * bh)3116 void address_space_register_map_client(AddressSpace *as, QEMUBH *bh)
3117 {
3118 AddressSpaceMapClient *client = g_malloc(sizeof(*client));
3119
3120 QEMU_LOCK_GUARD(&as->map_client_list_lock);
3121 client->bh = bh;
3122 QLIST_INSERT_HEAD(&as->map_client_list, client, link);
3123 /* Write map_client_list before reading in_use. */
3124 smp_mb();
3125 if (!qatomic_read(&as->bounce.in_use)) {
3126 address_space_notify_map_clients_locked(as);
3127 }
3128 }
3129
cpu_exec_init_all(void)3130 void cpu_exec_init_all(void)
3131 {
3132 qemu_mutex_init(&ram_list.mutex);
3133 /* The data structures we set up here depend on knowing the page size,
3134 * so no more changes can be made after this point.
3135 * In an ideal world, nothing we did before we had finished the
3136 * machine setup would care about the target page size, and we could
3137 * do this much later, rather than requiring board models to state
3138 * up front what their requirements are.
3139 */
3140 finalize_target_page_bits();
3141 io_mem_init();
3142 memory_map_init();
3143 }
3144
address_space_unregister_map_client(AddressSpace * as,QEMUBH * bh)3145 void address_space_unregister_map_client(AddressSpace *as, QEMUBH *bh)
3146 {
3147 AddressSpaceMapClient *client;
3148
3149 QEMU_LOCK_GUARD(&as->map_client_list_lock);
3150 QLIST_FOREACH(client, &as->map_client_list, link) {
3151 if (client->bh == bh) {
3152 address_space_unregister_map_client_do(client);
3153 break;
3154 }
3155 }
3156 }
3157
address_space_notify_map_clients(AddressSpace * as)3158 static void address_space_notify_map_clients(AddressSpace *as)
3159 {
3160 QEMU_LOCK_GUARD(&as->map_client_list_lock);
3161 address_space_notify_map_clients_locked(as);
3162 }
3163
flatview_access_valid(FlatView * fv,hwaddr addr,hwaddr len,bool is_write,MemTxAttrs attrs)3164 static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len,
3165 bool is_write, MemTxAttrs attrs)
3166 {
3167 MemoryRegion *mr;
3168 hwaddr l, xlat;
3169
3170 while (len > 0) {
3171 l = len;
3172 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
3173 if (!memory_access_is_direct(mr, is_write)) {
3174 l = memory_access_size(mr, l, addr);
3175 if (!memory_region_access_valid(mr, xlat, l, is_write, attrs)) {
3176 return false;
3177 }
3178 }
3179
3180 len -= l;
3181 addr += l;
3182 }
3183 return true;
3184 }
3185
address_space_access_valid(AddressSpace * as,hwaddr addr,hwaddr len,bool is_write,MemTxAttrs attrs)3186 bool address_space_access_valid(AddressSpace *as, hwaddr addr,
3187 hwaddr len, bool is_write,
3188 MemTxAttrs attrs)
3189 {
3190 FlatView *fv;
3191
3192 RCU_READ_LOCK_GUARD();
3193 fv = address_space_to_flatview(as);
3194 return flatview_access_valid(fv, addr, len, is_write, attrs);
3195 }
3196
3197 static hwaddr
flatview_extend_translation(FlatView * fv,hwaddr addr,hwaddr target_len,MemoryRegion * mr,hwaddr base,hwaddr len,bool is_write,MemTxAttrs attrs)3198 flatview_extend_translation(FlatView *fv, hwaddr addr,
3199 hwaddr target_len,
3200 MemoryRegion *mr, hwaddr base, hwaddr len,
3201 bool is_write, MemTxAttrs attrs)
3202 {
3203 hwaddr done = 0;
3204 hwaddr xlat;
3205 MemoryRegion *this_mr;
3206
3207 for (;;) {
3208 target_len -= len;
3209 addr += len;
3210 done += len;
3211 if (target_len == 0) {
3212 return done;
3213 }
3214
3215 len = target_len;
3216 this_mr = flatview_translate(fv, addr, &xlat,
3217 &len, is_write, attrs);
3218 if (this_mr != mr || xlat != base + done) {
3219 return done;
3220 }
3221 }
3222 }
3223
3224 /* Map a physical memory region into a host virtual address.
3225 * May map a subset of the requested range, given by and returned in *plen.
3226 * May return NULL if resources needed to perform the mapping are exhausted.
3227 * Use only for reads OR writes - not for read-modify-write operations.
3228 * Use address_space_register_map_client() to know when retrying the map
3229 * operation is likely to succeed.
3230 */
address_space_map(AddressSpace * as,hwaddr addr,hwaddr * plen,bool is_write,MemTxAttrs attrs)3231 void *address_space_map(AddressSpace *as,
3232 hwaddr addr,
3233 hwaddr *plen,
3234 bool is_write,
3235 MemTxAttrs attrs)
3236 {
3237 hwaddr len = *plen;
3238 hwaddr l, xlat;
3239 MemoryRegion *mr;
3240 FlatView *fv;
3241
3242 trace_address_space_map(as, addr, len, is_write, *(uint32_t *) &attrs);
3243
3244 if (len == 0) {
3245 return NULL;
3246 }
3247
3248 l = len;
3249 RCU_READ_LOCK_GUARD();
3250 fv = address_space_to_flatview(as);
3251 mr = flatview_translate(fv, addr, &xlat, &l, is_write, attrs);
3252
3253 if (!memory_access_is_direct(mr, is_write)) {
3254 if (qatomic_xchg(&as->bounce.in_use, true)) {
3255 *plen = 0;
3256 return NULL;
3257 }
3258 /* Avoid unbounded allocations */
3259 l = MIN(l, TARGET_PAGE_SIZE);
3260 as->bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l);
3261 as->bounce.addr = addr;
3262 as->bounce.len = l;
3263
3264 memory_region_ref(mr);
3265 as->bounce.mr = mr;
3266 if (!is_write) {
3267 flatview_read(fv, addr, MEMTXATTRS_UNSPECIFIED,
3268 as->bounce.buffer, l);
3269 }
3270
3271 *plen = l;
3272 return as->bounce.buffer;
3273 }
3274
3275
3276 memory_region_ref(mr);
3277 *plen = flatview_extend_translation(fv, addr, len, mr, xlat,
3278 l, is_write, attrs);
3279 fuzz_dma_read_cb(addr, *plen, mr);
3280 return qemu_ram_ptr_length(mr->ram_block, xlat, plen, true, is_write);
3281 }
3282
3283 /* Unmaps a memory region previously mapped by address_space_map().
3284 * Will also mark the memory as dirty if is_write is true. access_len gives
3285 * the amount of memory that was actually read or written by the caller.
3286 */
address_space_unmap(AddressSpace * as,void * buffer,hwaddr len,bool is_write,hwaddr access_len)3287 void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
3288 bool is_write, hwaddr access_len)
3289 {
3290 if (buffer != as->bounce.buffer) {
3291 MemoryRegion *mr;
3292 ram_addr_t addr1;
3293
3294 mr = memory_region_from_host(buffer, &addr1);
3295 assert(mr != NULL);
3296 if (is_write) {
3297 invalidate_and_set_dirty(mr, addr1, access_len);
3298 }
3299 if (xen_enabled()) {
3300 xen_invalidate_map_cache_entry(buffer);
3301 }
3302 memory_region_unref(mr);
3303 return;
3304 }
3305 if (is_write) {
3306 address_space_write(as, as->bounce.addr, MEMTXATTRS_UNSPECIFIED,
3307 as->bounce.buffer, access_len);
3308 }
3309 qemu_vfree(as->bounce.buffer);
3310 as->bounce.buffer = NULL;
3311 memory_region_unref(as->bounce.mr);
3312 /* Clear in_use before reading map_client_list. */
3313 qatomic_set_mb(&as->bounce.in_use, false);
3314 address_space_notify_map_clients(as);
3315 }
3316
cpu_physical_memory_map(hwaddr addr,hwaddr * plen,bool is_write)3317 void *cpu_physical_memory_map(hwaddr addr,
3318 hwaddr *plen,
3319 bool is_write)
3320 {
3321 return address_space_map(&address_space_memory, addr, plen, is_write,
3322 MEMTXATTRS_UNSPECIFIED);
3323 }
3324
cpu_physical_memory_unmap(void * buffer,hwaddr len,bool is_write,hwaddr access_len)3325 void cpu_physical_memory_unmap(void *buffer, hwaddr len,
3326 bool is_write, hwaddr access_len)
3327 {
3328 return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len);
3329 }
3330
3331 #define ARG1_DECL AddressSpace *as
3332 #define ARG1 as
3333 #define SUFFIX
3334 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3335 #define RCU_READ_LOCK(...) rcu_read_lock()
3336 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3337 #include "memory_ldst.c.inc"
3338
address_space_cache_init(MemoryRegionCache * cache,AddressSpace * as,hwaddr addr,hwaddr len,bool is_write)3339 int64_t address_space_cache_init(MemoryRegionCache *cache,
3340 AddressSpace *as,
3341 hwaddr addr,
3342 hwaddr len,
3343 bool is_write)
3344 {
3345 AddressSpaceDispatch *d;
3346 hwaddr l;
3347 MemoryRegion *mr;
3348 Int128 diff;
3349
3350 assert(len > 0);
3351
3352 l = len;
3353 cache->fv = address_space_get_flatview(as);
3354 d = flatview_to_dispatch(cache->fv);
3355 cache->mrs = *address_space_translate_internal(d, addr, &cache->xlat, &l, true);
3356
3357 /*
3358 * cache->xlat is now relative to cache->mrs.mr, not to the section itself.
3359 * Take that into account to compute how many bytes are there between
3360 * cache->xlat and the end of the section.
3361 */
3362 diff = int128_sub(cache->mrs.size,
3363 int128_make64(cache->xlat - cache->mrs.offset_within_region));
3364 l = int128_get64(int128_min(diff, int128_make64(l)));
3365
3366 mr = cache->mrs.mr;
3367 memory_region_ref(mr);
3368 if (memory_access_is_direct(mr, is_write)) {
3369 /* We don't care about the memory attributes here as we're only
3370 * doing this if we found actual RAM, which behaves the same
3371 * regardless of attributes; so UNSPECIFIED is fine.
3372 */
3373 l = flatview_extend_translation(cache->fv, addr, len, mr,
3374 cache->xlat, l, is_write,
3375 MEMTXATTRS_UNSPECIFIED);
3376 cache->ptr = qemu_ram_ptr_length(mr->ram_block, cache->xlat, &l, true,
3377 is_write);
3378 } else {
3379 cache->ptr = NULL;
3380 }
3381
3382 cache->len = l;
3383 cache->is_write = is_write;
3384 return l;
3385 }
3386
address_space_cache_invalidate(MemoryRegionCache * cache,hwaddr addr,hwaddr access_len)3387 void address_space_cache_invalidate(MemoryRegionCache *cache,
3388 hwaddr addr,
3389 hwaddr access_len)
3390 {
3391 assert(cache->is_write);
3392 if (likely(cache->ptr)) {
3393 invalidate_and_set_dirty(cache->mrs.mr, addr + cache->xlat, access_len);
3394 }
3395 }
3396
address_space_cache_destroy(MemoryRegionCache * cache)3397 void address_space_cache_destroy(MemoryRegionCache *cache)
3398 {
3399 if (!cache->mrs.mr) {
3400 return;
3401 }
3402
3403 if (xen_enabled()) {
3404 xen_invalidate_map_cache_entry(cache->ptr);
3405 }
3406 memory_region_unref(cache->mrs.mr);
3407 flatview_unref(cache->fv);
3408 cache->mrs.mr = NULL;
3409 cache->fv = NULL;
3410 }
3411
3412 /* Called from RCU critical section. This function has the same
3413 * semantics as address_space_translate, but it only works on a
3414 * predefined range of a MemoryRegion that was mapped with
3415 * address_space_cache_init.
3416 */
address_space_translate_cached(MemoryRegionCache * cache,hwaddr addr,hwaddr * xlat,hwaddr * plen,bool is_write,MemTxAttrs attrs)3417 static inline MemoryRegion *address_space_translate_cached(
3418 MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
3419 hwaddr *plen, bool is_write, MemTxAttrs attrs)
3420 {
3421 MemoryRegionSection section;
3422 MemoryRegion *mr;
3423 IOMMUMemoryRegion *iommu_mr;
3424 AddressSpace *target_as;
3425
3426 assert(!cache->ptr);
3427 *xlat = addr + cache->xlat;
3428
3429 mr = cache->mrs.mr;
3430 iommu_mr = memory_region_get_iommu(mr);
3431 if (!iommu_mr) {
3432 /* MMIO region. */
3433 return mr;
3434 }
3435
3436 section = address_space_translate_iommu(iommu_mr, xlat, plen,
3437 NULL, is_write, true,
3438 &target_as, attrs);
3439 return section.mr;
3440 }
3441
3442 /* Called within RCU critical section. */
address_space_write_continue_cached(MemTxAttrs attrs,const void * ptr,hwaddr len,hwaddr mr_addr,hwaddr l,MemoryRegion * mr)3443 static MemTxResult address_space_write_continue_cached(MemTxAttrs attrs,
3444 const void *ptr,
3445 hwaddr len,
3446 hwaddr mr_addr,
3447 hwaddr l,
3448 MemoryRegion *mr)
3449 {
3450 MemTxResult result = MEMTX_OK;
3451 const uint8_t *buf = ptr;
3452
3453 for (;;) {
3454 result |= flatview_write_continue_step(attrs, buf, len, mr_addr, &l,
3455 mr);
3456
3457 len -= l;
3458 buf += l;
3459 mr_addr += l;
3460
3461 if (!len) {
3462 break;
3463 }
3464
3465 l = len;
3466 }
3467
3468 return result;
3469 }
3470
3471 /* Called within RCU critical section. */
address_space_read_continue_cached(MemTxAttrs attrs,void * ptr,hwaddr len,hwaddr mr_addr,hwaddr l,MemoryRegion * mr)3472 static MemTxResult address_space_read_continue_cached(MemTxAttrs attrs,
3473 void *ptr, hwaddr len,
3474 hwaddr mr_addr, hwaddr l,
3475 MemoryRegion *mr)
3476 {
3477 MemTxResult result = MEMTX_OK;
3478 uint8_t *buf = ptr;
3479
3480 for (;;) {
3481 result |= flatview_read_continue_step(attrs, buf, len, mr_addr, &l, mr);
3482 len -= l;
3483 buf += l;
3484 mr_addr += l;
3485
3486 if (!len) {
3487 break;
3488 }
3489 l = len;
3490 }
3491
3492 return result;
3493 }
3494
3495 /* Called from RCU critical section. address_space_read_cached uses this
3496 * out of line function when the target is an MMIO or IOMMU region.
3497 */
3498 MemTxResult
address_space_read_cached_slow(MemoryRegionCache * cache,hwaddr addr,void * buf,hwaddr len)3499 address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr,
3500 void *buf, hwaddr len)
3501 {
3502 hwaddr mr_addr, l;
3503 MemoryRegion *mr;
3504
3505 l = len;
3506 mr = address_space_translate_cached(cache, addr, &mr_addr, &l, false,
3507 MEMTXATTRS_UNSPECIFIED);
3508 return address_space_read_continue_cached(MEMTXATTRS_UNSPECIFIED,
3509 buf, len, mr_addr, l, mr);
3510 }
3511
3512 /* Called from RCU critical section. address_space_write_cached uses this
3513 * out of line function when the target is an MMIO or IOMMU region.
3514 */
3515 MemTxResult
address_space_write_cached_slow(MemoryRegionCache * cache,hwaddr addr,const void * buf,hwaddr len)3516 address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
3517 const void *buf, hwaddr len)
3518 {
3519 hwaddr mr_addr, l;
3520 MemoryRegion *mr;
3521
3522 l = len;
3523 mr = address_space_translate_cached(cache, addr, &mr_addr, &l, true,
3524 MEMTXATTRS_UNSPECIFIED);
3525 return address_space_write_continue_cached(MEMTXATTRS_UNSPECIFIED,
3526 buf, len, mr_addr, l, mr);
3527 }
3528
3529 #define ARG1_DECL MemoryRegionCache *cache
3530 #define ARG1 cache
3531 #define SUFFIX _cached_slow
3532 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3533 #define RCU_READ_LOCK() ((void)0)
3534 #define RCU_READ_UNLOCK() ((void)0)
3535 #include "memory_ldst.c.inc"
3536
3537 /* virtual memory access for debug (includes writing to ROM) */
cpu_memory_rw_debug(CPUState * cpu,vaddr addr,void * ptr,size_t len,bool is_write)3538 int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
3539 void *ptr, size_t len, bool is_write)
3540 {
3541 hwaddr phys_addr;
3542 vaddr l, page;
3543 uint8_t *buf = ptr;
3544
3545 cpu_synchronize_state(cpu);
3546 while (len > 0) {
3547 int asidx;
3548 MemTxAttrs attrs;
3549 MemTxResult res;
3550
3551 page = addr & TARGET_PAGE_MASK;
3552 phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs);
3553 asidx = cpu_asidx_from_attrs(cpu, attrs);
3554 /* if no physical page mapped, return an error */
3555 if (phys_addr == -1)
3556 return -1;
3557 l = (page + TARGET_PAGE_SIZE) - addr;
3558 if (l > len)
3559 l = len;
3560 phys_addr += (addr & ~TARGET_PAGE_MASK);
3561 if (is_write) {
3562 res = address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr,
3563 attrs, buf, l);
3564 } else {
3565 res = address_space_read(cpu->cpu_ases[asidx].as, phys_addr,
3566 attrs, buf, l);
3567 }
3568 if (res != MEMTX_OK) {
3569 return -1;
3570 }
3571 len -= l;
3572 buf += l;
3573 addr += l;
3574 }
3575 return 0;
3576 }
3577
cpu_physical_memory_is_io(hwaddr phys_addr)3578 bool cpu_physical_memory_is_io(hwaddr phys_addr)
3579 {
3580 MemoryRegion*mr;
3581 hwaddr l = 1;
3582
3583 RCU_READ_LOCK_GUARD();
3584 mr = address_space_translate(&address_space_memory,
3585 phys_addr, &phys_addr, &l, false,
3586 MEMTXATTRS_UNSPECIFIED);
3587
3588 return !(memory_region_is_ram(mr) || memory_region_is_romd(mr));
3589 }
3590
qemu_ram_foreach_block(RAMBlockIterFunc func,void * opaque)3591 int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque)
3592 {
3593 RAMBlock *block;
3594 int ret = 0;
3595
3596 RCU_READ_LOCK_GUARD();
3597 RAMBLOCK_FOREACH(block) {
3598 ret = func(block, opaque);
3599 if (ret) {
3600 break;
3601 }
3602 }
3603 return ret;
3604 }
3605
3606 /*
3607 * Unmap pages of memory from start to start+length such that
3608 * they a) read as 0, b) Trigger whatever fault mechanism
3609 * the OS provides for postcopy.
3610 * The pages must be unmapped by the end of the function.
3611 * Returns: 0 on success, none-0 on failure
3612 *
3613 */
ram_block_discard_range(RAMBlock * rb,uint64_t start,size_t length)3614 int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length)
3615 {
3616 int ret = -1;
3617
3618 uint8_t *host_startaddr = rb->host + start;
3619
3620 if (!QEMU_PTR_IS_ALIGNED(host_startaddr, rb->page_size)) {
3621 error_report("%s: Unaligned start address: %p",
3622 __func__, host_startaddr);
3623 goto err;
3624 }
3625
3626 if ((start + length) <= rb->max_length) {
3627 bool need_madvise, need_fallocate;
3628 if (!QEMU_IS_ALIGNED(length, rb->page_size)) {
3629 error_report("%s: Unaligned length: %zx", __func__, length);
3630 goto err;
3631 }
3632
3633 errno = ENOTSUP; /* If we are missing MADVISE etc */
3634
3635 /* The logic here is messy;
3636 * madvise DONTNEED fails for hugepages
3637 * fallocate works on hugepages and shmem
3638 * shared anonymous memory requires madvise REMOVE
3639 */
3640 need_madvise = (rb->page_size == qemu_real_host_page_size());
3641 need_fallocate = rb->fd != -1;
3642 if (need_fallocate) {
3643 /* For a file, this causes the area of the file to be zero'd
3644 * if read, and for hugetlbfs also causes it to be unmapped
3645 * so a userfault will trigger.
3646 */
3647 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3648 /*
3649 * fallocate() will fail with readonly files. Let's print a
3650 * proper error message.
3651 */
3652 if (rb->flags & RAM_READONLY_FD) {
3653 error_report("%s: Discarding RAM with readonly files is not"
3654 " supported", __func__);
3655 goto err;
3656
3657 }
3658 /*
3659 * We'll discard data from the actual file, even though we only
3660 * have a MAP_PRIVATE mapping, possibly messing with other
3661 * MAP_PRIVATE/MAP_SHARED mappings. There is no easy way to
3662 * change that behavior whithout violating the promised
3663 * semantics of ram_block_discard_range().
3664 *
3665 * Only warn, because it works as long as nobody else uses that
3666 * file.
3667 */
3668 if (!qemu_ram_is_shared(rb)) {
3669 warn_report_once("%s: Discarding RAM"
3670 " in private file mappings is possibly"
3671 " dangerous, because it will modify the"
3672 " underlying file and will affect other"
3673 " users of the file", __func__);
3674 }
3675
3676 ret = fallocate(rb->fd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE,
3677 start, length);
3678 if (ret) {
3679 ret = -errno;
3680 error_report("%s: Failed to fallocate %s:%" PRIx64 " +%zx (%d)",
3681 __func__, rb->idstr, start, length, ret);
3682 goto err;
3683 }
3684 #else
3685 ret = -ENOSYS;
3686 error_report("%s: fallocate not available/file"
3687 "%s:%" PRIx64 " +%zx (%d)",
3688 __func__, rb->idstr, start, length, ret);
3689 goto err;
3690 #endif
3691 }
3692 if (need_madvise) {
3693 /* For normal RAM this causes it to be unmapped,
3694 * for shared memory it causes the local mapping to disappear
3695 * and to fall back on the file contents (which we just
3696 * fallocate'd away).
3697 */
3698 #if defined(CONFIG_MADVISE)
3699 if (qemu_ram_is_shared(rb) && rb->fd < 0) {
3700 ret = madvise(host_startaddr, length, QEMU_MADV_REMOVE);
3701 } else {
3702 ret = madvise(host_startaddr, length, QEMU_MADV_DONTNEED);
3703 }
3704 if (ret) {
3705 ret = -errno;
3706 error_report("%s: Failed to discard range "
3707 "%s:%" PRIx64 " +%zx (%d)",
3708 __func__, rb->idstr, start, length, ret);
3709 goto err;
3710 }
3711 #else
3712 ret = -ENOSYS;
3713 error_report("%s: MADVISE not available %s:%" PRIx64 " +%zx (%d)",
3714 __func__, rb->idstr, start, length, ret);
3715 goto err;
3716 #endif
3717 }
3718 trace_ram_block_discard_range(rb->idstr, host_startaddr, length,
3719 need_madvise, need_fallocate, ret);
3720 } else {
3721 error_report("%s: Overrun block '%s' (%" PRIu64 "/%zx/" RAM_ADDR_FMT")",
3722 __func__, rb->idstr, start, length, rb->max_length);
3723 }
3724
3725 err:
3726 return ret;
3727 }
3728
ram_block_discard_guest_memfd_range(RAMBlock * rb,uint64_t start,size_t length)3729 int ram_block_discard_guest_memfd_range(RAMBlock *rb, uint64_t start,
3730 size_t length)
3731 {
3732 int ret = -1;
3733
3734 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3735 ret = fallocate(rb->guest_memfd, FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE,
3736 start, length);
3737
3738 if (ret) {
3739 ret = -errno;
3740 error_report("%s: Failed to fallocate %s:%" PRIx64 " +%zx (%d)",
3741 __func__, rb->idstr, start, length, ret);
3742 }
3743 #else
3744 ret = -ENOSYS;
3745 error_report("%s: fallocate not available %s:%" PRIx64 " +%zx (%d)",
3746 __func__, rb->idstr, start, length, ret);
3747 #endif
3748
3749 return ret;
3750 }
3751
ramblock_is_pmem(RAMBlock * rb)3752 bool ramblock_is_pmem(RAMBlock *rb)
3753 {
3754 return rb->flags & RAM_PMEM;
3755 }
3756
mtree_print_phys_entries(int start,int end,int skip,int ptr)3757 static void mtree_print_phys_entries(int start, int end, int skip, int ptr)
3758 {
3759 if (start == end - 1) {
3760 qemu_printf("\t%3d ", start);
3761 } else {
3762 qemu_printf("\t%3d..%-3d ", start, end - 1);
3763 }
3764 qemu_printf(" skip=%d ", skip);
3765 if (ptr == PHYS_MAP_NODE_NIL) {
3766 qemu_printf(" ptr=NIL");
3767 } else if (!skip) {
3768 qemu_printf(" ptr=#%d", ptr);
3769 } else {
3770 qemu_printf(" ptr=[%d]", ptr);
3771 }
3772 qemu_printf("\n");
3773 }
3774
3775 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3776 int128_sub((size), int128_one())) : 0)
3777
mtree_print_dispatch(AddressSpaceDispatch * d,MemoryRegion * root)3778 void mtree_print_dispatch(AddressSpaceDispatch *d, MemoryRegion *root)
3779 {
3780 int i;
3781
3782 qemu_printf(" Dispatch\n");
3783 qemu_printf(" Physical sections\n");
3784
3785 for (i = 0; i < d->map.sections_nb; ++i) {
3786 MemoryRegionSection *s = d->map.sections + i;
3787 const char *names[] = { " [unassigned]", " [not dirty]",
3788 " [ROM]", " [watch]" };
3789
3790 qemu_printf(" #%d @" HWADDR_FMT_plx ".." HWADDR_FMT_plx
3791 " %s%s%s%s%s",
3792 i,
3793 s->offset_within_address_space,
3794 s->offset_within_address_space + MR_SIZE(s->size),
3795 s->mr->name ? s->mr->name : "(noname)",
3796 i < ARRAY_SIZE(names) ? names[i] : "",
3797 s->mr == root ? " [ROOT]" : "",
3798 s == d->mru_section ? " [MRU]" : "",
3799 s->mr->is_iommu ? " [iommu]" : "");
3800
3801 if (s->mr->alias) {
3802 qemu_printf(" alias=%s", s->mr->alias->name ?
3803 s->mr->alias->name : "noname");
3804 }
3805 qemu_printf("\n");
3806 }
3807
3808 qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
3809 P_L2_BITS, P_L2_LEVELS, d->phys_map.ptr, d->phys_map.skip);
3810 for (i = 0; i < d->map.nodes_nb; ++i) {
3811 int j, jprev;
3812 PhysPageEntry prev;
3813 Node *n = d->map.nodes + i;
3814
3815 qemu_printf(" [%d]\n", i);
3816
3817 for (j = 0, jprev = 0, prev = *n[0]; j < ARRAY_SIZE(*n); ++j) {
3818 PhysPageEntry *pe = *n + j;
3819
3820 if (pe->ptr == prev.ptr && pe->skip == prev.skip) {
3821 continue;
3822 }
3823
3824 mtree_print_phys_entries(jprev, j, prev.skip, prev.ptr);
3825
3826 jprev = j;
3827 prev = *pe;
3828 }
3829
3830 if (jprev != ARRAY_SIZE(*n)) {
3831 mtree_print_phys_entries(jprev, j, prev.skip, prev.ptr);
3832 }
3833 }
3834 }
3835
3836 /* Require any discards to work. */
3837 static unsigned int ram_block_discard_required_cnt;
3838 /* Require only coordinated discards to work. */
3839 static unsigned int ram_block_coordinated_discard_required_cnt;
3840 /* Disable any discards. */
3841 static unsigned int ram_block_discard_disabled_cnt;
3842 /* Disable only uncoordinated discards. */
3843 static unsigned int ram_block_uncoordinated_discard_disabled_cnt;
3844 static QemuMutex ram_block_discard_disable_mutex;
3845
ram_block_discard_disable_mutex_lock(void)3846 static void ram_block_discard_disable_mutex_lock(void)
3847 {
3848 static gsize initialized;
3849
3850 if (g_once_init_enter(&initialized)) {
3851 qemu_mutex_init(&ram_block_discard_disable_mutex);
3852 g_once_init_leave(&initialized, 1);
3853 }
3854 qemu_mutex_lock(&ram_block_discard_disable_mutex);
3855 }
3856
ram_block_discard_disable_mutex_unlock(void)3857 static void ram_block_discard_disable_mutex_unlock(void)
3858 {
3859 qemu_mutex_unlock(&ram_block_discard_disable_mutex);
3860 }
3861
ram_block_discard_disable(bool state)3862 int ram_block_discard_disable(bool state)
3863 {
3864 int ret = 0;
3865
3866 ram_block_discard_disable_mutex_lock();
3867 if (!state) {
3868 ram_block_discard_disabled_cnt--;
3869 } else if (ram_block_discard_required_cnt ||
3870 ram_block_coordinated_discard_required_cnt) {
3871 ret = -EBUSY;
3872 } else {
3873 ram_block_discard_disabled_cnt++;
3874 }
3875 ram_block_discard_disable_mutex_unlock();
3876 return ret;
3877 }
3878
ram_block_uncoordinated_discard_disable(bool state)3879 int ram_block_uncoordinated_discard_disable(bool state)
3880 {
3881 int ret = 0;
3882
3883 ram_block_discard_disable_mutex_lock();
3884 if (!state) {
3885 ram_block_uncoordinated_discard_disabled_cnt--;
3886 } else if (ram_block_discard_required_cnt) {
3887 ret = -EBUSY;
3888 } else {
3889 ram_block_uncoordinated_discard_disabled_cnt++;
3890 }
3891 ram_block_discard_disable_mutex_unlock();
3892 return ret;
3893 }
3894
ram_block_discard_require(bool state)3895 int ram_block_discard_require(bool state)
3896 {
3897 int ret = 0;
3898
3899 ram_block_discard_disable_mutex_lock();
3900 if (!state) {
3901 ram_block_discard_required_cnt--;
3902 } else if (ram_block_discard_disabled_cnt ||
3903 ram_block_uncoordinated_discard_disabled_cnt) {
3904 ret = -EBUSY;
3905 } else {
3906 ram_block_discard_required_cnt++;
3907 }
3908 ram_block_discard_disable_mutex_unlock();
3909 return ret;
3910 }
3911
ram_block_coordinated_discard_require(bool state)3912 int ram_block_coordinated_discard_require(bool state)
3913 {
3914 int ret = 0;
3915
3916 ram_block_discard_disable_mutex_lock();
3917 if (!state) {
3918 ram_block_coordinated_discard_required_cnt--;
3919 } else if (ram_block_discard_disabled_cnt) {
3920 ret = -EBUSY;
3921 } else {
3922 ram_block_coordinated_discard_required_cnt++;
3923 }
3924 ram_block_discard_disable_mutex_unlock();
3925 return ret;
3926 }
3927
ram_block_discard_is_disabled(void)3928 bool ram_block_discard_is_disabled(void)
3929 {
3930 return qatomic_read(&ram_block_discard_disabled_cnt) ||
3931 qatomic_read(&ram_block_uncoordinated_discard_disabled_cnt);
3932 }
3933
ram_block_discard_is_required(void)3934 bool ram_block_discard_is_required(void)
3935 {
3936 return qatomic_read(&ram_block_discard_required_cnt) ||
3937 qatomic_read(&ram_block_coordinated_discard_required_cnt);
3938 }
3939