xref: /openbmc/linux/drivers/iio/adc/ad799x.c (revision 7cf15f42)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * iio/adc/ad799x.c
4  * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
5  *
6  * based on iio/adc/max1363
7  * Copyright (C) 2008-2010 Jonathan Cameron
8  *
9  * based on linux/drivers/i2c/chips/max123x
10  * Copyright (C) 2002-2004 Stefan Eletzhofer
11  *
12  * based on linux/drivers/acron/char/pcf8583.c
13  * Copyright (C) 2000 Russell King
14  *
15  * ad799x.c
16  *
17  * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
18  * ad7998 and similar chips.
19  */
20 
21 #include <linux/interrupt.h>
22 #include <linux/device.h>
23 #include <linux/kernel.h>
24 #include <linux/sysfs.h>
25 #include <linux/i2c.h>
26 #include <linux/regulator/consumer.h>
27 #include <linux/slab.h>
28 #include <linux/types.h>
29 #include <linux/err.h>
30 #include <linux/module.h>
31 #include <linux/mutex.h>
32 #include <linux/bitops.h>
33 
34 #include <linux/iio/iio.h>
35 #include <linux/iio/sysfs.h>
36 #include <linux/iio/events.h>
37 #include <linux/iio/buffer.h>
38 #include <linux/iio/trigger_consumer.h>
39 #include <linux/iio/triggered_buffer.h>
40 
41 #define AD799X_CHANNEL_SHIFT			4
42 
43 /*
44  * AD7991, AD7995 and AD7999 defines
45  */
46 
47 #define AD7991_REF_SEL				0x08
48 #define AD7991_FLTR				0x04
49 #define AD7991_BIT_TRIAL_DELAY			0x02
50 #define AD7991_SAMPLE_DELAY			0x01
51 
52 /*
53  * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
54  */
55 
56 #define AD7998_FLTR				BIT(3)
57 #define AD7998_ALERT_EN				BIT(2)
58 #define AD7998_BUSY_ALERT			BIT(1)
59 #define AD7998_BUSY_ALERT_POL			BIT(0)
60 
61 #define AD7998_CONV_RES_REG			0x0
62 #define AD7998_ALERT_STAT_REG			0x1
63 #define AD7998_CONF_REG				0x2
64 #define AD7998_CYCLE_TMR_REG			0x3
65 
66 #define AD7998_DATALOW_REG(x)			((x) * 3 + 0x4)
67 #define AD7998_DATAHIGH_REG(x)			((x) * 3 + 0x5)
68 #define AD7998_HYST_REG(x)			((x) * 3 + 0x6)
69 
70 #define AD7998_CYC_MASK				GENMASK(2, 0)
71 #define AD7998_CYC_DIS				0x0
72 #define AD7998_CYC_TCONF_32			0x1
73 #define AD7998_CYC_TCONF_64			0x2
74 #define AD7998_CYC_TCONF_128			0x3
75 #define AD7998_CYC_TCONF_256			0x4
76 #define AD7998_CYC_TCONF_512			0x5
77 #define AD7998_CYC_TCONF_1024			0x6
78 #define AD7998_CYC_TCONF_2048			0x7
79 
80 #define AD7998_ALERT_STAT_CLEAR			0xFF
81 
82 /*
83  * AD7997 and AD7997 defines
84  */
85 
86 #define AD7997_8_READ_SINGLE			BIT(7)
87 #define AD7997_8_READ_SEQUENCE			(BIT(6) | BIT(5) | BIT(4))
88 
89 enum {
90 	ad7991,
91 	ad7995,
92 	ad7999,
93 	ad7992,
94 	ad7993,
95 	ad7994,
96 	ad7997,
97 	ad7998
98 };
99 
100 /**
101  * struct ad799x_chip_config - chip specific information
102  * @channel:		channel specification
103  * @default_config:	device default configuration
104  * @info:		pointer to iio_info struct
105  */
106 struct ad799x_chip_config {
107 	const struct iio_chan_spec	channel[9];
108 	u16				default_config;
109 	const struct iio_info		*info;
110 };
111 
112 /**
113  * struct ad799x_chip_info - chip specific information
114  * @num_channels:	number of channels
115  * @noirq_config:	device configuration w/o IRQ
116  * @irq_config:		device configuration w/IRQ
117  */
118 struct ad799x_chip_info {
119 	int				num_channels;
120 	const struct ad799x_chip_config	noirq_config;
121 	const struct ad799x_chip_config	irq_config;
122 };
123 
124 struct ad799x_state {
125 	struct i2c_client		*client;
126 	const struct ad799x_chip_config	*chip_config;
127 	struct regulator		*reg;
128 	struct regulator		*vref;
129 	/* lock to protect against multiple access to the device */
130 	struct mutex			lock;
131 	unsigned			id;
132 	u16				config;
133 
134 	u8				*rx_buf;
135 	unsigned int			transfer_size;
136 };
137 
ad799x_write_config(struct ad799x_state * st,u16 val)138 static int ad799x_write_config(struct ad799x_state *st, u16 val)
139 {
140 	switch (st->id) {
141 	case ad7997:
142 	case ad7998:
143 		return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
144 			val);
145 	case ad7992:
146 	case ad7993:
147 	case ad7994:
148 		return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
149 			val);
150 	default:
151 		/* Will be written when doing a conversion */
152 		st->config = val;
153 		return 0;
154 	}
155 }
156 
ad799x_read_config(struct ad799x_state * st)157 static int ad799x_read_config(struct ad799x_state *st)
158 {
159 	switch (st->id) {
160 	case ad7997:
161 	case ad7998:
162 		return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
163 	case ad7992:
164 	case ad7993:
165 	case ad7994:
166 		return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
167 	default:
168 		/* No readback support */
169 		return st->config;
170 	}
171 }
172 
ad799x_update_config(struct ad799x_state * st,u16 config)173 static int ad799x_update_config(struct ad799x_state *st, u16 config)
174 {
175 	int ret;
176 
177 	ret = ad799x_write_config(st, config);
178 	if (ret < 0)
179 		return ret;
180 	ret = ad799x_read_config(st);
181 	if (ret < 0)
182 		return ret;
183 	st->config = ret;
184 
185 	return 0;
186 }
187 
ad799x_trigger_handler(int irq,void * p)188 static irqreturn_t ad799x_trigger_handler(int irq, void *p)
189 {
190 	struct iio_poll_func *pf = p;
191 	struct iio_dev *indio_dev = pf->indio_dev;
192 	struct ad799x_state *st = iio_priv(indio_dev);
193 	int b_sent;
194 	u8 cmd;
195 
196 	switch (st->id) {
197 	case ad7991:
198 	case ad7995:
199 	case ad7999:
200 		cmd = st->config |
201 			(*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
202 		break;
203 	case ad7992:
204 	case ad7993:
205 	case ad7994:
206 		cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
207 			AD7998_CONV_RES_REG;
208 		break;
209 	case ad7997:
210 	case ad7998:
211 		cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
212 		break;
213 	default:
214 		cmd = 0;
215 	}
216 
217 	b_sent = i2c_smbus_read_i2c_block_data(st->client,
218 			cmd, st->transfer_size, st->rx_buf);
219 	if (b_sent < 0)
220 		goto out;
221 
222 	iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
223 			iio_get_time_ns(indio_dev));
224 out:
225 	iio_trigger_notify_done(indio_dev->trig);
226 
227 	return IRQ_HANDLED;
228 }
229 
ad799x_update_scan_mode(struct iio_dev * indio_dev,const unsigned long * scan_mask)230 static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
231 	const unsigned long *scan_mask)
232 {
233 	struct ad799x_state *st = iio_priv(indio_dev);
234 
235 	kfree(st->rx_buf);
236 	st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
237 	if (!st->rx_buf)
238 		return -ENOMEM;
239 
240 	st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
241 
242 	switch (st->id) {
243 	case ad7992:
244 	case ad7993:
245 	case ad7994:
246 	case ad7997:
247 	case ad7998:
248 		st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
249 		st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
250 		return ad799x_write_config(st, st->config);
251 	default:
252 		return 0;
253 	}
254 }
255 
ad799x_scan_direct(struct ad799x_state * st,unsigned ch)256 static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
257 {
258 	u8 cmd;
259 
260 	switch (st->id) {
261 	case ad7991:
262 	case ad7995:
263 	case ad7999:
264 		cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
265 		break;
266 	case ad7992:
267 	case ad7993:
268 	case ad7994:
269 		cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
270 		break;
271 	case ad7997:
272 	case ad7998:
273 		cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
274 		break;
275 	default:
276 		return -EINVAL;
277 	}
278 
279 	return i2c_smbus_read_word_swapped(st->client, cmd);
280 }
281 
ad799x_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)282 static int ad799x_read_raw(struct iio_dev *indio_dev,
283 			   struct iio_chan_spec const *chan,
284 			   int *val,
285 			   int *val2,
286 			   long m)
287 {
288 	int ret;
289 	struct ad799x_state *st = iio_priv(indio_dev);
290 
291 	switch (m) {
292 	case IIO_CHAN_INFO_RAW:
293 		ret = iio_device_claim_direct_mode(indio_dev);
294 		if (ret)
295 			return ret;
296 		mutex_lock(&st->lock);
297 		ret = ad799x_scan_direct(st, chan->scan_index);
298 		mutex_unlock(&st->lock);
299 		iio_device_release_direct_mode(indio_dev);
300 
301 		if (ret < 0)
302 			return ret;
303 		*val = (ret >> chan->scan_type.shift) &
304 			GENMASK(chan->scan_type.realbits - 1, 0);
305 		return IIO_VAL_INT;
306 	case IIO_CHAN_INFO_SCALE:
307 		if (st->vref)
308 			ret = regulator_get_voltage(st->vref);
309 		else
310 			ret = regulator_get_voltage(st->reg);
311 
312 		if (ret < 0)
313 			return ret;
314 		*val = ret / 1000;
315 		*val2 = chan->scan_type.realbits;
316 		return IIO_VAL_FRACTIONAL_LOG2;
317 	}
318 	return -EINVAL;
319 }
320 static const unsigned int ad7998_frequencies[] = {
321 	[AD7998_CYC_DIS]	= 0,
322 	[AD7998_CYC_TCONF_32]	= 15625,
323 	[AD7998_CYC_TCONF_64]	= 7812,
324 	[AD7998_CYC_TCONF_128]	= 3906,
325 	[AD7998_CYC_TCONF_512]	= 976,
326 	[AD7998_CYC_TCONF_1024]	= 488,
327 	[AD7998_CYC_TCONF_2048]	= 244,
328 };
329 
ad799x_read_frequency(struct device * dev,struct device_attribute * attr,char * buf)330 static ssize_t ad799x_read_frequency(struct device *dev,
331 					struct device_attribute *attr,
332 					char *buf)
333 {
334 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
335 	struct ad799x_state *st = iio_priv(indio_dev);
336 
337 	int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
338 	if (ret < 0)
339 		return ret;
340 
341 	return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
342 }
343 
ad799x_write_frequency(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)344 static ssize_t ad799x_write_frequency(struct device *dev,
345 					 struct device_attribute *attr,
346 					 const char *buf,
347 					 size_t len)
348 {
349 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
350 	struct ad799x_state *st = iio_priv(indio_dev);
351 
352 	long val;
353 	int ret, i;
354 
355 	ret = kstrtol(buf, 10, &val);
356 	if (ret)
357 		return ret;
358 
359 	mutex_lock(&st->lock);
360 
361 	ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
362 	if (ret < 0)
363 		goto error_ret_mutex;
364 	/* Wipe the bits clean */
365 	ret &= ~AD7998_CYC_MASK;
366 
367 	for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
368 		if (val == ad7998_frequencies[i])
369 			break;
370 	if (i == ARRAY_SIZE(ad7998_frequencies)) {
371 		ret = -EINVAL;
372 		goto error_ret_mutex;
373 	}
374 
375 	ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
376 		ret | i);
377 	if (ret < 0)
378 		goto error_ret_mutex;
379 	ret = len;
380 
381 error_ret_mutex:
382 	mutex_unlock(&st->lock);
383 
384 	return ret;
385 }
386 
ad799x_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)387 static int ad799x_read_event_config(struct iio_dev *indio_dev,
388 				    const struct iio_chan_spec *chan,
389 				    enum iio_event_type type,
390 				    enum iio_event_direction dir)
391 {
392 	struct ad799x_state *st = iio_priv(indio_dev);
393 
394 	if (!(st->config & AD7998_ALERT_EN))
395 		return 0;
396 
397 	if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
398 		return 1;
399 
400 	return 0;
401 }
402 
ad799x_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)403 static int ad799x_write_event_config(struct iio_dev *indio_dev,
404 				     const struct iio_chan_spec *chan,
405 				     enum iio_event_type type,
406 				     enum iio_event_direction dir,
407 				     int state)
408 {
409 	struct ad799x_state *st = iio_priv(indio_dev);
410 	int ret;
411 
412 	ret = iio_device_claim_direct_mode(indio_dev);
413 	if (ret)
414 		return ret;
415 
416 	mutex_lock(&st->lock);
417 
418 	if (state)
419 		st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
420 	else
421 		st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
422 
423 	if (st->config >> AD799X_CHANNEL_SHIFT)
424 		st->config |= AD7998_ALERT_EN;
425 	else
426 		st->config &= ~AD7998_ALERT_EN;
427 
428 	ret = ad799x_write_config(st, st->config);
429 	mutex_unlock(&st->lock);
430 	iio_device_release_direct_mode(indio_dev);
431 	return ret;
432 }
433 
ad799x_threshold_reg(const struct iio_chan_spec * chan,enum iio_event_direction dir,enum iio_event_info info)434 static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
435 					 enum iio_event_direction dir,
436 					 enum iio_event_info info)
437 {
438 	switch (info) {
439 	case IIO_EV_INFO_VALUE:
440 		if (dir == IIO_EV_DIR_FALLING)
441 			return AD7998_DATALOW_REG(chan->channel);
442 		else
443 			return AD7998_DATAHIGH_REG(chan->channel);
444 	case IIO_EV_INFO_HYSTERESIS:
445 		return AD7998_HYST_REG(chan->channel);
446 	default:
447 		return -EINVAL;
448 	}
449 
450 	return 0;
451 }
452 
ad799x_write_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)453 static int ad799x_write_event_value(struct iio_dev *indio_dev,
454 				    const struct iio_chan_spec *chan,
455 				    enum iio_event_type type,
456 				    enum iio_event_direction dir,
457 				    enum iio_event_info info,
458 				    int val, int val2)
459 {
460 	int ret;
461 	struct ad799x_state *st = iio_priv(indio_dev);
462 
463 	if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
464 		return -EINVAL;
465 
466 	ret = i2c_smbus_write_word_swapped(st->client,
467 		ad799x_threshold_reg(chan, dir, info),
468 		val << chan->scan_type.shift);
469 
470 	return ret;
471 }
472 
ad799x_read_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)473 static int ad799x_read_event_value(struct iio_dev *indio_dev,
474 				    const struct iio_chan_spec *chan,
475 				    enum iio_event_type type,
476 				    enum iio_event_direction dir,
477 				    enum iio_event_info info,
478 				    int *val, int *val2)
479 {
480 	int ret;
481 	struct ad799x_state *st = iio_priv(indio_dev);
482 
483 	ret = i2c_smbus_read_word_swapped(st->client,
484 		ad799x_threshold_reg(chan, dir, info));
485 	if (ret < 0)
486 		return ret;
487 	*val = (ret >> chan->scan_type.shift) &
488 		GENMASK(chan->scan_type.realbits - 1, 0);
489 
490 	return IIO_VAL_INT;
491 }
492 
ad799x_event_handler(int irq,void * private)493 static irqreturn_t ad799x_event_handler(int irq, void *private)
494 {
495 	struct iio_dev *indio_dev = private;
496 	struct ad799x_state *st = iio_priv(private);
497 	int i, ret;
498 
499 	ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
500 	if (ret <= 0)
501 		goto done;
502 
503 	if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
504 		AD7998_ALERT_STAT_CLEAR) < 0)
505 		goto done;
506 
507 	for (i = 0; i < 8; i++) {
508 		if (ret & BIT(i))
509 			iio_push_event(indio_dev,
510 				       i & 0x1 ?
511 				       IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
512 							    (i >> 1),
513 							    IIO_EV_TYPE_THRESH,
514 							    IIO_EV_DIR_RISING) :
515 				       IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
516 							    (i >> 1),
517 							    IIO_EV_TYPE_THRESH,
518 							    IIO_EV_DIR_FALLING),
519 				       iio_get_time_ns(indio_dev));
520 	}
521 
522 done:
523 	return IRQ_HANDLED;
524 }
525 
526 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
527 			      ad799x_read_frequency,
528 			      ad799x_write_frequency);
529 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
530 
531 static struct attribute *ad799x_event_attributes[] = {
532 	&iio_dev_attr_sampling_frequency.dev_attr.attr,
533 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
534 	NULL,
535 };
536 
537 static const struct attribute_group ad799x_event_attrs_group = {
538 	.attrs = ad799x_event_attributes,
539 };
540 
541 static const struct iio_info ad7991_info = {
542 	.read_raw = &ad799x_read_raw,
543 	.update_scan_mode = ad799x_update_scan_mode,
544 };
545 
546 static const struct iio_info ad7993_4_7_8_noirq_info = {
547 	.read_raw = &ad799x_read_raw,
548 	.update_scan_mode = ad799x_update_scan_mode,
549 };
550 
551 static const struct iio_info ad7993_4_7_8_irq_info = {
552 	.read_raw = &ad799x_read_raw,
553 	.event_attrs = &ad799x_event_attrs_group,
554 	.read_event_config = &ad799x_read_event_config,
555 	.write_event_config = &ad799x_write_event_config,
556 	.read_event_value = &ad799x_read_event_value,
557 	.write_event_value = &ad799x_write_event_value,
558 	.update_scan_mode = ad799x_update_scan_mode,
559 };
560 
561 static const struct iio_event_spec ad799x_events[] = {
562 	{
563 		.type = IIO_EV_TYPE_THRESH,
564 		.dir = IIO_EV_DIR_RISING,
565 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
566 			BIT(IIO_EV_INFO_ENABLE),
567 	}, {
568 		.type = IIO_EV_TYPE_THRESH,
569 		.dir = IIO_EV_DIR_FALLING,
570 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
571 			BIT(IIO_EV_INFO_ENABLE),
572 	}, {
573 		.type = IIO_EV_TYPE_THRESH,
574 		.dir = IIO_EV_DIR_EITHER,
575 		.mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
576 	},
577 };
578 
579 #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
580 	.type = IIO_VOLTAGE, \
581 	.indexed = 1, \
582 	.channel = (_index), \
583 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
584 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
585 	.scan_index = (_index), \
586 	.scan_type = { \
587 		.sign = 'u', \
588 		.realbits = (_realbits), \
589 		.storagebits = 16, \
590 		.shift = 12 - (_realbits), \
591 		.endianness = IIO_BE, \
592 	}, \
593 	.event_spec = _ev_spec, \
594 	.num_event_specs = _num_ev_spec, \
595 }
596 
597 #define AD799X_CHANNEL(_index, _realbits) \
598 	_AD799X_CHANNEL(_index, _realbits, NULL, 0)
599 
600 #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
601 	_AD799X_CHANNEL(_index, _realbits, ad799x_events, \
602 		ARRAY_SIZE(ad799x_events))
603 
604 static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
605 	[ad7991] = {
606 		.num_channels = 5,
607 		.noirq_config = {
608 			.channel = {
609 				AD799X_CHANNEL(0, 12),
610 				AD799X_CHANNEL(1, 12),
611 				AD799X_CHANNEL(2, 12),
612 				AD799X_CHANNEL(3, 12),
613 				IIO_CHAN_SOFT_TIMESTAMP(4),
614 			},
615 			.info = &ad7991_info,
616 		},
617 	},
618 	[ad7995] = {
619 		.num_channels = 5,
620 		.noirq_config = {
621 			.channel = {
622 				AD799X_CHANNEL(0, 10),
623 				AD799X_CHANNEL(1, 10),
624 				AD799X_CHANNEL(2, 10),
625 				AD799X_CHANNEL(3, 10),
626 				IIO_CHAN_SOFT_TIMESTAMP(4),
627 			},
628 			.info = &ad7991_info,
629 		},
630 	},
631 	[ad7999] = {
632 		.num_channels = 5,
633 		.noirq_config = {
634 			.channel = {
635 				AD799X_CHANNEL(0, 8),
636 				AD799X_CHANNEL(1, 8),
637 				AD799X_CHANNEL(2, 8),
638 				AD799X_CHANNEL(3, 8),
639 				IIO_CHAN_SOFT_TIMESTAMP(4),
640 			},
641 			.info = &ad7991_info,
642 		},
643 	},
644 	[ad7992] = {
645 		.num_channels = 3,
646 		.noirq_config = {
647 			.channel = {
648 				AD799X_CHANNEL(0, 12),
649 				AD799X_CHANNEL(1, 12),
650 				IIO_CHAN_SOFT_TIMESTAMP(3),
651 			},
652 			.info = &ad7993_4_7_8_noirq_info,
653 		},
654 		.irq_config = {
655 			.channel = {
656 				AD799X_CHANNEL_WITH_EVENTS(0, 12),
657 				AD799X_CHANNEL_WITH_EVENTS(1, 12),
658 				IIO_CHAN_SOFT_TIMESTAMP(3),
659 			},
660 			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
661 			.info = &ad7993_4_7_8_irq_info,
662 		},
663 	},
664 	[ad7993] = {
665 		.num_channels = 5,
666 		.noirq_config = {
667 			.channel = {
668 				AD799X_CHANNEL(0, 10),
669 				AD799X_CHANNEL(1, 10),
670 				AD799X_CHANNEL(2, 10),
671 				AD799X_CHANNEL(3, 10),
672 				IIO_CHAN_SOFT_TIMESTAMP(4),
673 			},
674 			.info = &ad7993_4_7_8_noirq_info,
675 		},
676 		.irq_config = {
677 			.channel = {
678 				AD799X_CHANNEL_WITH_EVENTS(0, 10),
679 				AD799X_CHANNEL_WITH_EVENTS(1, 10),
680 				AD799X_CHANNEL_WITH_EVENTS(2, 10),
681 				AD799X_CHANNEL_WITH_EVENTS(3, 10),
682 				IIO_CHAN_SOFT_TIMESTAMP(4),
683 			},
684 			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
685 			.info = &ad7993_4_7_8_irq_info,
686 		},
687 	},
688 	[ad7994] = {
689 		.num_channels = 5,
690 		.noirq_config = {
691 			.channel = {
692 				AD799X_CHANNEL(0, 12),
693 				AD799X_CHANNEL(1, 12),
694 				AD799X_CHANNEL(2, 12),
695 				AD799X_CHANNEL(3, 12),
696 				IIO_CHAN_SOFT_TIMESTAMP(4),
697 			},
698 			.info = &ad7993_4_7_8_noirq_info,
699 		},
700 		.irq_config = {
701 			.channel = {
702 				AD799X_CHANNEL_WITH_EVENTS(0, 12),
703 				AD799X_CHANNEL_WITH_EVENTS(1, 12),
704 				AD799X_CHANNEL_WITH_EVENTS(2, 12),
705 				AD799X_CHANNEL_WITH_EVENTS(3, 12),
706 				IIO_CHAN_SOFT_TIMESTAMP(4),
707 			},
708 			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
709 			.info = &ad7993_4_7_8_irq_info,
710 		},
711 	},
712 	[ad7997] = {
713 		.num_channels = 9,
714 		.noirq_config = {
715 			.channel = {
716 				AD799X_CHANNEL(0, 10),
717 				AD799X_CHANNEL(1, 10),
718 				AD799X_CHANNEL(2, 10),
719 				AD799X_CHANNEL(3, 10),
720 				AD799X_CHANNEL(4, 10),
721 				AD799X_CHANNEL(5, 10),
722 				AD799X_CHANNEL(6, 10),
723 				AD799X_CHANNEL(7, 10),
724 				IIO_CHAN_SOFT_TIMESTAMP(8),
725 			},
726 			.info = &ad7993_4_7_8_noirq_info,
727 		},
728 		.irq_config = {
729 			.channel = {
730 				AD799X_CHANNEL_WITH_EVENTS(0, 10),
731 				AD799X_CHANNEL_WITH_EVENTS(1, 10),
732 				AD799X_CHANNEL_WITH_EVENTS(2, 10),
733 				AD799X_CHANNEL_WITH_EVENTS(3, 10),
734 				AD799X_CHANNEL(4, 10),
735 				AD799X_CHANNEL(5, 10),
736 				AD799X_CHANNEL(6, 10),
737 				AD799X_CHANNEL(7, 10),
738 				IIO_CHAN_SOFT_TIMESTAMP(8),
739 			},
740 			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
741 			.info = &ad7993_4_7_8_irq_info,
742 		},
743 	},
744 	[ad7998] = {
745 		.num_channels = 9,
746 		.noirq_config = {
747 			.channel = {
748 				AD799X_CHANNEL(0, 12),
749 				AD799X_CHANNEL(1, 12),
750 				AD799X_CHANNEL(2, 12),
751 				AD799X_CHANNEL(3, 12),
752 				AD799X_CHANNEL(4, 12),
753 				AD799X_CHANNEL(5, 12),
754 				AD799X_CHANNEL(6, 12),
755 				AD799X_CHANNEL(7, 12),
756 				IIO_CHAN_SOFT_TIMESTAMP(8),
757 			},
758 			.info = &ad7993_4_7_8_noirq_info,
759 		},
760 		.irq_config = {
761 			.channel = {
762 				AD799X_CHANNEL_WITH_EVENTS(0, 12),
763 				AD799X_CHANNEL_WITH_EVENTS(1, 12),
764 				AD799X_CHANNEL_WITH_EVENTS(2, 12),
765 				AD799X_CHANNEL_WITH_EVENTS(3, 12),
766 				AD799X_CHANNEL(4, 12),
767 				AD799X_CHANNEL(5, 12),
768 				AD799X_CHANNEL(6, 12),
769 				AD799X_CHANNEL(7, 12),
770 				IIO_CHAN_SOFT_TIMESTAMP(8),
771 			},
772 			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
773 			.info = &ad7993_4_7_8_irq_info,
774 		},
775 	},
776 };
777 
ad799x_probe(struct i2c_client * client)778 static int ad799x_probe(struct i2c_client *client)
779 {
780 	const struct i2c_device_id *id = i2c_client_get_device_id(client);
781 	int ret;
782 	int extra_config = 0;
783 	struct ad799x_state *st;
784 	struct iio_dev *indio_dev;
785 	const struct ad799x_chip_info *chip_info =
786 		&ad799x_chip_info_tbl[id->driver_data];
787 
788 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
789 	if (indio_dev == NULL)
790 		return -ENOMEM;
791 
792 	st = iio_priv(indio_dev);
793 	/* this is only used for device removal purposes */
794 	i2c_set_clientdata(client, indio_dev);
795 
796 	st->id = id->driver_data;
797 	if (client->irq > 0 && chip_info->irq_config.info)
798 		st->chip_config = &chip_info->irq_config;
799 	else
800 		st->chip_config = &chip_info->noirq_config;
801 
802 	/* TODO: Add pdata options for filtering and bit delay */
803 
804 	st->reg = devm_regulator_get(&client->dev, "vcc");
805 	if (IS_ERR(st->reg))
806 		return PTR_ERR(st->reg);
807 	ret = regulator_enable(st->reg);
808 	if (ret)
809 		return ret;
810 
811 	/* check if an external reference is supplied */
812 	st->vref = devm_regulator_get_optional(&client->dev, "vref");
813 
814 	if (IS_ERR(st->vref)) {
815 		if (PTR_ERR(st->vref) == -ENODEV) {
816 			st->vref = NULL;
817 			dev_info(&client->dev, "Using VCC reference voltage\n");
818 		} else {
819 			ret = PTR_ERR(st->vref);
820 			goto error_disable_reg;
821 		}
822 	}
823 
824 	if (st->vref) {
825 		/*
826 		 * Use external reference voltage if supported by hardware.
827 		 * This is optional if voltage / regulator present, use VCC otherwise.
828 		 */
829 		if ((st->id == ad7991) || (st->id == ad7995) || (st->id == ad7999)) {
830 			dev_info(&client->dev, "Using external reference voltage\n");
831 			extra_config |= AD7991_REF_SEL;
832 			ret = regulator_enable(st->vref);
833 			if (ret)
834 				goto error_disable_reg;
835 		} else {
836 			st->vref = NULL;
837 			dev_warn(&client->dev, "Supplied reference not supported\n");
838 		}
839 	}
840 
841 	st->client = client;
842 
843 	indio_dev->name = id->name;
844 	indio_dev->info = st->chip_config->info;
845 
846 	indio_dev->modes = INDIO_DIRECT_MODE;
847 	indio_dev->channels = st->chip_config->channel;
848 	indio_dev->num_channels = chip_info->num_channels;
849 
850 	ret = ad799x_update_config(st, st->chip_config->default_config | extra_config);
851 	if (ret)
852 		goto error_disable_vref;
853 
854 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
855 		&ad799x_trigger_handler, NULL);
856 	if (ret)
857 		goto error_disable_vref;
858 
859 	if (client->irq > 0) {
860 		ret = devm_request_threaded_irq(&client->dev,
861 						client->irq,
862 						NULL,
863 						ad799x_event_handler,
864 						IRQF_TRIGGER_FALLING |
865 						IRQF_ONESHOT,
866 						client->name,
867 						indio_dev);
868 		if (ret)
869 			goto error_cleanup_ring;
870 	}
871 
872 	mutex_init(&st->lock);
873 
874 	ret = iio_device_register(indio_dev);
875 	if (ret)
876 		goto error_cleanup_ring;
877 
878 	return 0;
879 
880 error_cleanup_ring:
881 	iio_triggered_buffer_cleanup(indio_dev);
882 error_disable_vref:
883 	if (st->vref)
884 		regulator_disable(st->vref);
885 error_disable_reg:
886 	regulator_disable(st->reg);
887 
888 	return ret;
889 }
890 
ad799x_remove(struct i2c_client * client)891 static void ad799x_remove(struct i2c_client *client)
892 {
893 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
894 	struct ad799x_state *st = iio_priv(indio_dev);
895 
896 	iio_device_unregister(indio_dev);
897 
898 	iio_triggered_buffer_cleanup(indio_dev);
899 	if (st->vref)
900 		regulator_disable(st->vref);
901 	regulator_disable(st->reg);
902 	kfree(st->rx_buf);
903 }
904 
ad799x_suspend(struct device * dev)905 static int ad799x_suspend(struct device *dev)
906 {
907 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
908 	struct ad799x_state *st = iio_priv(indio_dev);
909 
910 	if (st->vref)
911 		regulator_disable(st->vref);
912 	regulator_disable(st->reg);
913 
914 	return 0;
915 }
916 
ad799x_resume(struct device * dev)917 static int ad799x_resume(struct device *dev)
918 {
919 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
920 	struct ad799x_state *st = iio_priv(indio_dev);
921 	int ret;
922 
923 	ret = regulator_enable(st->reg);
924 	if (ret) {
925 		dev_err(dev, "Unable to enable vcc regulator\n");
926 		return ret;
927 	}
928 
929 	if (st->vref) {
930 		ret = regulator_enable(st->vref);
931 		if (ret) {
932 			regulator_disable(st->reg);
933 			dev_err(dev, "Unable to enable vref regulator\n");
934 			return ret;
935 		}
936 	}
937 
938 	/* resync config */
939 	ret = ad799x_update_config(st, st->config);
940 	if (ret) {
941 		if (st->vref)
942 			regulator_disable(st->vref);
943 		regulator_disable(st->reg);
944 		return ret;
945 	}
946 
947 	return 0;
948 }
949 
950 static DEFINE_SIMPLE_DEV_PM_OPS(ad799x_pm_ops, ad799x_suspend, ad799x_resume);
951 
952 static const struct i2c_device_id ad799x_id[] = {
953 	{ "ad7991", ad7991 },
954 	{ "ad7995", ad7995 },
955 	{ "ad7999", ad7999 },
956 	{ "ad7992", ad7992 },
957 	{ "ad7993", ad7993 },
958 	{ "ad7994", ad7994 },
959 	{ "ad7997", ad7997 },
960 	{ "ad7998", ad7998 },
961 	{}
962 };
963 
964 MODULE_DEVICE_TABLE(i2c, ad799x_id);
965 
966 static struct i2c_driver ad799x_driver = {
967 	.driver = {
968 		.name = "ad799x",
969 		.pm = pm_sleep_ptr(&ad799x_pm_ops),
970 	},
971 	.probe = ad799x_probe,
972 	.remove = ad799x_remove,
973 	.id_table = ad799x_id,
974 };
975 module_i2c_driver(ad799x_driver);
976 
977 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
978 MODULE_DESCRIPTION("Analog Devices AD799x ADC");
979 MODULE_LICENSE("GPL v2");
980