1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * AD7606 SPI ADC driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 */
7
8 #include <linux/delay.h>
9 #include <linux/device.h>
10 #include <linux/err.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/property.h>
16 #include <linux/regulator/consumer.h>
17 #include <linux/sched.h>
18 #include <linux/slab.h>
19 #include <linux/sysfs.h>
20 #include <linux/util_macros.h>
21
22 #include <linux/iio/iio.h>
23 #include <linux/iio/buffer.h>
24 #include <linux/iio/sysfs.h>
25 #include <linux/iio/trigger.h>
26 #include <linux/iio/triggered_buffer.h>
27 #include <linux/iio/trigger_consumer.h>
28
29 #include "ad7606.h"
30
31 /*
32 * Scales are computed as 5000/32768 and 10000/32768 respectively,
33 * so that when applied to the raw values they provide mV values
34 */
35 static const unsigned int ad7606_scale_avail[2] = {
36 152588, 305176
37 };
38
39
40 static const unsigned int ad7616_sw_scale_avail[3] = {
41 76293, 152588, 305176
42 };
43
44 static const unsigned int ad7606_oversampling_avail[7] = {
45 1, 2, 4, 8, 16, 32, 64,
46 };
47
48 static const unsigned int ad7616_oversampling_avail[8] = {
49 1, 2, 4, 8, 16, 32, 64, 128,
50 };
51
ad7606_reset(struct ad7606_state * st)52 int ad7606_reset(struct ad7606_state *st)
53 {
54 if (st->gpio_reset) {
55 gpiod_set_value(st->gpio_reset, 1);
56 ndelay(100); /* t_reset >= 100ns */
57 gpiod_set_value(st->gpio_reset, 0);
58 return 0;
59 }
60
61 return -ENODEV;
62 }
63 EXPORT_SYMBOL_NS_GPL(ad7606_reset, IIO_AD7606);
64
ad7606_reg_access(struct iio_dev * indio_dev,unsigned int reg,unsigned int writeval,unsigned int * readval)65 static int ad7606_reg_access(struct iio_dev *indio_dev,
66 unsigned int reg,
67 unsigned int writeval,
68 unsigned int *readval)
69 {
70 struct ad7606_state *st = iio_priv(indio_dev);
71 int ret;
72
73 mutex_lock(&st->lock);
74 if (readval) {
75 ret = st->bops->reg_read(st, reg);
76 if (ret < 0)
77 goto err_unlock;
78 *readval = ret;
79 ret = 0;
80 } else {
81 ret = st->bops->reg_write(st, reg, writeval);
82 }
83 err_unlock:
84 mutex_unlock(&st->lock);
85 return ret;
86 }
87
ad7606_read_samples(struct ad7606_state * st)88 static int ad7606_read_samples(struct ad7606_state *st)
89 {
90 unsigned int num = st->chip_info->num_channels - 1;
91 u16 *data = st->data;
92
93 return st->bops->read_block(st->dev, num, data);
94 }
95
ad7606_trigger_handler(int irq,void * p)96 static irqreturn_t ad7606_trigger_handler(int irq, void *p)
97 {
98 struct iio_poll_func *pf = p;
99 struct iio_dev *indio_dev = pf->indio_dev;
100 struct ad7606_state *st = iio_priv(indio_dev);
101 int ret;
102
103 mutex_lock(&st->lock);
104
105 ret = ad7606_read_samples(st);
106 if (ret == 0)
107 iio_push_to_buffers_with_timestamp(indio_dev, st->data,
108 iio_get_time_ns(indio_dev));
109
110 iio_trigger_notify_done(indio_dev->trig);
111 /* The rising edge of the CONVST signal starts a new conversion. */
112 gpiod_set_value(st->gpio_convst, 1);
113
114 mutex_unlock(&st->lock);
115
116 return IRQ_HANDLED;
117 }
118
ad7606_scan_direct(struct iio_dev * indio_dev,unsigned int ch)119 static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch)
120 {
121 struct ad7606_state *st = iio_priv(indio_dev);
122 int ret;
123
124 gpiod_set_value(st->gpio_convst, 1);
125 ret = wait_for_completion_timeout(&st->completion,
126 msecs_to_jiffies(1000));
127 if (!ret) {
128 ret = -ETIMEDOUT;
129 goto error_ret;
130 }
131
132 ret = ad7606_read_samples(st);
133 if (ret == 0)
134 ret = st->data[ch];
135
136 error_ret:
137 gpiod_set_value(st->gpio_convst, 0);
138
139 return ret;
140 }
141
ad7606_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)142 static int ad7606_read_raw(struct iio_dev *indio_dev,
143 struct iio_chan_spec const *chan,
144 int *val,
145 int *val2,
146 long m)
147 {
148 int ret, ch = 0;
149 struct ad7606_state *st = iio_priv(indio_dev);
150
151 switch (m) {
152 case IIO_CHAN_INFO_RAW:
153 ret = iio_device_claim_direct_mode(indio_dev);
154 if (ret)
155 return ret;
156
157 ret = ad7606_scan_direct(indio_dev, chan->address);
158 iio_device_release_direct_mode(indio_dev);
159
160 if (ret < 0)
161 return ret;
162 *val = (short)ret;
163 return IIO_VAL_INT;
164 case IIO_CHAN_INFO_SCALE:
165 if (st->sw_mode_en)
166 ch = chan->address;
167 *val = 0;
168 *val2 = st->scale_avail[st->range[ch]];
169 return IIO_VAL_INT_PLUS_MICRO;
170 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
171 *val = st->oversampling;
172 return IIO_VAL_INT;
173 }
174 return -EINVAL;
175 }
176
ad7606_show_avail(char * buf,const unsigned int * vals,unsigned int n,bool micros)177 static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals,
178 unsigned int n, bool micros)
179 {
180 size_t len = 0;
181 int i;
182
183 for (i = 0; i < n; i++) {
184 len += scnprintf(buf + len, PAGE_SIZE - len,
185 micros ? "0.%06u " : "%u ", vals[i]);
186 }
187 buf[len - 1] = '\n';
188
189 return len;
190 }
191
in_voltage_scale_available_show(struct device * dev,struct device_attribute * attr,char * buf)192 static ssize_t in_voltage_scale_available_show(struct device *dev,
193 struct device_attribute *attr,
194 char *buf)
195 {
196 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
197 struct ad7606_state *st = iio_priv(indio_dev);
198
199 return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true);
200 }
201
202 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0);
203
ad7606_write_scale_hw(struct iio_dev * indio_dev,int ch,int val)204 static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val)
205 {
206 struct ad7606_state *st = iio_priv(indio_dev);
207
208 gpiod_set_value(st->gpio_range, val);
209
210 return 0;
211 }
212
ad7606_write_os_hw(struct iio_dev * indio_dev,int val)213 static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val)
214 {
215 struct ad7606_state *st = iio_priv(indio_dev);
216 DECLARE_BITMAP(values, 3);
217
218 values[0] = val;
219
220 gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc,
221 st->gpio_os->info, values);
222
223 /* AD7616 requires a reset to update value */
224 if (st->chip_info->os_req_reset)
225 ad7606_reset(st);
226
227 return 0;
228 }
229
ad7606_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)230 static int ad7606_write_raw(struct iio_dev *indio_dev,
231 struct iio_chan_spec const *chan,
232 int val,
233 int val2,
234 long mask)
235 {
236 struct ad7606_state *st = iio_priv(indio_dev);
237 int i, ret, ch = 0;
238
239 switch (mask) {
240 case IIO_CHAN_INFO_SCALE:
241 mutex_lock(&st->lock);
242 i = find_closest(val2, st->scale_avail, st->num_scales);
243 if (st->sw_mode_en)
244 ch = chan->address;
245 ret = st->write_scale(indio_dev, ch, i);
246 if (ret < 0) {
247 mutex_unlock(&st->lock);
248 return ret;
249 }
250 st->range[ch] = i;
251 mutex_unlock(&st->lock);
252
253 return 0;
254 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
255 if (val2)
256 return -EINVAL;
257 i = find_closest(val, st->oversampling_avail,
258 st->num_os_ratios);
259 mutex_lock(&st->lock);
260 ret = st->write_os(indio_dev, i);
261 if (ret < 0) {
262 mutex_unlock(&st->lock);
263 return ret;
264 }
265 st->oversampling = st->oversampling_avail[i];
266 mutex_unlock(&st->lock);
267
268 return 0;
269 default:
270 return -EINVAL;
271 }
272 }
273
ad7606_oversampling_ratio_avail(struct device * dev,struct device_attribute * attr,char * buf)274 static ssize_t ad7606_oversampling_ratio_avail(struct device *dev,
275 struct device_attribute *attr,
276 char *buf)
277 {
278 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
279 struct ad7606_state *st = iio_priv(indio_dev);
280
281 return ad7606_show_avail(buf, st->oversampling_avail,
282 st->num_os_ratios, false);
283 }
284
285 static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444,
286 ad7606_oversampling_ratio_avail, NULL, 0);
287
288 static struct attribute *ad7606_attributes_os_and_range[] = {
289 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
290 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
291 NULL,
292 };
293
294 static const struct attribute_group ad7606_attribute_group_os_and_range = {
295 .attrs = ad7606_attributes_os_and_range,
296 };
297
298 static struct attribute *ad7606_attributes_os[] = {
299 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
300 NULL,
301 };
302
303 static const struct attribute_group ad7606_attribute_group_os = {
304 .attrs = ad7606_attributes_os,
305 };
306
307 static struct attribute *ad7606_attributes_range[] = {
308 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
309 NULL,
310 };
311
312 static const struct attribute_group ad7606_attribute_group_range = {
313 .attrs = ad7606_attributes_range,
314 };
315
316 static const struct iio_chan_spec ad7605_channels[] = {
317 IIO_CHAN_SOFT_TIMESTAMP(4),
318 AD7605_CHANNEL(0),
319 AD7605_CHANNEL(1),
320 AD7605_CHANNEL(2),
321 AD7605_CHANNEL(3),
322 };
323
324 static const struct iio_chan_spec ad7606_channels[] = {
325 IIO_CHAN_SOFT_TIMESTAMP(8),
326 AD7606_CHANNEL(0),
327 AD7606_CHANNEL(1),
328 AD7606_CHANNEL(2),
329 AD7606_CHANNEL(3),
330 AD7606_CHANNEL(4),
331 AD7606_CHANNEL(5),
332 AD7606_CHANNEL(6),
333 AD7606_CHANNEL(7),
334 };
335
336 /*
337 * The current assumption that this driver makes for AD7616, is that it's
338 * working in Hardware Mode with Serial, Burst and Sequencer modes activated.
339 * To activate them, following pins must be pulled high:
340 * -SER/PAR
341 * -SEQEN
342 * And following pins must be pulled low:
343 * -WR/BURST
344 * -DB4/SER1W
345 */
346 static const struct iio_chan_spec ad7616_channels[] = {
347 IIO_CHAN_SOFT_TIMESTAMP(16),
348 AD7606_CHANNEL(0),
349 AD7606_CHANNEL(1),
350 AD7606_CHANNEL(2),
351 AD7606_CHANNEL(3),
352 AD7606_CHANNEL(4),
353 AD7606_CHANNEL(5),
354 AD7606_CHANNEL(6),
355 AD7606_CHANNEL(7),
356 AD7606_CHANNEL(8),
357 AD7606_CHANNEL(9),
358 AD7606_CHANNEL(10),
359 AD7606_CHANNEL(11),
360 AD7606_CHANNEL(12),
361 AD7606_CHANNEL(13),
362 AD7606_CHANNEL(14),
363 AD7606_CHANNEL(15),
364 };
365
366 static const struct ad7606_chip_info ad7606_chip_info_tbl[] = {
367 /* More devices added in future */
368 [ID_AD7605_4] = {
369 .channels = ad7605_channels,
370 .num_channels = 5,
371 },
372 [ID_AD7606_8] = {
373 .channels = ad7606_channels,
374 .num_channels = 9,
375 .oversampling_avail = ad7606_oversampling_avail,
376 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
377 },
378 [ID_AD7606_6] = {
379 .channels = ad7606_channels,
380 .num_channels = 7,
381 .oversampling_avail = ad7606_oversampling_avail,
382 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
383 },
384 [ID_AD7606_4] = {
385 .channels = ad7606_channels,
386 .num_channels = 5,
387 .oversampling_avail = ad7606_oversampling_avail,
388 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
389 },
390 [ID_AD7606B] = {
391 .channels = ad7606_channels,
392 .num_channels = 9,
393 .oversampling_avail = ad7606_oversampling_avail,
394 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
395 },
396 [ID_AD7616] = {
397 .channels = ad7616_channels,
398 .num_channels = 17,
399 .oversampling_avail = ad7616_oversampling_avail,
400 .oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail),
401 .os_req_reset = true,
402 .init_delay_ms = 15,
403 },
404 };
405
ad7606_request_gpios(struct ad7606_state * st)406 static int ad7606_request_gpios(struct ad7606_state *st)
407 {
408 struct device *dev = st->dev;
409
410 st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start",
411 GPIOD_OUT_LOW);
412 if (IS_ERR(st->gpio_convst))
413 return PTR_ERR(st->gpio_convst);
414
415 st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
416 if (IS_ERR(st->gpio_reset))
417 return PTR_ERR(st->gpio_reset);
418
419 st->gpio_range = devm_gpiod_get_optional(dev, "adi,range",
420 GPIOD_OUT_LOW);
421 if (IS_ERR(st->gpio_range))
422 return PTR_ERR(st->gpio_range);
423
424 st->gpio_standby = devm_gpiod_get_optional(dev, "standby",
425 GPIOD_OUT_HIGH);
426 if (IS_ERR(st->gpio_standby))
427 return PTR_ERR(st->gpio_standby);
428
429 st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data",
430 GPIOD_IN);
431 if (IS_ERR(st->gpio_frstdata))
432 return PTR_ERR(st->gpio_frstdata);
433
434 if (!st->chip_info->oversampling_num)
435 return 0;
436
437 st->gpio_os = devm_gpiod_get_array_optional(dev,
438 "adi,oversampling-ratio",
439 GPIOD_OUT_LOW);
440 return PTR_ERR_OR_ZERO(st->gpio_os);
441 }
442
443 /*
444 * The BUSY signal indicates when conversions are in progress, so when a rising
445 * edge of CONVST is applied, BUSY goes logic high and transitions low at the
446 * end of the entire conversion process. The falling edge of the BUSY signal
447 * triggers this interrupt.
448 */
ad7606_interrupt(int irq,void * dev_id)449 static irqreturn_t ad7606_interrupt(int irq, void *dev_id)
450 {
451 struct iio_dev *indio_dev = dev_id;
452 struct ad7606_state *st = iio_priv(indio_dev);
453
454 if (iio_buffer_enabled(indio_dev)) {
455 gpiod_set_value(st->gpio_convst, 0);
456 iio_trigger_poll_nested(st->trig);
457 } else {
458 complete(&st->completion);
459 }
460
461 return IRQ_HANDLED;
462 };
463
ad7606_validate_trigger(struct iio_dev * indio_dev,struct iio_trigger * trig)464 static int ad7606_validate_trigger(struct iio_dev *indio_dev,
465 struct iio_trigger *trig)
466 {
467 struct ad7606_state *st = iio_priv(indio_dev);
468
469 if (st->trig != trig)
470 return -EINVAL;
471
472 return 0;
473 }
474
ad7606_buffer_postenable(struct iio_dev * indio_dev)475 static int ad7606_buffer_postenable(struct iio_dev *indio_dev)
476 {
477 struct ad7606_state *st = iio_priv(indio_dev);
478
479 gpiod_set_value(st->gpio_convst, 1);
480
481 return 0;
482 }
483
ad7606_buffer_predisable(struct iio_dev * indio_dev)484 static int ad7606_buffer_predisable(struct iio_dev *indio_dev)
485 {
486 struct ad7606_state *st = iio_priv(indio_dev);
487
488 gpiod_set_value(st->gpio_convst, 0);
489
490 return 0;
491 }
492
493 static const struct iio_buffer_setup_ops ad7606_buffer_ops = {
494 .postenable = &ad7606_buffer_postenable,
495 .predisable = &ad7606_buffer_predisable,
496 };
497
498 static const struct iio_info ad7606_info_no_os_or_range = {
499 .read_raw = &ad7606_read_raw,
500 .validate_trigger = &ad7606_validate_trigger,
501 };
502
503 static const struct iio_info ad7606_info_os_and_range = {
504 .read_raw = &ad7606_read_raw,
505 .write_raw = &ad7606_write_raw,
506 .attrs = &ad7606_attribute_group_os_and_range,
507 .validate_trigger = &ad7606_validate_trigger,
508 };
509
510 static const struct iio_info ad7606_info_os_range_and_debug = {
511 .read_raw = &ad7606_read_raw,
512 .write_raw = &ad7606_write_raw,
513 .debugfs_reg_access = &ad7606_reg_access,
514 .attrs = &ad7606_attribute_group_os_and_range,
515 .validate_trigger = &ad7606_validate_trigger,
516 };
517
518 static const struct iio_info ad7606_info_os = {
519 .read_raw = &ad7606_read_raw,
520 .write_raw = &ad7606_write_raw,
521 .attrs = &ad7606_attribute_group_os,
522 .validate_trigger = &ad7606_validate_trigger,
523 };
524
525 static const struct iio_info ad7606_info_range = {
526 .read_raw = &ad7606_read_raw,
527 .write_raw = &ad7606_write_raw,
528 .attrs = &ad7606_attribute_group_range,
529 .validate_trigger = &ad7606_validate_trigger,
530 };
531
532 static const struct iio_trigger_ops ad7606_trigger_ops = {
533 .validate_device = iio_trigger_validate_own_device,
534 };
535
ad7606_probe(struct device * dev,int irq,void __iomem * base_address,const char * name,unsigned int id,const struct ad7606_bus_ops * bops)536 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
537 const char *name, unsigned int id,
538 const struct ad7606_bus_ops *bops)
539 {
540 struct ad7606_state *st;
541 int ret;
542 struct iio_dev *indio_dev;
543
544 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
545 if (!indio_dev)
546 return -ENOMEM;
547
548 st = iio_priv(indio_dev);
549 dev_set_drvdata(dev, indio_dev);
550
551 st->dev = dev;
552 mutex_init(&st->lock);
553 st->bops = bops;
554 st->base_address = base_address;
555 /* tied to logic low, analog input range is +/- 5V */
556 st->range[0] = 0;
557 st->oversampling = 1;
558 st->scale_avail = ad7606_scale_avail;
559 st->num_scales = ARRAY_SIZE(ad7606_scale_avail);
560
561 ret = devm_regulator_get_enable(dev, "avcc");
562 if (ret)
563 return dev_err_probe(dev, ret,
564 "Failed to enable specified AVcc supply\n");
565
566 st->chip_info = &ad7606_chip_info_tbl[id];
567
568 if (st->chip_info->oversampling_num) {
569 st->oversampling_avail = st->chip_info->oversampling_avail;
570 st->num_os_ratios = st->chip_info->oversampling_num;
571 }
572
573 ret = ad7606_request_gpios(st);
574 if (ret)
575 return ret;
576
577 if (st->gpio_os) {
578 if (st->gpio_range)
579 indio_dev->info = &ad7606_info_os_and_range;
580 else
581 indio_dev->info = &ad7606_info_os;
582 } else {
583 if (st->gpio_range)
584 indio_dev->info = &ad7606_info_range;
585 else
586 indio_dev->info = &ad7606_info_no_os_or_range;
587 }
588 indio_dev->modes = INDIO_DIRECT_MODE;
589 indio_dev->name = name;
590 indio_dev->channels = st->chip_info->channels;
591 indio_dev->num_channels = st->chip_info->num_channels;
592
593 init_completion(&st->completion);
594
595 ret = ad7606_reset(st);
596 if (ret)
597 dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n");
598
599 /* AD7616 requires al least 15ms to reconfigure after a reset */
600 if (st->chip_info->init_delay_ms) {
601 if (msleep_interruptible(st->chip_info->init_delay_ms))
602 return -ERESTARTSYS;
603 }
604
605 st->write_scale = ad7606_write_scale_hw;
606 st->write_os = ad7606_write_os_hw;
607
608 if (st->bops->sw_mode_config)
609 st->sw_mode_en = device_property_present(st->dev,
610 "adi,sw-mode");
611
612 if (st->sw_mode_en) {
613 /* Scale of 0.076293 is only available in sw mode */
614 st->scale_avail = ad7616_sw_scale_avail;
615 st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail);
616
617 /* After reset, in software mode, ±10 V is set by default */
618 memset32(st->range, 2, ARRAY_SIZE(st->range));
619 indio_dev->info = &ad7606_info_os_range_and_debug;
620
621 ret = st->bops->sw_mode_config(indio_dev);
622 if (ret < 0)
623 return ret;
624 }
625
626 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
627 indio_dev->name,
628 iio_device_id(indio_dev));
629 if (!st->trig)
630 return -ENOMEM;
631
632 st->trig->ops = &ad7606_trigger_ops;
633 iio_trigger_set_drvdata(st->trig, indio_dev);
634 ret = devm_iio_trigger_register(dev, st->trig);
635 if (ret)
636 return ret;
637
638 indio_dev->trig = iio_trigger_get(st->trig);
639
640 ret = devm_request_threaded_irq(dev, irq,
641 NULL,
642 &ad7606_interrupt,
643 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
644 name, indio_dev);
645 if (ret)
646 return ret;
647
648 ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
649 &iio_pollfunc_store_time,
650 &ad7606_trigger_handler,
651 &ad7606_buffer_ops);
652 if (ret)
653 return ret;
654
655 return devm_iio_device_register(dev, indio_dev);
656 }
657 EXPORT_SYMBOL_NS_GPL(ad7606_probe, IIO_AD7606);
658
659 #ifdef CONFIG_PM_SLEEP
660
ad7606_suspend(struct device * dev)661 static int ad7606_suspend(struct device *dev)
662 {
663 struct iio_dev *indio_dev = dev_get_drvdata(dev);
664 struct ad7606_state *st = iio_priv(indio_dev);
665
666 if (st->gpio_standby) {
667 gpiod_set_value(st->gpio_range, 1);
668 gpiod_set_value(st->gpio_standby, 0);
669 }
670
671 return 0;
672 }
673
ad7606_resume(struct device * dev)674 static int ad7606_resume(struct device *dev)
675 {
676 struct iio_dev *indio_dev = dev_get_drvdata(dev);
677 struct ad7606_state *st = iio_priv(indio_dev);
678
679 if (st->gpio_standby) {
680 gpiod_set_value(st->gpio_range, st->range[0]);
681 gpiod_set_value(st->gpio_standby, 1);
682 ad7606_reset(st);
683 }
684
685 return 0;
686 }
687
688 SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume);
689 EXPORT_SYMBOL_NS_GPL(ad7606_pm_ops, IIO_AD7606);
690
691 #endif
692
693 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
694 MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
695 MODULE_LICENSE("GPL v2");
696