1 /* SPDX-License-Identifier: GPL-2.0-only
2  *
3  * Copyright (c) 2021, MediaTek Inc.
4  * Copyright (c) 2021-2022, Intel Corporation.
5  *
6  * Authors:
7  *  Haijun Liu <haijun.liu@mediatek.com>
8  *  Sreehari Kancharla <sreehari.kancharla@intel.com>
9  *
10  * Contributors:
11  *  Amir Hanania <amir.hanania@intel.com>
12  *  Ricardo Martinez <ricardo.martinez@linux.intel.com>
13  */
14 
15 #ifndef __T7XX_MHCCIF_H__
16 #define __T7XX_MHCCIF_H__
17 
18 #include <linux/types.h>
19 
20 #include "t7xx_pci.h"
21 #include "t7xx_reg.h"
22 
23 #define D2H_SW_INT_MASK (D2H_INT_EXCEPTION_INIT |		\
24 			 D2H_INT_EXCEPTION_INIT_DONE |		\
25 			 D2H_INT_EXCEPTION_CLEARQ_DONE |	\
26 			 D2H_INT_EXCEPTION_ALLQ_RESET |		\
27 			 D2H_INT_PORT_ENUM |			\
28 			 D2H_INT_ASYNC_AP_HK |			\
29 			 D2H_INT_ASYNC_MD_HK)
30 
31 void t7xx_mhccif_mask_set(struct t7xx_pci_dev *t7xx_dev, u32 val);
32 void t7xx_mhccif_mask_clr(struct t7xx_pci_dev *t7xx_dev, u32 val);
33 u32 t7xx_mhccif_mask_get(struct t7xx_pci_dev *t7xx_dev);
34 void t7xx_mhccif_init(struct t7xx_pci_dev *t7xx_dev);
35 u32 t7xx_mhccif_read_sw_int_sts(struct t7xx_pci_dev *t7xx_dev);
36 void t7xx_mhccif_h2d_swint_trigger(struct t7xx_pci_dev *t7xx_dev, u32 channel);
37 
38 #endif /*__T7XX_MHCCIF_H__ */
39