1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) Stefano Babic <sbabic@denx.de> 4 * 5 * Configuration settings for the E+L i.MX6Q DO82 board. 6 */ 7 8 #ifndef __EL6Q_COMMON_CONFIG_H 9 #define __EL6Q_COMMON_CONFIG_H 10 11 #define CONFIG_BOARD_NAME EL6Q 12 13 #include "mx6_common.h" 14 15 #define CONFIG_IMX_THERMAL 16 17 /* Size of malloc() pool */ 18 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 19 20 #define CONFIG_MXC_UART 21 22 #ifdef CONFIG_SPL 23 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 24 #include "imx6_spl.h" 25 #endif 26 27 /* MMC Configs */ 28 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 29 #define CONFIG_SYS_FSL_USDHC_NUM 2 30 31 /* I2C config */ 32 #define CONFIG_SYS_I2C 33 #define CONFIG_SYS_I2C_MXC 34 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 35 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 36 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 37 #define CONFIG_SYS_I2C_SPEED 100000 38 39 /* PMIC */ 40 #define CONFIG_POWER 41 #define CONFIG_POWER_I2C 42 #define CONFIG_POWER_PFUZE100 43 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 44 45 /* Commands */ 46 47 /* allow to overwrite serial and ethaddr */ 48 #define CONFIG_ENV_OVERWRITE 49 #define CONFIG_MXC_UART_BASE UART2_BASE 50 51 #define CONFIG_BOARD_NAME EL6Q 52 53 #define CONFIG_EXTRA_ENV_SETTINGS \ 54 "board="__stringify(CONFIG_BOARD_NAME)"\0" \ 55 "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \ 56 "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \ 57 "console=" CONSOLE_DEV "\0" \ 58 "fdtfile=undefined\0" \ 59 "fdt_high=0xffffffff\0" \ 60 "fdt_addr_r=0x18000000\0" \ 61 "fdt_addr=0x18000000\0" \ 62 "findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \ 63 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 64 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 65 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 66 BOOTENV 67 68 #define BOOT_TARGET_DEVICES(func) \ 69 func(MMC, mmc, 0) \ 70 func(MMC, mmc, 1) \ 71 func(PXE, PXE, na) \ 72 func(DHCP, dhcp, na) 73 74 #include <config_distro_bootcmd.h> 75 76 #define CONFIG_ARP_TIMEOUT 200UL 77 78 #define CONFIG_SYS_MEMTEST_START 0x10000000 79 #define CONFIG_SYS_MEMTEST_END 0x10800000 80 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 81 82 /* Physical Memory Map */ 83 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 84 85 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 86 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 87 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 88 89 #define CONFIG_SYS_INIT_SP_OFFSET \ 90 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 91 #define CONFIG_SYS_INIT_SP_ADDR \ 92 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 93 94 /* environment organization */ 95 96 #define CONFIG_ENV_SIZE (8 * 1024) 97 98 #if defined(CONFIG_ENV_IS_IN_MMC) 99 #define CONFIG_SYS_MMC_ENV_DEV 1 100 #define CONFIG_SYS_MMC_ENV_PART 2 101 #define CONFIG_ENV_OFFSET 0x0 102 #endif 103 104 #endif /* __EL6Q_COMMON_CONFIG_H */ 105