xref: /openbmc/u-boot/include/configs/dh_imx6.h (revision 66c433ed)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * DHCOM DH-iMX6 PDK board configuration
4  *
5  * Copyright (C) 2017 Marek Vasut <marex@denx.de>
6  */
7 
8 #ifndef __DH_IMX6_CONFIG_H
9 #define __DH_IMX6_CONFIG_H
10 
11 #include <asm/arch/imx-regs.h>
12 
13 #include "mx6_common.h"
14 
15 /*
16  * SPI NOR layout:
17  * 0x00_0000-0x00_ffff ... U-Boot SPL
18  * 0x01_0000-0x0f_ffff ... U-Boot
19  * 0x10_0000-0x10_ffff ... U-Boot env #1
20  * 0x11_0000-0x11_ffff ... U-Boot env #2
21  * 0x12_0000-0x1f_ffff ... UNUSED
22  */
23 
24 /* SPL */
25 #include "imx6_spl.h"			/* common IMX6 SPL configuration */
26 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x11400
27 #define CONFIG_SPL_TARGET		"u-boot-with-spl.imx"
28 
29 /* Miscellaneous configurable options */
30 
31 #define CONFIG_CMDLINE_TAG
32 #define CONFIG_SETUP_MEMORY_TAGS
33 #define CONFIG_INITRD_TAG
34 #define CONFIG_REVISION_TAG
35 
36 #define CONFIG_BZIP2
37 
38 /* Size of malloc() pool */
39 #define CONFIG_SYS_MALLOC_LEN		(4 * SZ_1M)
40 
41 /* Bootcounter */
42 #define CONFIG_SYS_BOOTCOUNT_BE
43 
44 /* FEC ethernet */
45 #define IMX_FEC_BASE			ENET_BASE_ADDR
46 #define CONFIG_FEC_XCV_TYPE		RMII
47 #define CONFIG_ETHPRIME			"FEC"
48 #define CONFIG_FEC_MXC_PHYADDR		0
49 #define CONFIG_ARP_TIMEOUT		200UL
50 
51 /* Fuses */
52 #ifdef CONFIG_CMD_FUSE
53 #define CONFIG_MXC_OCOTP
54 #endif
55 
56 /* I2C Configs */
57 #define CONFIG_SYS_I2C
58 #define CONFIG_SYS_I2C_MXC
59 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
60 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
61 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
62 #define CONFIG_SYS_I2C_SPEED		100000
63 
64 /* MMC Configs */
65 #define CONFIG_FSL_USDHC
66 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
67 #define CONFIG_SYS_FSL_USDHC_NUM	3
68 #define CONFIG_SYS_MMC_ENV_DEV		2 /* 1 = SDHC3, 2 = SDHC4 (eMMC) */
69 
70 /* SATA Configs */
71 #ifdef CONFIG_CMD_SATA
72 #define CONFIG_SYS_SATA_MAX_DEVICE	1
73 #define CONFIG_DWC_AHSATA_PORT_ID	0
74 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
75 #define CONFIG_LBA48
76 #endif
77 
78 /* SPI Flash Configs */
79 
80 /* UART */
81 #define CONFIG_MXC_UART
82 #define CONFIG_MXC_UART_BASE		UART1_BASE
83 #define CONFIG_BAUDRATE			115200
84 
85 /* USB Configs */
86 #ifdef CONFIG_CMD_USB
87 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
88 #define CONFIG_USB_HOST_ETHER
89 #define CONFIG_USB_ETHER_ASIX
90 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
91 #define CONFIG_MXC_USB_FLAGS		0
92 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2 /* Enabled USB controller number */
93 
94 /* USB Gadget (DFU, UMS) */
95 #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
96 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	(16 * 1024 * 1024)
97 #define DFU_DEFAULT_POLL_TIMEOUT	300
98 
99 /* USB IDs */
100 #define CONFIG_G_DNL_UMS_VENDOR_NUM	0x0525
101 #define CONFIG_G_DNL_UMS_PRODUCT_NUM	0xA4A5
102 #endif
103 #endif
104 
105 /* Watchdog */
106 #define CONFIG_WATCHDOG_TIMEOUT_MSECS	60000
107 
108 /* allow to overwrite serial and ethaddr */
109 #define CONFIG_ENV_OVERWRITE
110 
111 #define CONFIG_LOADADDR			0x12000000
112 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
113 
114 #ifndef CONFIG_SPL_BUILD
115 #define CONFIG_EXTRA_ENV_SETTINGS	\
116 	"console=ttymxc0,115200\0"	\
117 	"fdt_addr=0x18000000\0"		\
118 	"fdt_high=0xffffffff\0"		\
119 	"initrd_high=0xffffffff\0"	\
120 	"kernel_addr_r=0x10008000\0"	\
121 	"fdt_addr_r=0x13000000\0"	\
122 	"ramdisk_addr_r=0x18000000\0"	\
123 	"scriptaddr=0x14000000\0"	\
124 	"fdtfile=imx6q-dhcom-pdk2.dtb\0"\
125 	BOOTENV
126 
127 #define CONFIG_BOOTCOMMAND		"run distro_bootcmd"
128 
129 #define BOOT_TARGET_DEVICES(func) \
130 	func(MMC, mmc, 0) \
131 	func(MMC, mmc, 2) \
132 	func(USB, usb, 1) \
133 	func(SATA, sata, 0) \
134 	func(DHCP, dhcp, na)
135 
136 #include <config_distro_bootcmd.h>
137 #endif
138 
139 /* Physical Memory Map */
140 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
141 
142 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
143 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
144 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
145 
146 #define CONFIG_SYS_INIT_SP_OFFSET \
147 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
148 
149 #define CONFIG_SYS_INIT_SP_ADDR \
150 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
151 
152 #define CONFIG_SYS_MEMTEST_START	0x10000000
153 #define CONFIG_SYS_MEMTEST_END		0x20000000
154 #define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000
155 
156 /* Environment */
157 #define CONFIG_ENV_SIZE			(16 * 1024)
158 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
159 
160 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
161 #define CONFIG_ENV_OFFSET		(1024 * 1024)
162 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
163 #define CONFIG_ENV_OFFSET_REDUND	\
164 	(CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
165 #define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
166 #endif
167 
168 #endif	/* __DH_IMX6_CONFIG_H */
169