1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2011
4  * Marvell Semiconductor <www.marvell.com>
5  * Written-by: Lei Wen <leiwen@marvell.com>
6  */
7 
8 /*
9  * This file should be included in board config header file.
10  *
11  * It supports common definitions for MVEBU platforms
12  */
13 
14 #ifndef _MVEBU_CONFIG_H
15 #define _MVEBU_CONFIG_H
16 
17 #include <asm/arch/soc.h>
18 
19 #if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_375) \
20 	|| defined(CONFIG_ARMADA_38X)
21 /*
22  * Set this for the common xor register definitions needed in dram.c
23  * for A38x as well here.
24  */
25 #define MV88F78X60 /* for the DDR training bin_hdr code */
26 #endif
27 
28 #define CONFIG_SYS_L2_PL310
29 
30 #ifdef CONFIG_SPL_BUILD
31 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
32 #endif
33 
34 /*
35  * By default the generated mvebu kwbimage.cfg is used
36  * If for some board, different configuration file need to be used,
37  * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file
38  */
39 #ifndef CONFIG_SYS_KWD_CONFIG
40 #define	CONFIG_SYS_KWD_CONFIG	arch/arm/mach-mvebu/kwbimage.cfg
41 #endif /* CONFIG_SYS_KWD_CONFIG */
42 
43 /* end of 16M scrubbed by training in bootrom */
44 #define CONFIG_SYS_INIT_SP_ADDR		0x00FF0000
45 
46 #define MV_UART_CONSOLE_BASE		MVEBU_UART0_BASE
47 
48 /* Needed for SPI NOR booting in SPL */
49 #define CONFIG_DM_SEQ_ALIAS		1
50 
51 /*
52  * Ethernet Driver configuration
53  */
54 #ifdef CONFIG_CMD_NET
55 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
56 #define CONFIG_ARP_TIMEOUT	200
57 #define CONFIG_NET_RETRY_COUNT	50
58 #endif /* CONFIG_CMD_NET */
59 
60 /*
61  * I2C related stuff
62  */
63 #ifdef CONFIG_CMD_I2C
64 #ifndef CONFIG_SYS_I2C_SOFT
65 #define CONFIG_I2C_MVTWSI
66 #endif
67 #define CONFIG_SYS_I2C_SLAVE		0x0
68 #define CONFIG_SYS_I2C_SPEED		100000
69 #endif
70 
71 /* Use common timer */
72 #define CONFIG_SYS_TIMER_COUNTS_DOWN
73 #define CONFIG_SYS_TIMER_COUNTER	(MVEBU_TIMER_BASE + 0x14)
74 #define CONFIG_SYS_TIMER_RATE		25000000
75 
76 #endif /* __MVEBU_CONFIG_H */
77