Searched defs:_COMPUTE_GPU_CLOCK_OUTPUT_PARAMETERS_V1_7 (Results 1 – 1 of 1) sorted by relevance
580 typedef struct _COMPUTE_GPU_CLOCK_OUTPUT_PARAMETERS_V1_7 struct582 …COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider583 USHORT usSclk_fcw_frac; //fractional divider of fcw = usSclk_fcw_frac/65536584 USHORT usSclk_fcw_int; //integer divider of fcwc585 UCHAR ucSclkPostDiv; //PLL post divider = 2^ucSclkPostDiv586 UCHAR ucSclkVcoMode; //0: 4G~8Ghz, 1:3G~6Ghz,3: 2G~4Ghz, 2:Reserved587 UCHAR ucSclkPllRange; //GreenTable SCLK PLL range entry index ( 0~7 )588 UCHAR ucSscEnable;589 USHORT usSsc_fcw1_frac; //fcw1_frac when SSC enable590 USHORT usSsc_fcw1_int; //fcw1_int when SSC enable[all …]