1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 #ifndef _ASM_POWERPC_CODE_PATCHING_H
3 #define _ASM_POWERPC_CODE_PATCHING_H
4
5 /*
6 * Copyright 2008, Michael Ellerman, IBM Corporation.
7 */
8
9 #include <asm/types.h>
10 #include <asm/ppc-opcode.h>
11 #include <linux/string.h>
12 #include <linux/kallsyms.h>
13 #include <asm/asm-compat.h>
14 #include <asm/inst.h>
15
16 /* Flags for create_branch:
17 * "b" == create_branch(addr, target, 0);
18 * "ba" == create_branch(addr, target, BRANCH_ABSOLUTE);
19 * "bl" == create_branch(addr, target, BRANCH_SET_LINK);
20 * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK);
21 */
22 #define BRANCH_SET_LINK 0x1
23 #define BRANCH_ABSOLUTE 0x2
24
25 /*
26 * Powerpc branch instruction is :
27 *
28 * 0 6 30 31
29 * +---------+----------------+---+---+
30 * | opcode | LI |AA |LK |
31 * +---------+----------------+---+---+
32 * Where AA = 0 and LK = 0
33 *
34 * LI is a signed 24 bits integer. The real branch offset is computed
35 * by: imm32 = SignExtend(LI:'0b00', 32);
36 *
37 * So the maximum forward branch should be:
38 * (0x007fffff << 2) = 0x01fffffc = 0x1fffffc
39 * The maximum backward branch should be:
40 * (0xff800000 << 2) = 0xfe000000 = -0x2000000
41 */
is_offset_in_branch_range(long offset)42 static inline bool is_offset_in_branch_range(long offset)
43 {
44 return (offset >= -0x2000000 && offset <= 0x1fffffc && !(offset & 0x3));
45 }
46
is_offset_in_cond_branch_range(long offset)47 static inline bool is_offset_in_cond_branch_range(long offset)
48 {
49 return offset >= -0x8000 && offset <= 0x7fff && !(offset & 0x3);
50 }
51
create_branch(ppc_inst_t * instr,const u32 * addr,unsigned long target,int flags)52 static inline int create_branch(ppc_inst_t *instr, const u32 *addr,
53 unsigned long target, int flags)
54 {
55 long offset;
56
57 *instr = ppc_inst(0);
58 offset = target;
59 if (! (flags & BRANCH_ABSOLUTE))
60 offset = offset - (unsigned long)addr;
61
62 /* Check we can represent the target in the instruction format */
63 if (!is_offset_in_branch_range(offset))
64 return 1;
65
66 /* Mask out the flags and target, so they don't step on each other. */
67 *instr = ppc_inst(0x48000000 | (flags & 0x3) | (offset & 0x03FFFFFC));
68
69 return 0;
70 }
71
72 int create_cond_branch(ppc_inst_t *instr, const u32 *addr,
73 unsigned long target, int flags);
74 int patch_branch(u32 *addr, unsigned long target, int flags);
75 int patch_instruction(u32 *addr, ppc_inst_t instr);
76 int raw_patch_instruction(u32 *addr, ppc_inst_t instr);
77
patch_site_addr(s32 * site)78 static inline unsigned long patch_site_addr(s32 *site)
79 {
80 return (unsigned long)site + *site;
81 }
82
patch_instruction_site(s32 * site,ppc_inst_t instr)83 static inline int patch_instruction_site(s32 *site, ppc_inst_t instr)
84 {
85 return patch_instruction((u32 *)patch_site_addr(site), instr);
86 }
87
patch_branch_site(s32 * site,unsigned long target,int flags)88 static inline int patch_branch_site(s32 *site, unsigned long target, int flags)
89 {
90 return patch_branch((u32 *)patch_site_addr(site), target, flags);
91 }
92
modify_instruction(unsigned int * addr,unsigned int clr,unsigned int set)93 static inline int modify_instruction(unsigned int *addr, unsigned int clr,
94 unsigned int set)
95 {
96 return patch_instruction(addr, ppc_inst((*addr & ~clr) | set));
97 }
98
modify_instruction_site(s32 * site,unsigned int clr,unsigned int set)99 static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned int set)
100 {
101 return modify_instruction((unsigned int *)patch_site_addr(site), clr, set);
102 }
103
branch_opcode(ppc_inst_t instr)104 static inline unsigned int branch_opcode(ppc_inst_t instr)
105 {
106 return ppc_inst_primary_opcode(instr) & 0x3F;
107 }
108
instr_is_branch_iform(ppc_inst_t instr)109 static inline int instr_is_branch_iform(ppc_inst_t instr)
110 {
111 return branch_opcode(instr) == 18;
112 }
113
instr_is_branch_bform(ppc_inst_t instr)114 static inline int instr_is_branch_bform(ppc_inst_t instr)
115 {
116 return branch_opcode(instr) == 16;
117 }
118
119 int instr_is_relative_branch(ppc_inst_t instr);
120 int instr_is_relative_link_branch(ppc_inst_t instr);
121 unsigned long branch_target(const u32 *instr);
122 int translate_branch(ppc_inst_t *instr, const u32 *dest, const u32 *src);
123 bool is_conditional_branch(ppc_inst_t instr);
124
125 #define OP_RT_RA_MASK 0xffff0000UL
126 #define LIS_R2 (PPC_RAW_LIS(_R2, 0))
127 #define ADDIS_R2_R12 (PPC_RAW_ADDIS(_R2, _R12, 0))
128 #define ADDI_R2_R2 (PPC_RAW_ADDI(_R2, _R2, 0))
129
130
ppc_function_entry(void * func)131 static inline unsigned long ppc_function_entry(void *func)
132 {
133 #ifdef CONFIG_PPC64_ELF_ABI_V2
134 u32 *insn = func;
135
136 /*
137 * A PPC64 ABIv2 function may have a local and a global entry
138 * point. We need to use the local entry point when patching
139 * functions, so identify and step over the global entry point
140 * sequence.
141 *
142 * The global entry point sequence is always of the form:
143 *
144 * addis r2,r12,XXXX
145 * addi r2,r2,XXXX
146 *
147 * A linker optimisation may convert the addis to lis:
148 *
149 * lis r2,XXXX
150 * addi r2,r2,XXXX
151 */
152 if ((((*insn & OP_RT_RA_MASK) == ADDIS_R2_R12) ||
153 ((*insn & OP_RT_RA_MASK) == LIS_R2)) &&
154 ((*(insn+1) & OP_RT_RA_MASK) == ADDI_R2_R2))
155 return (unsigned long)(insn + 2);
156 else
157 return (unsigned long)func;
158 #elif defined(CONFIG_PPC64_ELF_ABI_V1)
159 /*
160 * On PPC64 ABIv1 the function pointer actually points to the
161 * function's descriptor. The first entry in the descriptor is the
162 * address of the function text.
163 */
164 return ((struct func_desc *)func)->addr;
165 #else
166 return (unsigned long)func;
167 #endif
168 }
169
ppc_global_function_entry(void * func)170 static inline unsigned long ppc_global_function_entry(void *func)
171 {
172 #ifdef CONFIG_PPC64_ELF_ABI_V2
173 /* PPC64 ABIv2 the global entry point is at the address */
174 return (unsigned long)func;
175 #else
176 /* All other cases there is no change vs ppc_function_entry() */
177 return ppc_function_entry(func);
178 #endif
179 }
180
181 /*
182 * Wrapper around kallsyms_lookup() to return function entry address:
183 * - For ABIv1, we lookup the dot variant.
184 * - For ABIv2, we return the local entry point.
185 */
ppc_kallsyms_lookup_name(const char * name)186 static inline unsigned long ppc_kallsyms_lookup_name(const char *name)
187 {
188 unsigned long addr;
189 #ifdef CONFIG_PPC64_ELF_ABI_V1
190 /* check for dot variant */
191 char dot_name[1 + KSYM_NAME_LEN];
192 bool dot_appended = false;
193
194 if (strnlen(name, KSYM_NAME_LEN) >= KSYM_NAME_LEN)
195 return 0;
196
197 if (name[0] != '.') {
198 dot_name[0] = '.';
199 dot_name[1] = '\0';
200 strlcat(dot_name, name, sizeof(dot_name));
201 dot_appended = true;
202 } else {
203 dot_name[0] = '\0';
204 strlcat(dot_name, name, sizeof(dot_name));
205 }
206 addr = kallsyms_lookup_name(dot_name);
207 if (!addr && dot_appended)
208 /* Let's try the original non-dot symbol lookup */
209 addr = kallsyms_lookup_name(name);
210 #elif defined(CONFIG_PPC64_ELF_ABI_V2)
211 addr = kallsyms_lookup_name(name);
212 if (addr)
213 addr = ppc_function_entry((void *)addr);
214 #else
215 addr = kallsyms_lookup_name(name);
216 #endif
217 return addr;
218 }
219
220 /*
221 * Some instruction encodings commonly used in dynamic ftracing
222 * and function live patching.
223 */
224
225 /* This must match the definition of STK_GOT in <asm/ppc_asm.h> */
226 #ifdef CONFIG_PPC64_ELF_ABI_V2
227 #define R2_STACK_OFFSET 24
228 #else
229 #define R2_STACK_OFFSET 40
230 #endif
231
232 #define PPC_INST_LD_TOC PPC_RAW_LD(_R2, _R1, R2_STACK_OFFSET)
233
234 /* usually preceded by a mflr r0 */
235 #define PPC_INST_STD_LR PPC_RAW_STD(_R0, _R1, PPC_LR_STKOFF)
236
237 #endif /* _ASM_POWERPC_CODE_PATCHING_H */
238