xref: /openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h (revision d94604d558cda9f89722c967d6f8d6269a2db21c)
1  /* SPDX-License-Identifier: GPL-2.0+ */
2  /*
3   * Copyright 2018 NXP
4   * Copyright 2015 Freescale Semiconductor, Inc.
5   */
6  
7  #ifndef __FSL_SERDES_H__
8  #define __FSL_SERDES_H__
9  
10  #include <config.h>
11  
12  #ifdef CONFIG_FSL_LSCH3
13  enum srds_prtcl {
14  	/*
15  	 * Nobody will check whether the device 'NONE' has been configured,
16  	 * So use it to indicate if the serdes_prtcl_map has been initialized.
17  	 */
18  	NONE = 0,
19  	PCIE1,
20  	PCIE2,
21  	PCIE3,
22  	PCIE4,
23  	PCIE5,
24  	PCIE6,
25  	SATA1,
26  	SATA2,
27  	SATA3,
28  	SATA4,
29  	XAUI1,
30  	XAUI2,
31  	XFI1,
32  	XFI2,
33  	XFI3,
34  	XFI4,
35  	XFI5,
36  	XFI6,
37  	XFI7,
38  	XFI8,
39  	XFI9,
40  	XFI10,
41  	XFI11,
42  	XFI12,
43  	XFI13,
44  	XFI14,
45  	SGMII1,
46  	SGMII2,
47  	SGMII3,
48  	SGMII4,
49  	SGMII5,
50  	SGMII6,
51  	SGMII7,
52  	SGMII8,
53  	SGMII9,
54  	SGMII10,
55  	SGMII11,
56  	SGMII12,
57  	SGMII13,
58  	SGMII14,
59  	SGMII15,
60  	SGMII16,
61  	SGMII17,
62  	SGMII18,
63  	QSGMII_A,
64  	QSGMII_B,
65  	QSGMII_C,
66  	QSGMII_D,
67  	_25GE1,
68  	_25GE2,
69  	_25GE3,
70  	_25GE4,
71  	_25GE5,
72  	_25GE6,
73  	_25GE7,
74  	_25GE8,
75  	_25GE9,
76  	_25GE10,
77  	_40GE1,
78  	_40GE2,
79  	_50GE1,
80  	_50GE2,
81  	_100GE1,
82  	_100GE2,
83  	SERDES_PRCTL_COUNT
84  };
85  
86  enum srds {
87  	FSL_SRDS_1  = 0,
88  	FSL_SRDS_2  = 1,
89  	NXP_SRDS_3  = 2,
90  };
91  #elif defined(CONFIG_FSL_LSCH2)
92  enum srds_prtcl {
93  	/*
94  	 * Nobody will check whether the device 'NONE' has been configured,
95  	 * So use it to indicate if the serdes_prtcl_map has been initialized.
96  	 */
97  	NONE = 0,
98  	PCIE1,
99  	PCIE2,
100  	PCIE3,
101  	PCIE4,
102  	SATA1,
103  	SATA2,
104  	SRIO1,
105  	SRIO2,
106  	SGMII_FM1_DTSEC1,
107  	SGMII_FM1_DTSEC2,
108  	SGMII_FM1_DTSEC3,
109  	SGMII_FM1_DTSEC4,
110  	SGMII_FM1_DTSEC5,
111  	SGMII_FM1_DTSEC6,
112  	SGMII_FM1_DTSEC9,
113  	SGMII_FM1_DTSEC10,
114  	SGMII_FM2_DTSEC1,
115  	SGMII_FM2_DTSEC2,
116  	SGMII_FM2_DTSEC3,
117  	SGMII_FM2_DTSEC4,
118  	SGMII_FM2_DTSEC5,
119  	SGMII_FM2_DTSEC6,
120  	SGMII_FM2_DTSEC9,
121  	SGMII_FM2_DTSEC10,
122  	SGMII_TSEC1,
123  	SGMII_TSEC2,
124  	SGMII_TSEC3,
125  	SGMII_TSEC4,
126  	XAUI_FM1,
127  	XAUI_FM2,
128  	AURORA,
129  	CPRI1,
130  	CPRI2,
131  	CPRI3,
132  	CPRI4,
133  	CPRI5,
134  	CPRI6,
135  	CPRI7,
136  	CPRI8,
137  	XAUI_FM1_MAC9,
138  	XAUI_FM1_MAC10,
139  	XAUI_FM2_MAC9,
140  	XAUI_FM2_MAC10,
141  	HIGIG_FM1_MAC9,
142  	HIGIG_FM1_MAC10,
143  	HIGIG_FM2_MAC9,
144  	HIGIG_FM2_MAC10,
145  	QSGMII_FM1_A,		/* A indicates MACs 1,2,5,6 */
146  	QSGMII_FM1_B,		/* B indicates MACs 5,6,9,10 */
147  	QSGMII_FM2_A,
148  	QSGMII_FM2_B,
149  	XFI_FM1_MAC1,
150  	XFI_FM1_MAC2,
151  	XFI_FM1_MAC9,
152  	XFI_FM1_MAC10,
153  	XFI_FM2_MAC9,
154  	XFI_FM2_MAC10,
155  	INTERLAKEN,
156  	QSGMII_SW1_A,		/* Indicates ports on L2 Switch */
157  	QSGMII_SW1_B,
158  	SGMII_2500_FM1_DTSEC1,
159  	SGMII_2500_FM1_DTSEC2,
160  	SGMII_2500_FM1_DTSEC3,
161  	SGMII_2500_FM1_DTSEC4,
162  	SGMII_2500_FM1_DTSEC5,
163  	SGMII_2500_FM1_DTSEC6,
164  	SGMII_2500_FM1_DTSEC9,
165  	SGMII_2500_FM1_DTSEC10,
166  	SGMII_2500_FM2_DTSEC1,
167  	SGMII_2500_FM2_DTSEC2,
168  	SGMII_2500_FM2_DTSEC3,
169  	SGMII_2500_FM2_DTSEC4,
170  	SGMII_2500_FM2_DTSEC5,
171  	SGMII_2500_FM2_DTSEC6,
172  	SGMII_2500_FM2_DTSEC9,
173  	SGMII_2500_FM2_DTSEC10,
174  	TX_CLK,
175  	SERDES_PRCTL_COUNT
176  };
177  
178  enum srds {
179  	FSL_SRDS_1  = 0,
180  	FSL_SRDS_2  = 1,
181  };
182  
183  #endif
184  
185  int is_serdes_configured(enum srds_prtcl device);
186  void fsl_serdes_init(void);
187  int serdes_get_first_lane(u32 sd, enum srds_prtcl device);
188  enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane);
189  int is_serdes_prtcl_valid(int serdes, u32 prtcl);
190  int serdes_get_number(int serdes, int cfg);
191  void fsl_rgmii_init(void);
192  
193  #ifdef CONFIG_FSL_LSCH2
194  const char *serdes_clock_to_string(u32 clock);
195  int get_serdes_protocol(void);
196  #endif
197  #ifdef CONFIG_SYS_HAS_SERDES
198  /* Get the volt of SVDD in unit mV */
199  int get_serdes_volt(void);
200  /* Set the volt of SVDD in unit mV */
201  int set_serdes_volt(int svdd);
202  /* The target volt of SVDD in unit mV */
203  int setup_serdes_volt(u32 svdd);
204  #endif
205  
206  #endif /* __FSL_SERDES_H__ */
207