xref: /openbmc/linux/sound/soc/codecs/wm8983.h (revision d2912cb1)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * wm8983.h  --  WM8983 ALSA SoC Audio driver
4  *
5  * Copyright 2011 Wolfson Microelectronics plc
6  *
7  * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
8  */
9 
10 #ifndef _WM8983_H
11 #define _WM8983_H
12 
13 /*
14  * Register values.
15  */
16 #define WM8983_SOFTWARE_RESET                   0x00
17 #define WM8983_POWER_MANAGEMENT_1               0x01
18 #define WM8983_POWER_MANAGEMENT_2               0x02
19 #define WM8983_POWER_MANAGEMENT_3               0x03
20 #define WM8983_AUDIO_INTERFACE                  0x04
21 #define WM8983_COMPANDING_CONTROL               0x05
22 #define WM8983_CLOCK_GEN_CONTROL                0x06
23 #define WM8983_ADDITIONAL_CONTROL               0x07
24 #define WM8983_GPIO_CONTROL                     0x08
25 #define WM8983_JACK_DETECT_CONTROL_1            0x09
26 #define WM8983_DAC_CONTROL                      0x0A
27 #define WM8983_LEFT_DAC_DIGITAL_VOL             0x0B
28 #define WM8983_RIGHT_DAC_DIGITAL_VOL            0x0C
29 #define WM8983_JACK_DETECT_CONTROL_2            0x0D
30 #define WM8983_ADC_CONTROL                      0x0E
31 #define WM8983_LEFT_ADC_DIGITAL_VOL             0x0F
32 #define WM8983_RIGHT_ADC_DIGITAL_VOL            0x10
33 #define WM8983_EQ1_LOW_SHELF                    0x12
34 #define WM8983_EQ2_PEAK_1                       0x13
35 #define WM8983_EQ3_PEAK_2                       0x14
36 #define WM8983_EQ4_PEAK_3                       0x15
37 #define WM8983_EQ5_HIGH_SHELF                   0x16
38 #define WM8983_DAC_LIMITER_1                    0x18
39 #define WM8983_DAC_LIMITER_2                    0x19
40 #define WM8983_NOTCH_FILTER_1                   0x1B
41 #define WM8983_NOTCH_FILTER_2                   0x1C
42 #define WM8983_NOTCH_FILTER_3                   0x1D
43 #define WM8983_NOTCH_FILTER_4                   0x1E
44 #define WM8983_ALC_CONTROL_1                    0x20
45 #define WM8983_ALC_CONTROL_2                    0x21
46 #define WM8983_ALC_CONTROL_3                    0x22
47 #define WM8983_NOISE_GATE                       0x23
48 #define WM8983_PLL_N                            0x24
49 #define WM8983_PLL_K_1                          0x25
50 #define WM8983_PLL_K_2                          0x26
51 #define WM8983_PLL_K_3                          0x27
52 #define WM8983_3D_CONTROL                       0x29
53 #define WM8983_OUT4_TO_ADC                      0x2A
54 #define WM8983_BEEP_CONTROL                     0x2B
55 #define WM8983_INPUT_CTRL                       0x2C
56 #define WM8983_LEFT_INP_PGA_GAIN_CTRL           0x2D
57 #define WM8983_RIGHT_INP_PGA_GAIN_CTRL          0x2E
58 #define WM8983_LEFT_ADC_BOOST_CTRL              0x2F
59 #define WM8983_RIGHT_ADC_BOOST_CTRL             0x30
60 #define WM8983_OUTPUT_CTRL                      0x31
61 #define WM8983_LEFT_MIXER_CTRL                  0x32
62 #define WM8983_RIGHT_MIXER_CTRL                 0x33
63 #define WM8983_LOUT1_HP_VOLUME_CTRL             0x34
64 #define WM8983_ROUT1_HP_VOLUME_CTRL             0x35
65 #define WM8983_LOUT2_SPK_VOLUME_CTRL            0x36
66 #define WM8983_ROUT2_SPK_VOLUME_CTRL            0x37
67 #define WM8983_OUT3_MIXER_CTRL                  0x38
68 #define WM8983_OUT4_MONO_MIX_CTRL               0x39
69 #define WM8983_BIAS_CTRL                        0x3D
70 
71 #define WM8983_REGISTER_COUNT                   59
72 #define WM8983_MAX_REGISTER                     0x3F
73 
74 /*
75  * Field Definitions.
76  */
77 
78 /*
79  * R0 (0x00) - Software Reset
80  */
81 #define WM8983_SOFTWARE_RESET_MASK              0x01FF  /* SOFTWARE_RESET - [8:0] */
82 #define WM8983_SOFTWARE_RESET_SHIFT                  0  /* SOFTWARE_RESET - [8:0] */
83 #define WM8983_SOFTWARE_RESET_WIDTH                  9  /* SOFTWARE_RESET - [8:0] */
84 
85 /*
86  * R1 (0x01) - Power management 1
87  */
88 #define WM8983_BUFDCOPEN                        0x0100  /* BUFDCOPEN */
89 #define WM8983_BUFDCOPEN_MASK                   0x0100  /* BUFDCOPEN */
90 #define WM8983_BUFDCOPEN_SHIFT                       8  /* BUFDCOPEN */
91 #define WM8983_BUFDCOPEN_WIDTH                       1  /* BUFDCOPEN */
92 #define WM8983_OUT4MIXEN                        0x0080  /* OUT4MIXEN */
93 #define WM8983_OUT4MIXEN_MASK                   0x0080  /* OUT4MIXEN */
94 #define WM8983_OUT4MIXEN_SHIFT                       7  /* OUT4MIXEN */
95 #define WM8983_OUT4MIXEN_WIDTH                       1  /* OUT4MIXEN */
96 #define WM8983_OUT3MIXEN                        0x0040  /* OUT3MIXEN */
97 #define WM8983_OUT3MIXEN_MASK                   0x0040  /* OUT3MIXEN */
98 #define WM8983_OUT3MIXEN_SHIFT                       6  /* OUT3MIXEN */
99 #define WM8983_OUT3MIXEN_WIDTH                       1  /* OUT3MIXEN */
100 #define WM8983_PLLEN                            0x0020  /* PLLEN */
101 #define WM8983_PLLEN_MASK                       0x0020  /* PLLEN */
102 #define WM8983_PLLEN_SHIFT                           5  /* PLLEN */
103 #define WM8983_PLLEN_WIDTH                           1  /* PLLEN */
104 #define WM8983_MICBEN                           0x0010  /* MICBEN */
105 #define WM8983_MICBEN_MASK                      0x0010  /* MICBEN */
106 #define WM8983_MICBEN_SHIFT                          4  /* MICBEN */
107 #define WM8983_MICBEN_WIDTH                          1  /* MICBEN */
108 #define WM8983_BIASEN                           0x0008  /* BIASEN */
109 #define WM8983_BIASEN_MASK                      0x0008  /* BIASEN */
110 #define WM8983_BIASEN_SHIFT                          3  /* BIASEN */
111 #define WM8983_BIASEN_WIDTH                          1  /* BIASEN */
112 #define WM8983_BUFIOEN                          0x0004  /* BUFIOEN */
113 #define WM8983_BUFIOEN_MASK                     0x0004  /* BUFIOEN */
114 #define WM8983_BUFIOEN_SHIFT                         2  /* BUFIOEN */
115 #define WM8983_BUFIOEN_WIDTH                         1  /* BUFIOEN */
116 #define WM8983_VMIDSEL_MASK                     0x0003  /* VMIDSEL - [1:0] */
117 #define WM8983_VMIDSEL_SHIFT                         0  /* VMIDSEL - [1:0] */
118 #define WM8983_VMIDSEL_WIDTH                         2  /* VMIDSEL - [1:0] */
119 
120 /*
121  * R2 (0x02) - Power management 2
122  */
123 #define WM8983_ROUT1EN                          0x0100  /* ROUT1EN */
124 #define WM8983_ROUT1EN_MASK                     0x0100  /* ROUT1EN */
125 #define WM8983_ROUT1EN_SHIFT                         8  /* ROUT1EN */
126 #define WM8983_ROUT1EN_WIDTH                         1  /* ROUT1EN */
127 #define WM8983_LOUT1EN                          0x0080  /* LOUT1EN */
128 #define WM8983_LOUT1EN_MASK                     0x0080  /* LOUT1EN */
129 #define WM8983_LOUT1EN_SHIFT                         7  /* LOUT1EN */
130 #define WM8983_LOUT1EN_WIDTH                         1  /* LOUT1EN */
131 #define WM8983_SLEEP                            0x0040  /* SLEEP */
132 #define WM8983_SLEEP_MASK                       0x0040  /* SLEEP */
133 #define WM8983_SLEEP_SHIFT                           6  /* SLEEP */
134 #define WM8983_SLEEP_WIDTH                           1  /* SLEEP */
135 #define WM8983_BOOSTENR                         0x0020  /* BOOSTENR */
136 #define WM8983_BOOSTENR_MASK                    0x0020  /* BOOSTENR */
137 #define WM8983_BOOSTENR_SHIFT                        5  /* BOOSTENR */
138 #define WM8983_BOOSTENR_WIDTH                        1  /* BOOSTENR */
139 #define WM8983_BOOSTENL                         0x0010  /* BOOSTENL */
140 #define WM8983_BOOSTENL_MASK                    0x0010  /* BOOSTENL */
141 #define WM8983_BOOSTENL_SHIFT                        4  /* BOOSTENL */
142 #define WM8983_BOOSTENL_WIDTH                        1  /* BOOSTENL */
143 #define WM8983_INPGAENR                         0x0008  /* INPGAENR */
144 #define WM8983_INPGAENR_MASK                    0x0008  /* INPGAENR */
145 #define WM8983_INPGAENR_SHIFT                        3  /* INPGAENR */
146 #define WM8983_INPGAENR_WIDTH                        1  /* INPGAENR */
147 #define WM8983_INPPGAENL                        0x0004  /* INPPGAENL */
148 #define WM8983_INPPGAENL_MASK                   0x0004  /* INPPGAENL */
149 #define WM8983_INPPGAENL_SHIFT                       2  /* INPPGAENL */
150 #define WM8983_INPPGAENL_WIDTH                       1  /* INPPGAENL */
151 #define WM8983_ADCENR                           0x0002  /* ADCENR */
152 #define WM8983_ADCENR_MASK                      0x0002  /* ADCENR */
153 #define WM8983_ADCENR_SHIFT                          1  /* ADCENR */
154 #define WM8983_ADCENR_WIDTH                          1  /* ADCENR */
155 #define WM8983_ADCENL                           0x0001  /* ADCENL */
156 #define WM8983_ADCENL_MASK                      0x0001  /* ADCENL */
157 #define WM8983_ADCENL_SHIFT                          0  /* ADCENL */
158 #define WM8983_ADCENL_WIDTH                          1  /* ADCENL */
159 
160 /*
161  * R3 (0x03) - Power management 3
162  */
163 #define WM8983_OUT4EN                           0x0100  /* OUT4EN */
164 #define WM8983_OUT4EN_MASK                      0x0100  /* OUT4EN */
165 #define WM8983_OUT4EN_SHIFT                          8  /* OUT4EN */
166 #define WM8983_OUT4EN_WIDTH                          1  /* OUT4EN */
167 #define WM8983_OUT3EN                           0x0080  /* OUT3EN */
168 #define WM8983_OUT3EN_MASK                      0x0080  /* OUT3EN */
169 #define WM8983_OUT3EN_SHIFT                          7  /* OUT3EN */
170 #define WM8983_OUT3EN_WIDTH                          1  /* OUT3EN */
171 #define WM8983_LOUT2EN                          0x0040  /* LOUT2EN */
172 #define WM8983_LOUT2EN_MASK                     0x0040  /* LOUT2EN */
173 #define WM8983_LOUT2EN_SHIFT                         6  /* LOUT2EN */
174 #define WM8983_LOUT2EN_WIDTH                         1  /* LOUT2EN */
175 #define WM8983_ROUT2EN                          0x0020  /* ROUT2EN */
176 #define WM8983_ROUT2EN_MASK                     0x0020  /* ROUT2EN */
177 #define WM8983_ROUT2EN_SHIFT                         5  /* ROUT2EN */
178 #define WM8983_ROUT2EN_WIDTH                         1  /* ROUT2EN */
179 #define WM8983_RMIXEN                           0x0008  /* RMIXEN */
180 #define WM8983_RMIXEN_MASK                      0x0008  /* RMIXEN */
181 #define WM8983_RMIXEN_SHIFT                          3  /* RMIXEN */
182 #define WM8983_RMIXEN_WIDTH                          1  /* RMIXEN */
183 #define WM8983_LMIXEN                           0x0004  /* LMIXEN */
184 #define WM8983_LMIXEN_MASK                      0x0004  /* LMIXEN */
185 #define WM8983_LMIXEN_SHIFT                          2  /* LMIXEN */
186 #define WM8983_LMIXEN_WIDTH                          1  /* LMIXEN */
187 #define WM8983_DACENR                           0x0002  /* DACENR */
188 #define WM8983_DACENR_MASK                      0x0002  /* DACENR */
189 #define WM8983_DACENR_SHIFT                          1  /* DACENR */
190 #define WM8983_DACENR_WIDTH                          1  /* DACENR */
191 #define WM8983_DACENL                           0x0001  /* DACENL */
192 #define WM8983_DACENL_MASK                      0x0001  /* DACENL */
193 #define WM8983_DACENL_SHIFT                          0  /* DACENL */
194 #define WM8983_DACENL_WIDTH                          1  /* DACENL */
195 
196 /*
197  * R4 (0x04) - Audio Interface
198  */
199 #define WM8983_BCP                              0x0100  /* BCP */
200 #define WM8983_BCP_MASK                         0x0100  /* BCP */
201 #define WM8983_BCP_SHIFT                             8  /* BCP */
202 #define WM8983_BCP_WIDTH                             1  /* BCP */
203 #define WM8983_LRCP                             0x0080  /* LRCP */
204 #define WM8983_LRCP_MASK                        0x0080  /* LRCP */
205 #define WM8983_LRCP_SHIFT                            7  /* LRCP */
206 #define WM8983_LRCP_WIDTH                            1  /* LRCP */
207 #define WM8983_WL_MASK                          0x0060  /* WL - [6:5] */
208 #define WM8983_WL_SHIFT                              5  /* WL - [6:5] */
209 #define WM8983_WL_WIDTH                              2  /* WL - [6:5] */
210 #define WM8983_FMT_MASK                         0x0018  /* FMT - [4:3] */
211 #define WM8983_FMT_SHIFT                             3  /* FMT - [4:3] */
212 #define WM8983_FMT_WIDTH                             2  /* FMT - [4:3] */
213 #define WM8983_DLRSWAP                          0x0004  /* DLRSWAP */
214 #define WM8983_DLRSWAP_MASK                     0x0004  /* DLRSWAP */
215 #define WM8983_DLRSWAP_SHIFT                         2  /* DLRSWAP */
216 #define WM8983_DLRSWAP_WIDTH                         1  /* DLRSWAP */
217 #define WM8983_ALRSWAP                          0x0002  /* ALRSWAP */
218 #define WM8983_ALRSWAP_MASK                     0x0002  /* ALRSWAP */
219 #define WM8983_ALRSWAP_SHIFT                         1  /* ALRSWAP */
220 #define WM8983_ALRSWAP_WIDTH                         1  /* ALRSWAP */
221 #define WM8983_MONO                             0x0001  /* MONO */
222 #define WM8983_MONO_MASK                        0x0001  /* MONO */
223 #define WM8983_MONO_SHIFT                            0  /* MONO */
224 #define WM8983_MONO_WIDTH                            1  /* MONO */
225 
226 /*
227  * R5 (0x05) - Companding control
228  */
229 #define WM8983_WL8                              0x0020  /* WL8 */
230 #define WM8983_WL8_MASK                         0x0020  /* WL8 */
231 #define WM8983_WL8_SHIFT                             5  /* WL8 */
232 #define WM8983_WL8_WIDTH                             1  /* WL8 */
233 #define WM8983_DAC_COMP_MASK                    0x0018  /* DAC_COMP - [4:3] */
234 #define WM8983_DAC_COMP_SHIFT                        3  /* DAC_COMP - [4:3] */
235 #define WM8983_DAC_COMP_WIDTH                        2  /* DAC_COMP - [4:3] */
236 #define WM8983_ADC_COMP_MASK                    0x0006  /* ADC_COMP - [2:1] */
237 #define WM8983_ADC_COMP_SHIFT                        1  /* ADC_COMP - [2:1] */
238 #define WM8983_ADC_COMP_WIDTH                        2  /* ADC_COMP - [2:1] */
239 #define WM8983_LOOPBACK                         0x0001  /* LOOPBACK */
240 #define WM8983_LOOPBACK_MASK                    0x0001  /* LOOPBACK */
241 #define WM8983_LOOPBACK_SHIFT                        0  /* LOOPBACK */
242 #define WM8983_LOOPBACK_WIDTH                        1  /* LOOPBACK */
243 
244 /*
245  * R6 (0x06) - Clock Gen control
246  */
247 #define WM8983_CLKSEL                           0x0100  /* CLKSEL */
248 #define WM8983_CLKSEL_MASK                      0x0100  /* CLKSEL */
249 #define WM8983_CLKSEL_SHIFT                          8  /* CLKSEL */
250 #define WM8983_CLKSEL_WIDTH                          1  /* CLKSEL */
251 #define WM8983_MCLKDIV_MASK                     0x00E0  /* MCLKDIV - [7:5] */
252 #define WM8983_MCLKDIV_SHIFT                         5  /* MCLKDIV - [7:5] */
253 #define WM8983_MCLKDIV_WIDTH                         3  /* MCLKDIV - [7:5] */
254 #define WM8983_BCLKDIV_MASK                     0x001C  /* BCLKDIV - [4:2] */
255 #define WM8983_BCLKDIV_SHIFT                         2  /* BCLKDIV - [4:2] */
256 #define WM8983_BCLKDIV_WIDTH                         3  /* BCLKDIV - [4:2] */
257 #define WM8983_MS                               0x0001  /* MS */
258 #define WM8983_MS_MASK                          0x0001  /* MS */
259 #define WM8983_MS_SHIFT                              0  /* MS */
260 #define WM8983_MS_WIDTH                              1  /* MS */
261 
262 /*
263  * R7 (0x07) - Additional control
264  */
265 #define WM8983_SR_MASK                          0x000E  /* SR - [3:1] */
266 #define WM8983_SR_SHIFT                              1  /* SR - [3:1] */
267 #define WM8983_SR_WIDTH                              3  /* SR - [3:1] */
268 #define WM8983_SLOWCLKEN                        0x0001  /* SLOWCLKEN */
269 #define WM8983_SLOWCLKEN_MASK                   0x0001  /* SLOWCLKEN */
270 #define WM8983_SLOWCLKEN_SHIFT                       0  /* SLOWCLKEN */
271 #define WM8983_SLOWCLKEN_WIDTH                       1  /* SLOWCLKEN */
272 
273 /*
274  * R8 (0x08) - GPIO Control
275  */
276 #define WM8983_OPCLKDIV_MASK                    0x0030  /* OPCLKDIV - [5:4] */
277 #define WM8983_OPCLKDIV_SHIFT                        4  /* OPCLKDIV - [5:4] */
278 #define WM8983_OPCLKDIV_WIDTH                        2  /* OPCLKDIV - [5:4] */
279 #define WM8983_GPIO1POL                         0x0008  /* GPIO1POL */
280 #define WM8983_GPIO1POL_MASK                    0x0008  /* GPIO1POL */
281 #define WM8983_GPIO1POL_SHIFT                        3  /* GPIO1POL */
282 #define WM8983_GPIO1POL_WIDTH                        1  /* GPIO1POL */
283 #define WM8983_GPIO1SEL_MASK                    0x0007  /* GPIO1SEL - [2:0] */
284 #define WM8983_GPIO1SEL_SHIFT                        0  /* GPIO1SEL - [2:0] */
285 #define WM8983_GPIO1SEL_WIDTH                        3  /* GPIO1SEL - [2:0] */
286 
287 /*
288  * R9 (0x09) - Jack Detect Control 1
289  */
290 #define WM8983_JD_VMID1                         0x0100  /* JD_VMID1 */
291 #define WM8983_JD_VMID1_MASK                    0x0100  /* JD_VMID1 */
292 #define WM8983_JD_VMID1_SHIFT                        8  /* JD_VMID1 */
293 #define WM8983_JD_VMID1_WIDTH                        1  /* JD_VMID1 */
294 #define WM8983_JD_VMID0                         0x0080  /* JD_VMID0 */
295 #define WM8983_JD_VMID0_MASK                    0x0080  /* JD_VMID0 */
296 #define WM8983_JD_VMID0_SHIFT                        7  /* JD_VMID0 */
297 #define WM8983_JD_VMID0_WIDTH                        1  /* JD_VMID0 */
298 #define WM8983_JD_EN                            0x0040  /* JD_EN */
299 #define WM8983_JD_EN_MASK                       0x0040  /* JD_EN */
300 #define WM8983_JD_EN_SHIFT                           6  /* JD_EN */
301 #define WM8983_JD_EN_WIDTH                           1  /* JD_EN */
302 #define WM8983_JD_SEL_MASK                      0x0030  /* JD_SEL - [5:4] */
303 #define WM8983_JD_SEL_SHIFT                          4  /* JD_SEL - [5:4] */
304 #define WM8983_JD_SEL_WIDTH                          2  /* JD_SEL - [5:4] */
305 
306 /*
307  * R10 (0x0A) - DAC Control
308  */
309 #define WM8983_SOFTMUTE                         0x0040  /* SOFTMUTE */
310 #define WM8983_SOFTMUTE_MASK                    0x0040  /* SOFTMUTE */
311 #define WM8983_SOFTMUTE_SHIFT                        6  /* SOFTMUTE */
312 #define WM8983_SOFTMUTE_WIDTH                        1  /* SOFTMUTE */
313 #define WM8983_DACOSR128                        0x0008  /* DACOSR128 */
314 #define WM8983_DACOSR128_MASK                   0x0008  /* DACOSR128 */
315 #define WM8983_DACOSR128_SHIFT                       3  /* DACOSR128 */
316 #define WM8983_DACOSR128_WIDTH                       1  /* DACOSR128 */
317 #define WM8983_AMUTE                            0x0004  /* AMUTE */
318 #define WM8983_AMUTE_MASK                       0x0004  /* AMUTE */
319 #define WM8983_AMUTE_SHIFT                           2  /* AMUTE */
320 #define WM8983_AMUTE_WIDTH                           1  /* AMUTE */
321 #define WM8983_DACRPOL                          0x0002  /* DACRPOL */
322 #define WM8983_DACRPOL_MASK                     0x0002  /* DACRPOL */
323 #define WM8983_DACRPOL_SHIFT                         1  /* DACRPOL */
324 #define WM8983_DACRPOL_WIDTH                         1  /* DACRPOL */
325 #define WM8983_DACLPOL                          0x0001  /* DACLPOL */
326 #define WM8983_DACLPOL_MASK                     0x0001  /* DACLPOL */
327 #define WM8983_DACLPOL_SHIFT                         0  /* DACLPOL */
328 #define WM8983_DACLPOL_WIDTH                         1  /* DACLPOL */
329 
330 /*
331  * R11 (0x0B) - Left DAC digital Vol
332  */
333 #define WM8983_DACVU                            0x0100  /* DACVU */
334 #define WM8983_DACVU_MASK                       0x0100  /* DACVU */
335 #define WM8983_DACVU_SHIFT                           8  /* DACVU */
336 #define WM8983_DACVU_WIDTH                           1  /* DACVU */
337 #define WM8983_DACLVOL_MASK                     0x00FF  /* DACLVOL - [7:0] */
338 #define WM8983_DACLVOL_SHIFT                         0  /* DACLVOL - [7:0] */
339 #define WM8983_DACLVOL_WIDTH                         8  /* DACLVOL - [7:0] */
340 
341 /*
342  * R12 (0x0C) - Right DAC digital vol
343  */
344 #define WM8983_DACVU                            0x0100  /* DACVU */
345 #define WM8983_DACVU_MASK                       0x0100  /* DACVU */
346 #define WM8983_DACVU_SHIFT                           8  /* DACVU */
347 #define WM8983_DACVU_WIDTH                           1  /* DACVU */
348 #define WM8983_DACRVOL_MASK                     0x00FF  /* DACRVOL - [7:0] */
349 #define WM8983_DACRVOL_SHIFT                         0  /* DACRVOL - [7:0] */
350 #define WM8983_DACRVOL_WIDTH                         8  /* DACRVOL - [7:0] */
351 
352 /*
353  * R13 (0x0D) - Jack Detect Control 2
354  */
355 #define WM8983_JD_EN1_MASK                      0x00F0  /* JD_EN1 - [7:4] */
356 #define WM8983_JD_EN1_SHIFT                          4  /* JD_EN1 - [7:4] */
357 #define WM8983_JD_EN1_WIDTH                          4  /* JD_EN1 - [7:4] */
358 #define WM8983_JD_EN0_MASK                      0x000F  /* JD_EN0 - [3:0] */
359 #define WM8983_JD_EN0_SHIFT                          0  /* JD_EN0 - [3:0] */
360 #define WM8983_JD_EN0_WIDTH                          4  /* JD_EN0 - [3:0] */
361 
362 /*
363  * R14 (0x0E) - ADC Control
364  */
365 #define WM8983_HPFEN                            0x0100  /* HPFEN */
366 #define WM8983_HPFEN_MASK                       0x0100  /* HPFEN */
367 #define WM8983_HPFEN_SHIFT                           8  /* HPFEN */
368 #define WM8983_HPFEN_WIDTH                           1  /* HPFEN */
369 #define WM8983_HPFAPP                           0x0080  /* HPFAPP */
370 #define WM8983_HPFAPP_MASK                      0x0080  /* HPFAPP */
371 #define WM8983_HPFAPP_SHIFT                          7  /* HPFAPP */
372 #define WM8983_HPFAPP_WIDTH                          1  /* HPFAPP */
373 #define WM8983_HPFCUT_MASK                      0x0070  /* HPFCUT - [6:4] */
374 #define WM8983_HPFCUT_SHIFT                          4  /* HPFCUT - [6:4] */
375 #define WM8983_HPFCUT_WIDTH                          3  /* HPFCUT - [6:4] */
376 #define WM8983_ADCOSR128                        0x0008  /* ADCOSR128 */
377 #define WM8983_ADCOSR128_MASK                   0x0008  /* ADCOSR128 */
378 #define WM8983_ADCOSR128_SHIFT                       3  /* ADCOSR128 */
379 #define WM8983_ADCOSR128_WIDTH                       1  /* ADCOSR128 */
380 #define WM8983_ADCRPOL                          0x0002  /* ADCRPOL */
381 #define WM8983_ADCRPOL_MASK                     0x0002  /* ADCRPOL */
382 #define WM8983_ADCRPOL_SHIFT                         1  /* ADCRPOL */
383 #define WM8983_ADCRPOL_WIDTH                         1  /* ADCRPOL */
384 #define WM8983_ADCLPOL                          0x0001  /* ADCLPOL */
385 #define WM8983_ADCLPOL_MASK                     0x0001  /* ADCLPOL */
386 #define WM8983_ADCLPOL_SHIFT                         0  /* ADCLPOL */
387 #define WM8983_ADCLPOL_WIDTH                         1  /* ADCLPOL */
388 
389 /*
390  * R15 (0x0F) - Left ADC Digital Vol
391  */
392 #define WM8983_ADCVU                            0x0100  /* ADCVU */
393 #define WM8983_ADCVU_MASK                       0x0100  /* ADCVU */
394 #define WM8983_ADCVU_SHIFT                           8  /* ADCVU */
395 #define WM8983_ADCVU_WIDTH                           1  /* ADCVU */
396 #define WM8983_ADCLVOL_MASK                     0x00FF  /* ADCLVOL - [7:0] */
397 #define WM8983_ADCLVOL_SHIFT                         0  /* ADCLVOL - [7:0] */
398 #define WM8983_ADCLVOL_WIDTH                         8  /* ADCLVOL - [7:0] */
399 
400 /*
401  * R16 (0x10) - Right ADC Digital Vol
402  */
403 #define WM8983_ADCVU                            0x0100  /* ADCVU */
404 #define WM8983_ADCVU_MASK                       0x0100  /* ADCVU */
405 #define WM8983_ADCVU_SHIFT                           8  /* ADCVU */
406 #define WM8983_ADCVU_WIDTH                           1  /* ADCVU */
407 #define WM8983_ADCRVOL_MASK                     0x00FF  /* ADCRVOL - [7:0] */
408 #define WM8983_ADCRVOL_SHIFT                         0  /* ADCRVOL - [7:0] */
409 #define WM8983_ADCRVOL_WIDTH                         8  /* ADCRVOL - [7:0] */
410 
411 /*
412  * R18 (0x12) - EQ1 - low shelf
413  */
414 #define WM8983_EQ3DMODE                         0x0100  /* EQ3DMODE */
415 #define WM8983_EQ3DMODE_MASK                    0x0100  /* EQ3DMODE */
416 #define WM8983_EQ3DMODE_SHIFT                        8  /* EQ3DMODE */
417 #define WM8983_EQ3DMODE_WIDTH                        1  /* EQ3DMODE */
418 #define WM8983_EQ1C_MASK                        0x0060  /* EQ1C - [6:5] */
419 #define WM8983_EQ1C_SHIFT                            5  /* EQ1C - [6:5] */
420 #define WM8983_EQ1C_WIDTH                            2  /* EQ1C - [6:5] */
421 #define WM8983_EQ1G_MASK                        0x001F  /* EQ1G - [4:0] */
422 #define WM8983_EQ1G_SHIFT                            0  /* EQ1G - [4:0] */
423 #define WM8983_EQ1G_WIDTH                            5  /* EQ1G - [4:0] */
424 
425 /*
426  * R19 (0x13) - EQ2 - peak 1
427  */
428 #define WM8983_EQ2BW                            0x0100  /* EQ2BW */
429 #define WM8983_EQ2BW_MASK                       0x0100  /* EQ2BW */
430 #define WM8983_EQ2BW_SHIFT                           8  /* EQ2BW */
431 #define WM8983_EQ2BW_WIDTH                           1  /* EQ2BW */
432 #define WM8983_EQ2C_MASK                        0x0060  /* EQ2C - [6:5] */
433 #define WM8983_EQ2C_SHIFT                            5  /* EQ2C - [6:5] */
434 #define WM8983_EQ2C_WIDTH                            2  /* EQ2C - [6:5] */
435 #define WM8983_EQ2G_MASK                        0x001F  /* EQ2G - [4:0] */
436 #define WM8983_EQ2G_SHIFT                            0  /* EQ2G - [4:0] */
437 #define WM8983_EQ2G_WIDTH                            5  /* EQ2G - [4:0] */
438 
439 /*
440  * R20 (0x14) - EQ3 - peak 2
441  */
442 #define WM8983_EQ3BW                            0x0100  /* EQ3BW */
443 #define WM8983_EQ3BW_MASK                       0x0100  /* EQ3BW */
444 #define WM8983_EQ3BW_SHIFT                           8  /* EQ3BW */
445 #define WM8983_EQ3BW_WIDTH                           1  /* EQ3BW */
446 #define WM8983_EQ3C_MASK                        0x0060  /* EQ3C - [6:5] */
447 #define WM8983_EQ3C_SHIFT                            5  /* EQ3C - [6:5] */
448 #define WM8983_EQ3C_WIDTH                            2  /* EQ3C - [6:5] */
449 #define WM8983_EQ3G_MASK                        0x001F  /* EQ3G - [4:0] */
450 #define WM8983_EQ3G_SHIFT                            0  /* EQ3G - [4:0] */
451 #define WM8983_EQ3G_WIDTH                            5  /* EQ3G - [4:0] */
452 
453 /*
454  * R21 (0x15) - EQ4 - peak 3
455  */
456 #define WM8983_EQ4BW                            0x0100  /* EQ4BW */
457 #define WM8983_EQ4BW_MASK                       0x0100  /* EQ4BW */
458 #define WM8983_EQ4BW_SHIFT                           8  /* EQ4BW */
459 #define WM8983_EQ4BW_WIDTH                           1  /* EQ4BW */
460 #define WM8983_EQ4C_MASK                        0x0060  /* EQ4C - [6:5] */
461 #define WM8983_EQ4C_SHIFT                            5  /* EQ4C - [6:5] */
462 #define WM8983_EQ4C_WIDTH                            2  /* EQ4C - [6:5] */
463 #define WM8983_EQ4G_MASK                        0x001F  /* EQ4G - [4:0] */
464 #define WM8983_EQ4G_SHIFT                            0  /* EQ4G - [4:0] */
465 #define WM8983_EQ4G_WIDTH                            5  /* EQ4G - [4:0] */
466 
467 /*
468  * R22 (0x16) - EQ5 - high shelf
469  */
470 #define WM8983_EQ5C_MASK                        0x0060  /* EQ5C - [6:5] */
471 #define WM8983_EQ5C_SHIFT                            5  /* EQ5C - [6:5] */
472 #define WM8983_EQ5C_WIDTH                            2  /* EQ5C - [6:5] */
473 #define WM8983_EQ5G_MASK                        0x001F  /* EQ5G - [4:0] */
474 #define WM8983_EQ5G_SHIFT                            0  /* EQ5G - [4:0] */
475 #define WM8983_EQ5G_WIDTH                            5  /* EQ5G - [4:0] */
476 
477 /*
478  * R24 (0x18) - DAC Limiter 1
479  */
480 #define WM8983_LIMEN                            0x0100  /* LIMEN */
481 #define WM8983_LIMEN_MASK                       0x0100  /* LIMEN */
482 #define WM8983_LIMEN_SHIFT                           8  /* LIMEN */
483 #define WM8983_LIMEN_WIDTH                           1  /* LIMEN */
484 #define WM8983_LIMDCY_MASK                      0x00F0  /* LIMDCY - [7:4] */
485 #define WM8983_LIMDCY_SHIFT                          4  /* LIMDCY - [7:4] */
486 #define WM8983_LIMDCY_WIDTH                          4  /* LIMDCY - [7:4] */
487 #define WM8983_LIMATK_MASK                      0x000F  /* LIMATK - [3:0] */
488 #define WM8983_LIMATK_SHIFT                          0  /* LIMATK - [3:0] */
489 #define WM8983_LIMATK_WIDTH                          4  /* LIMATK - [3:0] */
490 
491 /*
492  * R25 (0x19) - DAC Limiter 2
493  */
494 #define WM8983_LIMLVL_MASK                      0x0070  /* LIMLVL - [6:4] */
495 #define WM8983_LIMLVL_SHIFT                          4  /* LIMLVL - [6:4] */
496 #define WM8983_LIMLVL_WIDTH                          3  /* LIMLVL - [6:4] */
497 #define WM8983_LIMBOOST_MASK                    0x000F  /* LIMBOOST - [3:0] */
498 #define WM8983_LIMBOOST_SHIFT                        0  /* LIMBOOST - [3:0] */
499 #define WM8983_LIMBOOST_WIDTH                        4  /* LIMBOOST - [3:0] */
500 
501 /*
502  * R27 (0x1B) - Notch Filter 1
503  */
504 #define WM8983_NFU                              0x0100  /* NFU */
505 #define WM8983_NFU_MASK                         0x0100  /* NFU */
506 #define WM8983_NFU_SHIFT                             8  /* NFU */
507 #define WM8983_NFU_WIDTH                             1  /* NFU */
508 #define WM8983_NFEN                             0x0080  /* NFEN */
509 #define WM8983_NFEN_MASK                        0x0080  /* NFEN */
510 #define WM8983_NFEN_SHIFT                            7  /* NFEN */
511 #define WM8983_NFEN_WIDTH                            1  /* NFEN */
512 #define WM8983_NFA0_13_7_MASK                   0x007F  /* NFA0(13:7) - [6:0] */
513 #define WM8983_NFA0_13_7_SHIFT                       0  /* NFA0(13:7) - [6:0] */
514 #define WM8983_NFA0_13_7_WIDTH                       7  /* NFA0(13:7) - [6:0] */
515 
516 /*
517  * R28 (0x1C) - Notch Filter 2
518  */
519 #define WM8983_NFU                              0x0100  /* NFU */
520 #define WM8983_NFU_MASK                         0x0100  /* NFU */
521 #define WM8983_NFU_SHIFT                             8  /* NFU */
522 #define WM8983_NFU_WIDTH                             1  /* NFU */
523 #define WM8983_NFA0_6_0_MASK                    0x007F  /* NFA0(6:0) - [6:0] */
524 #define WM8983_NFA0_6_0_SHIFT                        0  /* NFA0(6:0) - [6:0] */
525 #define WM8983_NFA0_6_0_WIDTH                        7  /* NFA0(6:0) - [6:0] */
526 
527 /*
528  * R29 (0x1D) - Notch Filter 3
529  */
530 #define WM8983_NFU                              0x0100  /* NFU */
531 #define WM8983_NFU_MASK                         0x0100  /* NFU */
532 #define WM8983_NFU_SHIFT                             8  /* NFU */
533 #define WM8983_NFU_WIDTH                             1  /* NFU */
534 #define WM8983_NFA1_13_7_MASK                   0x007F  /* NFA1(13:7) - [6:0] */
535 #define WM8983_NFA1_13_7_SHIFT                       0  /* NFA1(13:7) - [6:0] */
536 #define WM8983_NFA1_13_7_WIDTH                       7  /* NFA1(13:7) - [6:0] */
537 
538 /*
539  * R30 (0x1E) - Notch Filter 4
540  */
541 #define WM8983_NFU                              0x0100  /* NFU */
542 #define WM8983_NFU_MASK                         0x0100  /* NFU */
543 #define WM8983_NFU_SHIFT                             8  /* NFU */
544 #define WM8983_NFU_WIDTH                             1  /* NFU */
545 #define WM8983_NFA1_6_0_MASK                    0x007F  /* NFA1(6:0) - [6:0] */
546 #define WM8983_NFA1_6_0_SHIFT                        0  /* NFA1(6:0) - [6:0] */
547 #define WM8983_NFA1_6_0_WIDTH                        7  /* NFA1(6:0) - [6:0] */
548 
549 /*
550  * R32 (0x20) - ALC control 1
551  */
552 #define WM8983_ALCSEL_MASK                      0x0180  /* ALCSEL - [8:7] */
553 #define WM8983_ALCSEL_SHIFT                          7  /* ALCSEL - [8:7] */
554 #define WM8983_ALCSEL_WIDTH                          2  /* ALCSEL - [8:7] */
555 #define WM8983_ALCMAX_MASK                      0x0038  /* ALCMAX - [5:3] */
556 #define WM8983_ALCMAX_SHIFT                          3  /* ALCMAX - [5:3] */
557 #define WM8983_ALCMAX_WIDTH                          3  /* ALCMAX - [5:3] */
558 #define WM8983_ALCMIN_MASK                      0x0007  /* ALCMIN - [2:0] */
559 #define WM8983_ALCMIN_SHIFT                          0  /* ALCMIN - [2:0] */
560 #define WM8983_ALCMIN_WIDTH                          3  /* ALCMIN - [2:0] */
561 
562 /*
563  * R33 (0x21) - ALC control 2
564  */
565 #define WM8983_ALCHLD_MASK                      0x00F0  /* ALCHLD - [7:4] */
566 #define WM8983_ALCHLD_SHIFT                          4  /* ALCHLD - [7:4] */
567 #define WM8983_ALCHLD_WIDTH                          4  /* ALCHLD - [7:4] */
568 #define WM8983_ALCLVL_MASK                      0x000F  /* ALCLVL - [3:0] */
569 #define WM8983_ALCLVL_SHIFT                          0  /* ALCLVL - [3:0] */
570 #define WM8983_ALCLVL_WIDTH                          4  /* ALCLVL - [3:0] */
571 
572 /*
573  * R34 (0x22) - ALC control 3
574  */
575 #define WM8983_ALCMODE                          0x0100  /* ALCMODE */
576 #define WM8983_ALCMODE_MASK                     0x0100  /* ALCMODE */
577 #define WM8983_ALCMODE_SHIFT                         8  /* ALCMODE */
578 #define WM8983_ALCMODE_WIDTH                         1  /* ALCMODE */
579 #define WM8983_ALCDCY_MASK                      0x00F0  /* ALCDCY - [7:4] */
580 #define WM8983_ALCDCY_SHIFT                          4  /* ALCDCY - [7:4] */
581 #define WM8983_ALCDCY_WIDTH                          4  /* ALCDCY - [7:4] */
582 #define WM8983_ALCATK_MASK                      0x000F  /* ALCATK - [3:0] */
583 #define WM8983_ALCATK_SHIFT                          0  /* ALCATK - [3:0] */
584 #define WM8983_ALCATK_WIDTH                          4  /* ALCATK - [3:0] */
585 
586 /*
587  * R35 (0x23) - Noise Gate
588  */
589 #define WM8983_NGEN                             0x0008  /* NGEN */
590 #define WM8983_NGEN_MASK                        0x0008  /* NGEN */
591 #define WM8983_NGEN_SHIFT                            3  /* NGEN */
592 #define WM8983_NGEN_WIDTH                            1  /* NGEN */
593 #define WM8983_NGTH_MASK                        0x0007  /* NGTH - [2:0] */
594 #define WM8983_NGTH_SHIFT                            0  /* NGTH - [2:0] */
595 #define WM8983_NGTH_WIDTH                            3  /* NGTH - [2:0] */
596 
597 /*
598  * R36 (0x24) - PLL N
599  */
600 #define WM8983_PLL_PRESCALE                     0x0010  /* PLL_PRESCALE */
601 #define WM8983_PLL_PRESCALE_MASK                0x0010  /* PLL_PRESCALE */
602 #define WM8983_PLL_PRESCALE_SHIFT                    4  /* PLL_PRESCALE */
603 #define WM8983_PLL_PRESCALE_WIDTH                    1  /* PLL_PRESCALE */
604 #define WM8983_PLLN_MASK                        0x000F  /* PLLN - [3:0] */
605 #define WM8983_PLLN_SHIFT                            0  /* PLLN - [3:0] */
606 #define WM8983_PLLN_WIDTH                            4  /* PLLN - [3:0] */
607 
608 /*
609  * R37 (0x25) - PLL K 1
610  */
611 #define WM8983_PLLK_23_18_MASK                  0x003F  /* PLLK(23:18) - [5:0] */
612 #define WM8983_PLLK_23_18_SHIFT                      0  /* PLLK(23:18) - [5:0] */
613 #define WM8983_PLLK_23_18_WIDTH                      6  /* PLLK(23:18) - [5:0] */
614 
615 /*
616  * R38 (0x26) - PLL K 2
617  */
618 #define WM8983_PLLK_17_9_MASK                   0x01FF  /* PLLK(17:9) - [8:0] */
619 #define WM8983_PLLK_17_9_SHIFT                       0  /* PLLK(17:9) - [8:0] */
620 #define WM8983_PLLK_17_9_WIDTH                       9  /* PLLK(17:9) - [8:0] */
621 
622 /*
623  * R39 (0x27) - PLL K 3
624  */
625 #define WM8983_PLLK_8_0_MASK                    0x01FF  /* PLLK(8:0) - [8:0] */
626 #define WM8983_PLLK_8_0_SHIFT                        0  /* PLLK(8:0) - [8:0] */
627 #define WM8983_PLLK_8_0_WIDTH                        9  /* PLLK(8:0) - [8:0] */
628 
629 /*
630  * R41 (0x29) - 3D control
631  */
632 #define WM8983_DEPTH3D_MASK                     0x000F  /* DEPTH3D - [3:0] */
633 #define WM8983_DEPTH3D_SHIFT                         0  /* DEPTH3D - [3:0] */
634 #define WM8983_DEPTH3D_WIDTH                         4  /* DEPTH3D - [3:0] */
635 
636 /*
637  * R42 (0x2A) - OUT4 to ADC
638  */
639 #define WM8983_OUT4_2ADCVOL_MASK                0x01C0  /* OUT4_2ADCVOL - [8:6] */
640 #define WM8983_OUT4_2ADCVOL_SHIFT                    6  /* OUT4_2ADCVOL - [8:6] */
641 #define WM8983_OUT4_2ADCVOL_WIDTH                    3  /* OUT4_2ADCVOL - [8:6] */
642 #define WM8983_OUT4_2LNR                        0x0020  /* OUT4_2LNR */
643 #define WM8983_OUT4_2LNR_MASK                   0x0020  /* OUT4_2LNR */
644 #define WM8983_OUT4_2LNR_SHIFT                       5  /* OUT4_2LNR */
645 #define WM8983_OUT4_2LNR_WIDTH                       1  /* OUT4_2LNR */
646 #define WM8983_POBCTRL                          0x0004  /* POBCTRL */
647 #define WM8983_POBCTRL_MASK                     0x0004  /* POBCTRL */
648 #define WM8983_POBCTRL_SHIFT                         2  /* POBCTRL */
649 #define WM8983_POBCTRL_WIDTH                         1  /* POBCTRL */
650 #define WM8983_DELEN                            0x0002  /* DELEN */
651 #define WM8983_DELEN_MASK                       0x0002  /* DELEN */
652 #define WM8983_DELEN_SHIFT                           1  /* DELEN */
653 #define WM8983_DELEN_WIDTH                           1  /* DELEN */
654 #define WM8983_OUT1DEL                          0x0001  /* OUT1DEL */
655 #define WM8983_OUT1DEL_MASK                     0x0001  /* OUT1DEL */
656 #define WM8983_OUT1DEL_SHIFT                         0  /* OUT1DEL */
657 #define WM8983_OUT1DEL_WIDTH                         1  /* OUT1DEL */
658 
659 /*
660  * R43 (0x2B) - Beep control
661  */
662 #define WM8983_BYPL2RMIX                        0x0100  /* BYPL2RMIX */
663 #define WM8983_BYPL2RMIX_MASK                   0x0100  /* BYPL2RMIX */
664 #define WM8983_BYPL2RMIX_SHIFT                       8  /* BYPL2RMIX */
665 #define WM8983_BYPL2RMIX_WIDTH                       1  /* BYPL2RMIX */
666 #define WM8983_BYPR2LMIX                        0x0080  /* BYPR2LMIX */
667 #define WM8983_BYPR2LMIX_MASK                   0x0080  /* BYPR2LMIX */
668 #define WM8983_BYPR2LMIX_SHIFT                       7  /* BYPR2LMIX */
669 #define WM8983_BYPR2LMIX_WIDTH                       1  /* BYPR2LMIX */
670 #define WM8983_MUTERPGA2INV                     0x0020  /* MUTERPGA2INV */
671 #define WM8983_MUTERPGA2INV_MASK                0x0020  /* MUTERPGA2INV */
672 #define WM8983_MUTERPGA2INV_SHIFT                    5  /* MUTERPGA2INV */
673 #define WM8983_MUTERPGA2INV_WIDTH                    1  /* MUTERPGA2INV */
674 #define WM8983_INVROUT2                         0x0010  /* INVROUT2 */
675 #define WM8983_INVROUT2_MASK                    0x0010  /* INVROUT2 */
676 #define WM8983_INVROUT2_SHIFT                        4  /* INVROUT2 */
677 #define WM8983_INVROUT2_WIDTH                        1  /* INVROUT2 */
678 #define WM8983_BEEPVOL_MASK                     0x000E  /* BEEPVOL - [3:1] */
679 #define WM8983_BEEPVOL_SHIFT                         1  /* BEEPVOL - [3:1] */
680 #define WM8983_BEEPVOL_WIDTH                         3  /* BEEPVOL - [3:1] */
681 #define WM8983_BEEPEN                           0x0001  /* BEEPEN */
682 #define WM8983_BEEPEN_MASK                      0x0001  /* BEEPEN */
683 #define WM8983_BEEPEN_SHIFT                          0  /* BEEPEN */
684 #define WM8983_BEEPEN_WIDTH                          1  /* BEEPEN */
685 
686 /*
687  * R44 (0x2C) - Input ctrl
688  */
689 #define WM8983_MBVSEL                           0x0100  /* MBVSEL */
690 #define WM8983_MBVSEL_MASK                      0x0100  /* MBVSEL */
691 #define WM8983_MBVSEL_SHIFT                          8  /* MBVSEL */
692 #define WM8983_MBVSEL_WIDTH                          1  /* MBVSEL */
693 #define WM8983_R2_2INPPGA                       0x0040  /* R2_2INPPGA */
694 #define WM8983_R2_2INPPGA_MASK                  0x0040  /* R2_2INPPGA */
695 #define WM8983_R2_2INPPGA_SHIFT                      6  /* R2_2INPPGA */
696 #define WM8983_R2_2INPPGA_WIDTH                      1  /* R2_2INPPGA */
697 #define WM8983_RIN2INPPGA                       0x0020  /* RIN2INPPGA */
698 #define WM8983_RIN2INPPGA_MASK                  0x0020  /* RIN2INPPGA */
699 #define WM8983_RIN2INPPGA_SHIFT                      5  /* RIN2INPPGA */
700 #define WM8983_RIN2INPPGA_WIDTH                      1  /* RIN2INPPGA */
701 #define WM8983_RIP2INPPGA                       0x0010  /* RIP2INPPGA */
702 #define WM8983_RIP2INPPGA_MASK                  0x0010  /* RIP2INPPGA */
703 #define WM8983_RIP2INPPGA_SHIFT                      4  /* RIP2INPPGA */
704 #define WM8983_RIP2INPPGA_WIDTH                      1  /* RIP2INPPGA */
705 #define WM8983_L2_2INPPGA                       0x0004  /* L2_2INPPGA */
706 #define WM8983_L2_2INPPGA_MASK                  0x0004  /* L2_2INPPGA */
707 #define WM8983_L2_2INPPGA_SHIFT                      2  /* L2_2INPPGA */
708 #define WM8983_L2_2INPPGA_WIDTH                      1  /* L2_2INPPGA */
709 #define WM8983_LIN2INPPGA                       0x0002  /* LIN2INPPGA */
710 #define WM8983_LIN2INPPGA_MASK                  0x0002  /* LIN2INPPGA */
711 #define WM8983_LIN2INPPGA_SHIFT                      1  /* LIN2INPPGA */
712 #define WM8983_LIN2INPPGA_WIDTH                      1  /* LIN2INPPGA */
713 #define WM8983_LIP2INPPGA                       0x0001  /* LIP2INPPGA */
714 #define WM8983_LIP2INPPGA_MASK                  0x0001  /* LIP2INPPGA */
715 #define WM8983_LIP2INPPGA_SHIFT                      0  /* LIP2INPPGA */
716 #define WM8983_LIP2INPPGA_WIDTH                      1  /* LIP2INPPGA */
717 
718 /*
719  * R45 (0x2D) - Left INP PGA gain ctrl
720  */
721 #define WM8983_INPGAVU                          0x0100  /* INPGAVU */
722 #define WM8983_INPGAVU_MASK                     0x0100  /* INPGAVU */
723 #define WM8983_INPGAVU_SHIFT                         8  /* INPGAVU */
724 #define WM8983_INPGAVU_WIDTH                         1  /* INPGAVU */
725 #define WM8983_INPPGAZCL                        0x0080  /* INPPGAZCL */
726 #define WM8983_INPPGAZCL_MASK                   0x0080  /* INPPGAZCL */
727 #define WM8983_INPPGAZCL_SHIFT                       7  /* INPPGAZCL */
728 #define WM8983_INPPGAZCL_WIDTH                       1  /* INPPGAZCL */
729 #define WM8983_INPPGAMUTEL                      0x0040  /* INPPGAMUTEL */
730 #define WM8983_INPPGAMUTEL_MASK                 0x0040  /* INPPGAMUTEL */
731 #define WM8983_INPPGAMUTEL_SHIFT                     6  /* INPPGAMUTEL */
732 #define WM8983_INPPGAMUTEL_WIDTH                     1  /* INPPGAMUTEL */
733 #define WM8983_INPPGAVOLL_MASK                  0x003F  /* INPPGAVOLL - [5:0] */
734 #define WM8983_INPPGAVOLL_SHIFT                      0  /* INPPGAVOLL - [5:0] */
735 #define WM8983_INPPGAVOLL_WIDTH                      6  /* INPPGAVOLL - [5:0] */
736 
737 /*
738  * R46 (0x2E) - Right INP PGA gain ctrl
739  */
740 #define WM8983_INPGAVU                          0x0100  /* INPGAVU */
741 #define WM8983_INPGAVU_MASK                     0x0100  /* INPGAVU */
742 #define WM8983_INPGAVU_SHIFT                         8  /* INPGAVU */
743 #define WM8983_INPGAVU_WIDTH                         1  /* INPGAVU */
744 #define WM8983_INPPGAZCR                        0x0080  /* INPPGAZCR */
745 #define WM8983_INPPGAZCR_MASK                   0x0080  /* INPPGAZCR */
746 #define WM8983_INPPGAZCR_SHIFT                       7  /* INPPGAZCR */
747 #define WM8983_INPPGAZCR_WIDTH                       1  /* INPPGAZCR */
748 #define WM8983_INPPGAMUTER                      0x0040  /* INPPGAMUTER */
749 #define WM8983_INPPGAMUTER_MASK                 0x0040  /* INPPGAMUTER */
750 #define WM8983_INPPGAMUTER_SHIFT                     6  /* INPPGAMUTER */
751 #define WM8983_INPPGAMUTER_WIDTH                     1  /* INPPGAMUTER */
752 #define WM8983_INPPGAVOLR_MASK                  0x003F  /* INPPGAVOLR - [5:0] */
753 #define WM8983_INPPGAVOLR_SHIFT                      0  /* INPPGAVOLR - [5:0] */
754 #define WM8983_INPPGAVOLR_WIDTH                      6  /* INPPGAVOLR - [5:0] */
755 
756 /*
757  * R47 (0x2F) - Left ADC BOOST ctrl
758  */
759 #define WM8983_PGABOOSTL                        0x0100  /* PGABOOSTL */
760 #define WM8983_PGABOOSTL_MASK                   0x0100  /* PGABOOSTL */
761 #define WM8983_PGABOOSTL_SHIFT                       8  /* PGABOOSTL */
762 #define WM8983_PGABOOSTL_WIDTH                       1  /* PGABOOSTL */
763 #define WM8983_L2_2BOOSTVOL_MASK                0x0070  /* L2_2BOOSTVOL - [6:4] */
764 #define WM8983_L2_2BOOSTVOL_SHIFT                    4  /* L2_2BOOSTVOL - [6:4] */
765 #define WM8983_L2_2BOOSTVOL_WIDTH                    3  /* L2_2BOOSTVOL - [6:4] */
766 #define WM8983_AUXL2BOOSTVOL_MASK               0x0007  /* AUXL2BOOSTVOL - [2:0] */
767 #define WM8983_AUXL2BOOSTVOL_SHIFT                   0  /* AUXL2BOOSTVOL - [2:0] */
768 #define WM8983_AUXL2BOOSTVOL_WIDTH                   3  /* AUXL2BOOSTVOL - [2:0] */
769 
770 /*
771  * R48 (0x30) - Right ADC BOOST ctrl
772  */
773 #define WM8983_PGABOOSTR                        0x0100  /* PGABOOSTR */
774 #define WM8983_PGABOOSTR_MASK                   0x0100  /* PGABOOSTR */
775 #define WM8983_PGABOOSTR_SHIFT                       8  /* PGABOOSTR */
776 #define WM8983_PGABOOSTR_WIDTH                       1  /* PGABOOSTR */
777 #define WM8983_R2_2BOOSTVOL_MASK                0x0070  /* R2_2BOOSTVOL - [6:4] */
778 #define WM8983_R2_2BOOSTVOL_SHIFT                    4  /* R2_2BOOSTVOL - [6:4] */
779 #define WM8983_R2_2BOOSTVOL_WIDTH                    3  /* R2_2BOOSTVOL - [6:4] */
780 #define WM8983_AUXR2BOOSTVOL_MASK               0x0007  /* AUXR2BOOSTVOL - [2:0] */
781 #define WM8983_AUXR2BOOSTVOL_SHIFT                   0  /* AUXR2BOOSTVOL - [2:0] */
782 #define WM8983_AUXR2BOOSTVOL_WIDTH                   3  /* AUXR2BOOSTVOL - [2:0] */
783 
784 /*
785  * R49 (0x31) - Output ctrl
786  */
787 #define WM8983_DACL2RMIX                        0x0040  /* DACL2RMIX */
788 #define WM8983_DACL2RMIX_MASK                   0x0040  /* DACL2RMIX */
789 #define WM8983_DACL2RMIX_SHIFT                       6  /* DACL2RMIX */
790 #define WM8983_DACL2RMIX_WIDTH                       1  /* DACL2RMIX */
791 #define WM8983_DACR2LMIX                        0x0020  /* DACR2LMIX */
792 #define WM8983_DACR2LMIX_MASK                   0x0020  /* DACR2LMIX */
793 #define WM8983_DACR2LMIX_SHIFT                       5  /* DACR2LMIX */
794 #define WM8983_DACR2LMIX_WIDTH                       1  /* DACR2LMIX */
795 #define WM8983_OUT4BOOST                        0x0010  /* OUT4BOOST */
796 #define WM8983_OUT4BOOST_MASK                   0x0010  /* OUT4BOOST */
797 #define WM8983_OUT4BOOST_SHIFT                       4  /* OUT4BOOST */
798 #define WM8983_OUT4BOOST_WIDTH                       1  /* OUT4BOOST */
799 #define WM8983_OUT3BOOST                        0x0008  /* OUT3BOOST */
800 #define WM8983_OUT3BOOST_MASK                   0x0008  /* OUT3BOOST */
801 #define WM8983_OUT3BOOST_SHIFT                       3  /* OUT3BOOST */
802 #define WM8983_OUT3BOOST_WIDTH                       1  /* OUT3BOOST */
803 #define WM8983_SPKBOOST                         0x0004  /* SPKBOOST */
804 #define WM8983_SPKBOOST_MASK                    0x0004  /* SPKBOOST */
805 #define WM8983_SPKBOOST_SHIFT                        2  /* SPKBOOST */
806 #define WM8983_SPKBOOST_WIDTH                        1  /* SPKBOOST */
807 #define WM8983_TSDEN                            0x0002  /* TSDEN */
808 #define WM8983_TSDEN_MASK                       0x0002  /* TSDEN */
809 #define WM8983_TSDEN_SHIFT                           1  /* TSDEN */
810 #define WM8983_TSDEN_WIDTH                           1  /* TSDEN */
811 #define WM8983_VROI                             0x0001  /* VROI */
812 #define WM8983_VROI_MASK                        0x0001  /* VROI */
813 #define WM8983_VROI_SHIFT                            0  /* VROI */
814 #define WM8983_VROI_WIDTH                            1  /* VROI */
815 
816 /*
817  * R50 (0x32) - Left mixer ctrl
818  */
819 #define WM8983_AUXLMIXVOL_MASK                  0x01C0  /* AUXLMIXVOL - [8:6] */
820 #define WM8983_AUXLMIXVOL_SHIFT                      6  /* AUXLMIXVOL - [8:6] */
821 #define WM8983_AUXLMIXVOL_WIDTH                      3  /* AUXLMIXVOL - [8:6] */
822 #define WM8983_AUXL2LMIX                        0x0020  /* AUXL2LMIX */
823 #define WM8983_AUXL2LMIX_MASK                   0x0020  /* AUXL2LMIX */
824 #define WM8983_AUXL2LMIX_SHIFT                       5  /* AUXL2LMIX */
825 #define WM8983_AUXL2LMIX_WIDTH                       1  /* AUXL2LMIX */
826 #define WM8983_BYPLMIXVOL_MASK                  0x001C  /* BYPLMIXVOL - [4:2] */
827 #define WM8983_BYPLMIXVOL_SHIFT                      2  /* BYPLMIXVOL - [4:2] */
828 #define WM8983_BYPLMIXVOL_WIDTH                      3  /* BYPLMIXVOL - [4:2] */
829 #define WM8983_BYPL2LMIX                        0x0002  /* BYPL2LMIX */
830 #define WM8983_BYPL2LMIX_MASK                   0x0002  /* BYPL2LMIX */
831 #define WM8983_BYPL2LMIX_SHIFT                       1  /* BYPL2LMIX */
832 #define WM8983_BYPL2LMIX_WIDTH                       1  /* BYPL2LMIX */
833 #define WM8983_DACL2LMIX                        0x0001  /* DACL2LMIX */
834 #define WM8983_DACL2LMIX_MASK                   0x0001  /* DACL2LMIX */
835 #define WM8983_DACL2LMIX_SHIFT                       0  /* DACL2LMIX */
836 #define WM8983_DACL2LMIX_WIDTH                       1  /* DACL2LMIX */
837 
838 /*
839  * R51 (0x33) - Right mixer ctrl
840  */
841 #define WM8983_AUXRMIXVOL_MASK                  0x01C0  /* AUXRMIXVOL - [8:6] */
842 #define WM8983_AUXRMIXVOL_SHIFT                      6  /* AUXRMIXVOL - [8:6] */
843 #define WM8983_AUXRMIXVOL_WIDTH                      3  /* AUXRMIXVOL - [8:6] */
844 #define WM8983_AUXR2RMIX                        0x0020  /* AUXR2RMIX */
845 #define WM8983_AUXR2RMIX_MASK                   0x0020  /* AUXR2RMIX */
846 #define WM8983_AUXR2RMIX_SHIFT                       5  /* AUXR2RMIX */
847 #define WM8983_AUXR2RMIX_WIDTH                       1  /* AUXR2RMIX */
848 #define WM8983_BYPRMIXVOL_MASK                  0x001C  /* BYPRMIXVOL - [4:2] */
849 #define WM8983_BYPRMIXVOL_SHIFT                      2  /* BYPRMIXVOL - [4:2] */
850 #define WM8983_BYPRMIXVOL_WIDTH                      3  /* BYPRMIXVOL - [4:2] */
851 #define WM8983_BYPR2RMIX                        0x0002  /* BYPR2RMIX */
852 #define WM8983_BYPR2RMIX_MASK                   0x0002  /* BYPR2RMIX */
853 #define WM8983_BYPR2RMIX_SHIFT                       1  /* BYPR2RMIX */
854 #define WM8983_BYPR2RMIX_WIDTH                       1  /* BYPR2RMIX */
855 #define WM8983_DACR2RMIX                        0x0001  /* DACR2RMIX */
856 #define WM8983_DACR2RMIX_MASK                   0x0001  /* DACR2RMIX */
857 #define WM8983_DACR2RMIX_SHIFT                       0  /* DACR2RMIX */
858 #define WM8983_DACR2RMIX_WIDTH                       1  /* DACR2RMIX */
859 
860 /*
861  * R52 (0x34) - LOUT1 (HP) volume ctrl
862  */
863 #define WM8983_OUT1VU                           0x0100  /* OUT1VU */
864 #define WM8983_OUT1VU_MASK                      0x0100  /* OUT1VU */
865 #define WM8983_OUT1VU_SHIFT                          8  /* OUT1VU */
866 #define WM8983_OUT1VU_WIDTH                          1  /* OUT1VU */
867 #define WM8983_LOUT1ZC                          0x0080  /* LOUT1ZC */
868 #define WM8983_LOUT1ZC_MASK                     0x0080  /* LOUT1ZC */
869 #define WM8983_LOUT1ZC_SHIFT                         7  /* LOUT1ZC */
870 #define WM8983_LOUT1ZC_WIDTH                         1  /* LOUT1ZC */
871 #define WM8983_LOUT1MUTE                        0x0040  /* LOUT1MUTE */
872 #define WM8983_LOUT1MUTE_MASK                   0x0040  /* LOUT1MUTE */
873 #define WM8983_LOUT1MUTE_SHIFT                       6  /* LOUT1MUTE */
874 #define WM8983_LOUT1MUTE_WIDTH                       1  /* LOUT1MUTE */
875 #define WM8983_LOUT1VOL_MASK                    0x003F  /* LOUT1VOL - [5:0] */
876 #define WM8983_LOUT1VOL_SHIFT                        0  /* LOUT1VOL - [5:0] */
877 #define WM8983_LOUT1VOL_WIDTH                        6  /* LOUT1VOL - [5:0] */
878 
879 /*
880  * R53 (0x35) - ROUT1 (HP) volume ctrl
881  */
882 #define WM8983_OUT1VU                           0x0100  /* OUT1VU */
883 #define WM8983_OUT1VU_MASK                      0x0100  /* OUT1VU */
884 #define WM8983_OUT1VU_SHIFT                          8  /* OUT1VU */
885 #define WM8983_OUT1VU_WIDTH                          1  /* OUT1VU */
886 #define WM8983_ROUT1ZC                          0x0080  /* ROUT1ZC */
887 #define WM8983_ROUT1ZC_MASK                     0x0080  /* ROUT1ZC */
888 #define WM8983_ROUT1ZC_SHIFT                         7  /* ROUT1ZC */
889 #define WM8983_ROUT1ZC_WIDTH                         1  /* ROUT1ZC */
890 #define WM8983_ROUT1MUTE                        0x0040  /* ROUT1MUTE */
891 #define WM8983_ROUT1MUTE_MASK                   0x0040  /* ROUT1MUTE */
892 #define WM8983_ROUT1MUTE_SHIFT                       6  /* ROUT1MUTE */
893 #define WM8983_ROUT1MUTE_WIDTH                       1  /* ROUT1MUTE */
894 #define WM8983_ROUT1VOL_MASK                    0x003F  /* ROUT1VOL - [5:0] */
895 #define WM8983_ROUT1VOL_SHIFT                        0  /* ROUT1VOL - [5:0] */
896 #define WM8983_ROUT1VOL_WIDTH                        6  /* ROUT1VOL - [5:0] */
897 
898 /*
899  * R54 (0x36) - LOUT2 (SPK) volume ctrl
900  */
901 #define WM8983_OUT2VU                           0x0100  /* OUT2VU */
902 #define WM8983_OUT2VU_MASK                      0x0100  /* OUT2VU */
903 #define WM8983_OUT2VU_SHIFT                          8  /* OUT2VU */
904 #define WM8983_OUT2VU_WIDTH                          1  /* OUT2VU */
905 #define WM8983_LOUT2ZC                          0x0080  /* LOUT2ZC */
906 #define WM8983_LOUT2ZC_MASK                     0x0080  /* LOUT2ZC */
907 #define WM8983_LOUT2ZC_SHIFT                         7  /* LOUT2ZC */
908 #define WM8983_LOUT2ZC_WIDTH                         1  /* LOUT2ZC */
909 #define WM8983_LOUT2MUTE                        0x0040  /* LOUT2MUTE */
910 #define WM8983_LOUT2MUTE_MASK                   0x0040  /* LOUT2MUTE */
911 #define WM8983_LOUT2MUTE_SHIFT                       6  /* LOUT2MUTE */
912 #define WM8983_LOUT2MUTE_WIDTH                       1  /* LOUT2MUTE */
913 #define WM8983_LOUT2VOL_MASK                    0x003F  /* LOUT2VOL - [5:0] */
914 #define WM8983_LOUT2VOL_SHIFT                        0  /* LOUT2VOL - [5:0] */
915 #define WM8983_LOUT2VOL_WIDTH                        6  /* LOUT2VOL - [5:0] */
916 
917 /*
918  * R55 (0x37) - ROUT2 (SPK) volume ctrl
919  */
920 #define WM8983_OUT2VU                           0x0100  /* OUT2VU */
921 #define WM8983_OUT2VU_MASK                      0x0100  /* OUT2VU */
922 #define WM8983_OUT2VU_SHIFT                          8  /* OUT2VU */
923 #define WM8983_OUT2VU_WIDTH                          1  /* OUT2VU */
924 #define WM8983_ROUT2ZC                          0x0080  /* ROUT2ZC */
925 #define WM8983_ROUT2ZC_MASK                     0x0080  /* ROUT2ZC */
926 #define WM8983_ROUT2ZC_SHIFT                         7  /* ROUT2ZC */
927 #define WM8983_ROUT2ZC_WIDTH                         1  /* ROUT2ZC */
928 #define WM8983_ROUT2MUTE                        0x0040  /* ROUT2MUTE */
929 #define WM8983_ROUT2MUTE_MASK                   0x0040  /* ROUT2MUTE */
930 #define WM8983_ROUT2MUTE_SHIFT                       6  /* ROUT2MUTE */
931 #define WM8983_ROUT2MUTE_WIDTH                       1  /* ROUT2MUTE */
932 #define WM8983_ROUT2VOL_MASK                    0x003F  /* ROUT2VOL - [5:0] */
933 #define WM8983_ROUT2VOL_SHIFT                        0  /* ROUT2VOL - [5:0] */
934 #define WM8983_ROUT2VOL_WIDTH                        6  /* ROUT2VOL - [5:0] */
935 
936 /*
937  * R56 (0x38) - OUT3 mixer ctrl
938  */
939 #define WM8983_OUT3MUTE                         0x0040  /* OUT3MUTE */
940 #define WM8983_OUT3MUTE_MASK                    0x0040  /* OUT3MUTE */
941 #define WM8983_OUT3MUTE_SHIFT                        6  /* OUT3MUTE */
942 #define WM8983_OUT3MUTE_WIDTH                        1  /* OUT3MUTE */
943 #define WM8983_OUT4_2OUT3                       0x0008  /* OUT4_2OUT3 */
944 #define WM8983_OUT4_2OUT3_MASK                  0x0008  /* OUT4_2OUT3 */
945 #define WM8983_OUT4_2OUT3_SHIFT                      3  /* OUT4_2OUT3 */
946 #define WM8983_OUT4_2OUT3_WIDTH                      1  /* OUT4_2OUT3 */
947 #define WM8983_BYPL2OUT3                        0x0004  /* BYPL2OUT3 */
948 #define WM8983_BYPL2OUT3_MASK                   0x0004  /* BYPL2OUT3 */
949 #define WM8983_BYPL2OUT3_SHIFT                       2  /* BYPL2OUT3 */
950 #define WM8983_BYPL2OUT3_WIDTH                       1  /* BYPL2OUT3 */
951 #define WM8983_LMIX2OUT3                        0x0002  /* LMIX2OUT3 */
952 #define WM8983_LMIX2OUT3_MASK                   0x0002  /* LMIX2OUT3 */
953 #define WM8983_LMIX2OUT3_SHIFT                       1  /* LMIX2OUT3 */
954 #define WM8983_LMIX2OUT3_WIDTH                       1  /* LMIX2OUT3 */
955 #define WM8983_LDAC2OUT3                        0x0001  /* LDAC2OUT3 */
956 #define WM8983_LDAC2OUT3_MASK                   0x0001  /* LDAC2OUT3 */
957 #define WM8983_LDAC2OUT3_SHIFT                       0  /* LDAC2OUT3 */
958 #define WM8983_LDAC2OUT3_WIDTH                       1  /* LDAC2OUT3 */
959 
960 /*
961  * R57 (0x39) - OUT4 (MONO) mix ctrl
962  */
963 #define WM8983_OUT3_2OUT4                       0x0080  /* OUT3_2OUT4 */
964 #define WM8983_OUT3_2OUT4_MASK                  0x0080  /* OUT3_2OUT4 */
965 #define WM8983_OUT3_2OUT4_SHIFT                      7  /* OUT3_2OUT4 */
966 #define WM8983_OUT3_2OUT4_WIDTH                      1  /* OUT3_2OUT4 */
967 #define WM8983_OUT4MUTE                         0x0040  /* OUT4MUTE */
968 #define WM8983_OUT4MUTE_MASK                    0x0040  /* OUT4MUTE */
969 #define WM8983_OUT4MUTE_SHIFT                        6  /* OUT4MUTE */
970 #define WM8983_OUT4MUTE_WIDTH                        1  /* OUT4MUTE */
971 #define WM8983_OUT4ATTN                         0x0020  /* OUT4ATTN */
972 #define WM8983_OUT4ATTN_MASK                    0x0020  /* OUT4ATTN */
973 #define WM8983_OUT4ATTN_SHIFT                        5  /* OUT4ATTN */
974 #define WM8983_OUT4ATTN_WIDTH                        1  /* OUT4ATTN */
975 #define WM8983_LMIX2OUT4                        0x0010  /* LMIX2OUT4 */
976 #define WM8983_LMIX2OUT4_MASK                   0x0010  /* LMIX2OUT4 */
977 #define WM8983_LMIX2OUT4_SHIFT                       4  /* LMIX2OUT4 */
978 #define WM8983_LMIX2OUT4_WIDTH                       1  /* LMIX2OUT4 */
979 #define WM8983_LDAC2OUT4                        0x0008  /* LDAC2OUT4 */
980 #define WM8983_LDAC2OUT4_MASK                   0x0008  /* LDAC2OUT4 */
981 #define WM8983_LDAC2OUT4_SHIFT                       3  /* LDAC2OUT4 */
982 #define WM8983_LDAC2OUT4_WIDTH                       1  /* LDAC2OUT4 */
983 #define WM8983_BYPR2OUT4                        0x0004  /* BYPR2OUT4 */
984 #define WM8983_BYPR2OUT4_MASK                   0x0004  /* BYPR2OUT4 */
985 #define WM8983_BYPR2OUT4_SHIFT                       2  /* BYPR2OUT4 */
986 #define WM8983_BYPR2OUT4_WIDTH                       1  /* BYPR2OUT4 */
987 #define WM8983_RMIX2OUT4                        0x0002  /* RMIX2OUT4 */
988 #define WM8983_RMIX2OUT4_MASK                   0x0002  /* RMIX2OUT4 */
989 #define WM8983_RMIX2OUT4_SHIFT                       1  /* RMIX2OUT4 */
990 #define WM8983_RMIX2OUT4_WIDTH                       1  /* RMIX2OUT4 */
991 #define WM8983_RDAC2OUT4                        0x0001  /* RDAC2OUT4 */
992 #define WM8983_RDAC2OUT4_MASK                   0x0001  /* RDAC2OUT4 */
993 #define WM8983_RDAC2OUT4_SHIFT                       0  /* RDAC2OUT4 */
994 #define WM8983_RDAC2OUT4_WIDTH                       1  /* RDAC2OUT4 */
995 
996 /*
997  * R61 (0x3D) - BIAS CTRL
998  */
999 #define WM8983_BIASCUT                          0x0100  /* BIASCUT */
1000 #define WM8983_BIASCUT_MASK                     0x0100  /* BIASCUT */
1001 #define WM8983_BIASCUT_SHIFT                         8  /* BIASCUT */
1002 #define WM8983_BIASCUT_WIDTH                         1  /* BIASCUT */
1003 #define WM8983_HALFIPBIAS                       0x0080  /* HALFIPBIAS */
1004 #define WM8983_HALFIPBIAS_MASK                  0x0080  /* HALFIPBIAS */
1005 #define WM8983_HALFIPBIAS_SHIFT                      7  /* HALFIPBIAS */
1006 #define WM8983_HALFIPBIAS_WIDTH                      1  /* HALFIPBIAS */
1007 #define WM8983_VBBIASTST_MASK                   0x0060  /* VBBIASTST - [6:5] */
1008 #define WM8983_VBBIASTST_SHIFT                       5  /* VBBIASTST - [6:5] */
1009 #define WM8983_VBBIASTST_WIDTH                       2  /* VBBIASTST - [6:5] */
1010 #define WM8983_BUFBIAS_MASK                     0x0018  /* BUFBIAS - [4:3] */
1011 #define WM8983_BUFBIAS_SHIFT                         3  /* BUFBIAS - [4:3] */
1012 #define WM8983_BUFBIAS_WIDTH                         2  /* BUFBIAS - [4:3] */
1013 #define WM8983_ADCBIAS_MASK                     0x0006  /* ADCBIAS - [2:1] */
1014 #define WM8983_ADCBIAS_SHIFT                         1  /* ADCBIAS - [2:1] */
1015 #define WM8983_ADCBIAS_WIDTH                         2  /* ADCBIAS - [2:1] */
1016 #define WM8983_HALFOPBIAS                       0x0001  /* HALFOPBIAS */
1017 #define WM8983_HALFOPBIAS_MASK                  0x0001  /* HALFOPBIAS */
1018 #define WM8983_HALFOPBIAS_SHIFT                      0  /* HALFOPBIAS */
1019 #define WM8983_HALFOPBIAS_WIDTH                      1  /* HALFOPBIAS */
1020 
1021 enum clk_src {
1022 	WM8983_CLKSRC_MCLK,
1023 	WM8983_CLKSRC_PLL
1024 };
1025 
1026 #endif /* _WM8983_H */
1027