1 /* 2 * Virtio GPU Device 3 * 4 * Copyright Red Hat, Inc. 2013-2014 5 * 6 * Authors: 7 * Dave Airlie <airlied@redhat.com> 8 * Gerd Hoffmann <kraxel@redhat.com> 9 * 10 * This work is licensed under the terms of the GNU GPL, version 2. 11 * See the COPYING file in the top-level directory. 12 */ 13 14 #ifndef HW_VIRTIO_GPU_H 15 #define HW_VIRTIO_GPU_H 16 17 #include "qemu/queue.h" 18 #include "ui/qemu-pixman.h" 19 #include "ui/console.h" 20 #include "hw/virtio/virtio.h" 21 #include "qemu/log.h" 22 #include "sysemu/vhost-user-backend.h" 23 24 #include "standard-headers/linux/virtio_gpu.h" 25 #include "standard-headers/linux/virtio_ids.h" 26 #include "qom/object.h" 27 28 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base" 29 OBJECT_DECLARE_TYPE(VirtIOGPUBase, VirtIOGPUBaseClass, 30 VIRTIO_GPU_BASE) 31 32 #define TYPE_VIRTIO_GPU "virtio-gpu-device" 33 OBJECT_DECLARE_TYPE(VirtIOGPU, VirtIOGPUClass, VIRTIO_GPU) 34 35 #define TYPE_VIRTIO_GPU_GL "virtio-gpu-gl-device" 36 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPUGL, VIRTIO_GPU_GL) 37 38 #define TYPE_VHOST_USER_GPU "vhost-user-gpu" 39 OBJECT_DECLARE_SIMPLE_TYPE(VhostUserGPU, VHOST_USER_GPU) 40 41 #define TYPE_VIRTIO_GPU_RUTABAGA "virtio-gpu-rutabaga-device" 42 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPURutabaga, VIRTIO_GPU_RUTABAGA) 43 44 struct virtio_gpu_simple_resource { 45 uint32_t resource_id; 46 uint32_t width; 47 uint32_t height; 48 uint32_t format; 49 uint64_t *addrs; 50 struct iovec *iov; 51 unsigned int iov_cnt; 52 uint32_t scanout_bitmask; 53 pixman_image_t *image; 54 qemu_pixman_shareable share_handle; 55 uint64_t hostmem; 56 57 uint64_t blob_size; 58 void *blob; 59 int dmabuf_fd; 60 uint8_t *remapped; 61 62 QTAILQ_ENTRY(virtio_gpu_simple_resource) next; 63 }; 64 65 struct virtio_gpu_framebuffer { 66 pixman_format_code_t format; 67 uint32_t bytes_pp; 68 uint32_t width, height; 69 uint32_t stride; 70 uint32_t offset; 71 }; 72 73 struct virtio_gpu_scanout { 74 QemuConsole *con; 75 DisplaySurface *ds; 76 uint32_t width, height; 77 int x, y; 78 int invalidate; 79 uint32_t resource_id; 80 struct virtio_gpu_update_cursor cursor; 81 QEMUCursor *current_cursor; 82 struct virtio_gpu_framebuffer fb; 83 }; 84 85 struct virtio_gpu_requested_state { 86 uint16_t width_mm, height_mm; 87 uint32_t width, height; 88 uint32_t refresh_rate; 89 int x, y; 90 }; 91 92 enum virtio_gpu_base_conf_flags { 93 VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1, 94 VIRTIO_GPU_FLAG_STATS_ENABLED, 95 VIRTIO_GPU_FLAG_EDID_ENABLED, 96 VIRTIO_GPU_FLAG_DMABUF_ENABLED, 97 VIRTIO_GPU_FLAG_BLOB_ENABLED, 98 VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED, 99 VIRTIO_GPU_FLAG_RUTABAGA_ENABLED, 100 VIRTIO_GPU_FLAG_VENUS_ENABLED, 101 }; 102 103 #define virtio_gpu_virgl_enabled(_cfg) \ 104 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED)) 105 #define virtio_gpu_stats_enabled(_cfg) \ 106 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED)) 107 #define virtio_gpu_edid_enabled(_cfg) \ 108 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED)) 109 #define virtio_gpu_dmabuf_enabled(_cfg) \ 110 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) 111 #define virtio_gpu_blob_enabled(_cfg) \ 112 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) 113 #define virtio_gpu_context_init_enabled(_cfg) \ 114 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED)) 115 #define virtio_gpu_rutabaga_enabled(_cfg) \ 116 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_RUTABAGA_ENABLED)) 117 #define virtio_gpu_hostmem_enabled(_cfg) \ 118 (_cfg.hostmem > 0) 119 #define virtio_gpu_venus_enabled(_cfg) \ 120 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VENUS_ENABLED)) 121 122 struct virtio_gpu_base_conf { 123 uint32_t max_outputs; 124 uint32_t flags; 125 uint32_t xres; 126 uint32_t yres; 127 uint64_t hostmem; 128 }; 129 130 struct virtio_gpu_ctrl_command { 131 VirtQueueElement elem; 132 VirtQueue *vq; 133 struct virtio_gpu_ctrl_hdr cmd_hdr; 134 uint32_t error; 135 bool finished; 136 QTAILQ_ENTRY(virtio_gpu_ctrl_command) next; 137 }; 138 139 struct VirtIOGPUBase { 140 VirtIODevice parent_obj; 141 142 Error *migration_blocker; 143 144 struct virtio_gpu_base_conf conf; 145 struct virtio_gpu_config virtio_config; 146 const GraphicHwOps *hw_ops; 147 148 int renderer_blocked; 149 int enable; 150 151 MemoryRegion hostmem; 152 153 struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; 154 155 int enabled_output_bitmask; 156 struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS]; 157 }; 158 159 struct VirtIOGPUBaseClass { 160 VirtioDeviceClass parent; 161 162 void (*gl_flushed)(VirtIOGPUBase *g); 163 }; 164 165 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \ 166 DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \ 167 DEFINE_PROP_BIT("edid", _state, _conf.flags, \ 168 VIRTIO_GPU_FLAG_EDID_ENABLED, true), \ 169 DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1280), \ 170 DEFINE_PROP_UINT32("yres", _state, _conf.yres, 800) 171 172 typedef struct VGPUDMABuf { 173 QemuDmaBuf *buf; 174 uint32_t scanout_id; 175 QTAILQ_ENTRY(VGPUDMABuf) next; 176 } VGPUDMABuf; 177 178 struct VirtIOGPU { 179 VirtIOGPUBase parent_obj; 180 181 uint8_t scanout_vmstate_version; 182 uint64_t conf_max_hostmem; 183 184 VirtQueue *ctrl_vq; 185 VirtQueue *cursor_vq; 186 187 QEMUBH *ctrl_bh; 188 QEMUBH *cursor_bh; 189 QEMUBH *reset_bh; 190 QemuCond reset_cond; 191 bool reset_finished; 192 193 QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist; 194 QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq; 195 QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq; 196 197 uint64_t hostmem; 198 199 bool processing_cmdq; 200 201 uint32_t inflight; 202 struct { 203 uint32_t max_inflight; 204 uint32_t requests; 205 uint32_t req_3d; 206 uint32_t bytes_3d; 207 } stats; 208 209 struct { 210 QTAILQ_HEAD(, VGPUDMABuf) bufs; 211 VGPUDMABuf *primary[VIRTIO_GPU_MAX_SCANOUTS]; 212 } dmabuf; 213 214 GArray *capset_ids; 215 }; 216 217 struct VirtIOGPUClass { 218 VirtIOGPUBaseClass parent; 219 220 void (*handle_ctrl)(VirtIODevice *vdev, VirtQueue *vq); 221 void (*process_cmd)(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd); 222 void (*update_cursor_data)(VirtIOGPU *g, 223 struct virtio_gpu_scanout *s, 224 uint32_t resource_id); 225 void (*resource_destroy)(VirtIOGPU *g, 226 struct virtio_gpu_simple_resource *res, 227 Error **errp); 228 }; 229 230 /* VirtIOGPUGL renderer states */ 231 typedef enum { 232 RS_START, /* starting state */ 233 RS_INIT_FAILED, /* failed initialisation */ 234 RS_INITED, /* initialised and working */ 235 RS_RESET, /* inited and reset pending, moves to start after reset */ 236 } RenderState; 237 238 struct VirtIOGPUGL { 239 struct VirtIOGPU parent_obj; 240 241 RenderState renderer_state; 242 243 QEMUTimer *fence_poll; 244 QEMUTimer *print_stats; 245 246 QEMUBH *cmdq_resume_bh; 247 }; 248 249 struct VhostUserGPU { 250 VirtIOGPUBase parent_obj; 251 252 VhostUserBackend *vhost; 253 int vhost_gpu_fd; /* closed by the chardev */ 254 CharBackend vhost_chr; 255 QemuDmaBuf *dmabuf[VIRTIO_GPU_MAX_SCANOUTS]; 256 bool backend_blocked; 257 }; 258 259 #define MAX_SLOTS 4096 260 261 struct MemoryRegionInfo { 262 int used; 263 MemoryRegion mr; 264 uint32_t resource_id; 265 }; 266 267 struct rutabaga; 268 269 struct VirtIOGPURutabaga { 270 VirtIOGPU parent_obj; 271 struct MemoryRegionInfo memory_regions[MAX_SLOTS]; 272 uint64_t capset_mask; 273 char *wayland_socket_path; 274 char *wsi; 275 bool headless; 276 uint32_t num_capsets; 277 struct rutabaga *rutabaga; 278 }; 279 280 #define VIRTIO_GPU_FILL_CMD(out) do { \ 281 size_t virtiogpufillcmd_s_ = \ 282 iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \ 283 &out, sizeof(out)); \ 284 if (virtiogpufillcmd_s_ != sizeof(out)) { \ 285 qemu_log_mask(LOG_GUEST_ERROR, \ 286 "%s: command size incorrect %zu vs %zu\n", \ 287 __func__, virtiogpufillcmd_s_, sizeof(out)); \ 288 return; \ 289 } \ 290 } while (0) 291 292 /* virtio-gpu-base.c */ 293 bool virtio_gpu_base_device_realize(DeviceState *qdev, 294 VirtIOHandleOutput ctrl_cb, 295 VirtIOHandleOutput cursor_cb, 296 Error **errp); 297 void virtio_gpu_base_device_unrealize(DeviceState *qdev); 298 void virtio_gpu_base_reset(VirtIOGPUBase *g); 299 void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g, 300 struct virtio_gpu_resp_display_info *dpy_info); 301 302 void virtio_gpu_base_generate_edid(VirtIOGPUBase *g, int scanout, 303 struct virtio_gpu_resp_edid *edid); 304 /* virtio-gpu.c */ 305 struct virtio_gpu_simple_resource * 306 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); 307 308 void virtio_gpu_ctrl_response(VirtIOGPU *g, 309 struct virtio_gpu_ctrl_command *cmd, 310 struct virtio_gpu_ctrl_hdr *resp, 311 size_t resp_len); 312 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g, 313 struct virtio_gpu_ctrl_command *cmd, 314 enum virtio_gpu_ctrl_type type); 315 void virtio_gpu_get_display_info(VirtIOGPU *g, 316 struct virtio_gpu_ctrl_command *cmd); 317 void virtio_gpu_get_edid(VirtIOGPU *g, 318 struct virtio_gpu_ctrl_command *cmd); 319 int virtio_gpu_create_mapping_iov(VirtIOGPU *g, 320 uint32_t nr_entries, uint32_t offset, 321 struct virtio_gpu_ctrl_command *cmd, 322 uint64_t **addr, struct iovec **iov, 323 uint32_t *niov); 324 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, 325 struct iovec *iov, uint32_t count); 326 void virtio_gpu_cleanup_mapping(VirtIOGPU *g, 327 struct virtio_gpu_simple_resource *res); 328 void virtio_gpu_process_cmdq(VirtIOGPU *g); 329 void virtio_gpu_device_realize(DeviceState *qdev, Error **errp); 330 void virtio_gpu_reset(VirtIODevice *vdev); 331 void virtio_gpu_simple_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd); 332 void virtio_gpu_update_cursor_data(VirtIOGPU *g, 333 struct virtio_gpu_scanout *s, 334 uint32_t resource_id); 335 336 /** 337 * virtio_gpu_scanout_blob_to_fb() - fill out fb based on scanout data 338 * fb: the frame-buffer descriptor to fill out 339 * ss: the scanout blob data 340 * blob_size: size of scanout blob data 341 * 342 * This will check we have enough space for the frame taking into 343 * account that stride. 344 * 345 * Returns true on success, otherwise logs guest error and returns false 346 */ 347 bool virtio_gpu_scanout_blob_to_fb(struct virtio_gpu_framebuffer *fb, 348 struct virtio_gpu_set_scanout_blob *ss, 349 uint64_t blob_size); 350 351 /* virtio-gpu-udmabuf.c */ 352 bool virtio_gpu_have_udmabuf(void); 353 void virtio_gpu_init_udmabuf(struct virtio_gpu_simple_resource *res); 354 void virtio_gpu_fini_udmabuf(struct virtio_gpu_simple_resource *res); 355 int virtio_gpu_update_dmabuf(VirtIOGPU *g, 356 uint32_t scanout_id, 357 struct virtio_gpu_simple_resource *res, 358 struct virtio_gpu_framebuffer *fb, 359 struct virtio_gpu_rect *r); 360 361 void virtio_gpu_update_scanout(VirtIOGPU *g, 362 uint32_t scanout_id, 363 struct virtio_gpu_simple_resource *res, 364 struct virtio_gpu_framebuffer *fb, 365 struct virtio_gpu_rect *r); 366 void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id); 367 368 /* virtio-gpu-3d.c */ 369 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, 370 struct virtio_gpu_ctrl_command *cmd); 371 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g); 372 void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g); 373 void virtio_gpu_virgl_reset(VirtIOGPU *g); 374 int virtio_gpu_virgl_init(VirtIOGPU *g); 375 GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g); 376 377 #endif 378