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Searched defs:UMC_BASE__INST3_SEG0 (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dnavi10_ip_offset.h792 #define UMC_BASE__INST3_SEG0 0 macro
H A Ddimgrey_cavefish_ip_offset.h972 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
H A Dvega20_ip_offset.h861 #define UMC_BASE__INST3_SEG0 0 macro
H A Dnavi12_ip_offset.h1011 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
H A Dsienna_cichlid_ip_offset.h1060 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
H A Dnavi14_ip_offset.h1011 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
H A Dvega10_ip_offset.h1103 #define UMC_BASE__INST3_SEG0 0 macro
H A Dbeige_goby_ip_offset.h1197 #define UMC_BASE__INST3_SEG0 0 macro
H A Drenoir_ip_offset.h1261 #define UMC_BASE__INST3_SEG0 0 macro
H A Dyellow_carp_offset.h1288 #define UMC_BASE__INST3_SEG0 0 macro
H A Dvangogh_ip_offset.h1369 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
H A Daldebaran_ip_offset.h1416 #define UMC_BASE__INST3_SEG0 0x00194000 macro
H A Darct_ip_offset.h1446 #define UMC_BASE__INST3_SEG0 0x00013320 macro