xref: /openbmc/linux/drivers/iio/proximity/sx9310.c (revision 7cf15f42)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright 2018 Google LLC.
4  *
5  * Driver for Semtech's SX9310/SX9311 capacitive proximity/button solution.
6  * Based on SX9500 driver and Semtech driver using the input framework
7  * <https://my.syncplicity.com/share/teouwsim8niiaud/
8  *          linux-driver-SX9310_NoSmartHSensing>.
9  * Reworked in April 2019 by Evan Green <evgreen@chromium.org>
10  * and in January 2020 by Daniel Campello <campello@chromium.org>.
11  */
12 
13 #include <linux/bitfield.h>
14 #include <linux/delay.h>
15 #include <linux/i2c.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel.h>
18 #include <linux/log2.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/module.h>
21 #include <linux/pm.h>
22 #include <linux/property.h>
23 #include <linux/regmap.h>
24 #include <linux/iio/iio.h>
25 
26 #include "sx_common.h"
27 
28 /* Register definitions. */
29 #define SX9310_REG_IRQ_SRC				SX_COMMON_REG_IRQ_SRC
30 #define SX9310_REG_STAT0				0x01
31 #define SX9310_REG_STAT1				0x02
32 #define SX9310_REG_STAT1_COMPSTAT_MASK			GENMASK(3, 0)
33 #define SX9310_REG_IRQ_MSK				0x03
34 #define   SX9310_CONVDONE_IRQ				BIT(3)
35 #define   SX9310_FAR_IRQ				BIT(5)
36 #define   SX9310_CLOSE_IRQ				BIT(6)
37 #define SX9310_REG_IRQ_FUNC				0x04
38 
39 #define SX9310_REG_PROX_CTRL0				0x10
40 #define   SX9310_REG_PROX_CTRL0_SENSOREN_MASK		GENMASK(3, 0)
41 #define   SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK		GENMASK(7, 4)
42 #define   SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS		0x01
43 #define SX9310_REG_PROX_CTRL1				0x11
44 #define SX9310_REG_PROX_CTRL2				0x12
45 #define   SX9310_REG_PROX_CTRL2_COMBMODE_MASK		GENMASK(7, 6)
46 #define   SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3 (0x03 << 6)
47 #define   SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2	(0x02 << 6)
48 #define   SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1	(0x01 << 6)
49 #define   SX9310_REG_PROX_CTRL2_COMBMODE_CS3		(0x00 << 6)
50 #define   SX9310_REG_PROX_CTRL2_SHIELDEN_MASK		GENMASK(3, 2)
51 #define   SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC	(0x01 << 2)
52 #define   SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND		(0x02 << 2)
53 #define SX9310_REG_PROX_CTRL3				0x13
54 #define   SX9310_REG_PROX_CTRL3_GAIN0_MASK		GENMASK(3, 2)
55 #define   SX9310_REG_PROX_CTRL3_GAIN0_X8		(0x03 << 2)
56 #define   SX9310_REG_PROX_CTRL3_GAIN12_MASK		GENMASK(1, 0)
57 #define   SX9310_REG_PROX_CTRL3_GAIN12_X4		0x02
58 #define SX9310_REG_PROX_CTRL4				0x14
59 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_MASK		GENMASK(2, 0)
60 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST	0x07
61 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE	0x06
62 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_FINE		0x05
63 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM	0x04
64 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE 0x03
65 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE	0x02
66 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE	0x01
67 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST	0x00
68 #define SX9310_REG_PROX_CTRL5				0x15
69 #define   SX9310_REG_PROX_CTRL5_RANGE_SMALL		(0x03 << 6)
70 #define   SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK	GENMASK(3, 2)
71 #define   SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1		(0x01 << 2)
72 #define   SX9310_REG_PROX_CTRL5_RAWFILT_MASK		GENMASK(1, 0)
73 #define   SX9310_REG_PROX_CTRL5_RAWFILT_SHIFT		0
74 #define   SX9310_REG_PROX_CTRL5_RAWFILT_1P25		0x02
75 #define SX9310_REG_PROX_CTRL6				0x16
76 #define   SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT	0x20
77 #define SX9310_REG_PROX_CTRL7				0x17
78 #define   SX9310_REG_PROX_CTRL7_AVGNEGFILT_2		(0x01 << 3)
79 #define   SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK		GENMASK(2, 0)
80 #define   SX9310_REG_PROX_CTRL7_AVGPOSFILT_SHIFT	0
81 #define   SX9310_REG_PROX_CTRL7_AVGPOSFILT_512		0x05
82 #define SX9310_REG_PROX_CTRL8				0x18
83 #define   SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK		GENMASK(7, 3)
84 #define SX9310_REG_PROX_CTRL9				0x19
85 #define   SX9310_REG_PROX_CTRL8_9_PTHRESH_28		(0x08 << 3)
86 #define   SX9310_REG_PROX_CTRL8_9_PTHRESH_96		(0x11 << 3)
87 #define   SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900	0x03
88 #define   SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500	0x05
89 #define SX9310_REG_PROX_CTRL10				0x1a
90 #define   SX9310_REG_PROX_CTRL10_HYST_MASK		GENMASK(5, 4)
91 #define   SX9310_REG_PROX_CTRL10_HYST_6PCT		(0x01 << 4)
92 #define   SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK	GENMASK(3, 2)
93 #define   SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK	GENMASK(1, 0)
94 #define   SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2		0x01
95 #define SX9310_REG_PROX_CTRL11				0x1b
96 #define SX9310_REG_PROX_CTRL12				0x1c
97 #define SX9310_REG_PROX_CTRL13				0x1d
98 #define SX9310_REG_PROX_CTRL14				0x1e
99 #define SX9310_REG_PROX_CTRL15				0x1f
100 #define SX9310_REG_PROX_CTRL16				0x20
101 #define SX9310_REG_PROX_CTRL17				0x21
102 #define SX9310_REG_PROX_CTRL18				0x22
103 #define SX9310_REG_PROX_CTRL19				0x23
104 #define SX9310_REG_SAR_CTRL0				0x2a
105 #define   SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES		(0x02 << 5)
106 #define   SX9310_REG_SAR_CTRL0_SARHYST_8		(0x02 << 3)
107 #define SX9310_REG_SAR_CTRL1				0x2b
108 /* Each increment of the slope register is 0.0078125. */
109 #define   SX9310_REG_SAR_CTRL1_SLOPE(_hnslope)		(_hnslope / 78125)
110 #define SX9310_REG_SAR_CTRL2				0x2c
111 #define   SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT	0x3c
112 
113 #define SX9310_REG_SENSOR_SEL				0x30
114 #define SX9310_REG_USE_MSB				0x31
115 #define SX9310_REG_USE_LSB				0x32
116 #define SX9310_REG_AVG_MSB				0x33
117 #define SX9310_REG_AVG_LSB				0x34
118 #define SX9310_REG_DIFF_MSB				0x35
119 #define SX9310_REG_DIFF_LSB				0x36
120 #define SX9310_REG_OFFSET_MSB				0x37
121 #define SX9310_REG_OFFSET_LSB				0x38
122 #define SX9310_REG_SAR_MSB				0x39
123 #define SX9310_REG_SAR_LSB				0x3a
124 #define SX9310_REG_I2C_ADDR				0x40
125 #define SX9310_REG_PAUSE				0x41
126 #define SX9310_REG_WHOAMI				0x42
127 #define   SX9310_WHOAMI_VALUE				0x01
128 #define   SX9311_WHOAMI_VALUE				0x02
129 #define SX9310_REG_RESET				0x7f
130 
131 
132 /* 4 hardware channels, as defined in STAT0: COMB, CS2, CS1 and CS0. */
133 #define SX9310_NUM_CHANNELS				4
134 static_assert(SX9310_NUM_CHANNELS <= SX_COMMON_MAX_NUM_CHANNELS);
135 
136 #define SX9310_NAMED_CHANNEL(idx, name)				 \
137 {								 \
138 	.type = IIO_PROXIMITY,					 \
139 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |		 \
140 			      BIT(IIO_CHAN_INFO_HARDWAREGAIN),   \
141 	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
142 	.info_mask_separate_available =				 \
143 		BIT(IIO_CHAN_INFO_HARDWAREGAIN),		 \
144 	.info_mask_shared_by_all_available =			 \
145 		BIT(IIO_CHAN_INFO_SAMP_FREQ),			 \
146 	.indexed = 1,						 \
147 	.channel = idx,						 \
148 	.extend_name = name,					 \
149 	.address = SX9310_REG_DIFF_MSB,				 \
150 	.event_spec = sx_common_events,				 \
151 	.num_event_specs = ARRAY_SIZE(sx_common_events),	 \
152 	.scan_index = idx,					 \
153 	.scan_type = {						 \
154 		.sign = 's',					 \
155 		.realbits = 12,					 \
156 		.storagebits = 16,				 \
157 		.endianness = IIO_BE,				 \
158 	},							 \
159 }
160 #define SX9310_CHANNEL(idx) SX9310_NAMED_CHANNEL(idx, NULL)
161 
162 static const struct iio_chan_spec sx9310_channels[] = {
163 	SX9310_CHANNEL(0),			/* CS0 */
164 	SX9310_CHANNEL(1),			/* CS1 */
165 	SX9310_CHANNEL(2),			/* CS2 */
166 	SX9310_NAMED_CHANNEL(3, "comb"),	/* COMB */
167 
168 	IIO_CHAN_SOFT_TIMESTAMP(4),
169 };
170 
171 /*
172  * Each entry contains the integer part (val) and the fractional part, in micro
173  * seconds. It conforms to the IIO output IIO_VAL_INT_PLUS_MICRO.
174  */
175 static const struct {
176 	int val;
177 	int val2;
178 } sx9310_samp_freq_table[] = {
179 	{ 500, 0 }, /* 0000: Min (no idle time) */
180 	{ 66, 666666 }, /* 0001: 15 ms */
181 	{ 33, 333333 }, /* 0010: 30 ms (Typ.) */
182 	{ 22, 222222 }, /* 0011: 45 ms */
183 	{ 16, 666666 }, /* 0100: 60 ms */
184 	{ 11, 111111 }, /* 0101: 90 ms */
185 	{ 8, 333333 }, /* 0110: 120 ms */
186 	{ 5, 0 }, /* 0111: 200 ms */
187 	{ 2, 500000 }, /* 1000: 400 ms */
188 	{ 1, 666666 }, /* 1001: 600 ms */
189 	{ 1, 250000 }, /* 1010: 800 ms */
190 	{ 1, 0 }, /* 1011: 1 s */
191 	{ 0, 500000 }, /* 1100: 2 s */
192 	{ 0, 333333 }, /* 1101: 3 s */
193 	{ 0, 250000 }, /* 1110: 4 s */
194 	{ 0, 200000 }, /* 1111: 5 s */
195 };
196 static const unsigned int sx9310_scan_period_table[] = {
197 	2,   15,  30,  45,   60,   90,	 120,  200,
198 	400, 600, 800, 1000, 2000, 3000, 4000, 5000,
199 };
200 
201 static const struct regmap_range sx9310_writable_reg_ranges[] = {
202 	regmap_reg_range(SX9310_REG_IRQ_MSK, SX9310_REG_IRQ_FUNC),
203 	regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19),
204 	regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2),
205 	regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SENSOR_SEL),
206 	regmap_reg_range(SX9310_REG_OFFSET_MSB, SX9310_REG_OFFSET_LSB),
207 	regmap_reg_range(SX9310_REG_PAUSE, SX9310_REG_PAUSE),
208 	regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
209 };
210 
211 static const struct regmap_access_table sx9310_writeable_regs = {
212 	.yes_ranges = sx9310_writable_reg_ranges,
213 	.n_yes_ranges = ARRAY_SIZE(sx9310_writable_reg_ranges),
214 };
215 
216 static const struct regmap_range sx9310_readable_reg_ranges[] = {
217 	regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_IRQ_FUNC),
218 	regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19),
219 	regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2),
220 	regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SAR_LSB),
221 	regmap_reg_range(SX9310_REG_I2C_ADDR, SX9310_REG_WHOAMI),
222 	regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
223 };
224 
225 static const struct regmap_access_table sx9310_readable_regs = {
226 	.yes_ranges = sx9310_readable_reg_ranges,
227 	.n_yes_ranges = ARRAY_SIZE(sx9310_readable_reg_ranges),
228 };
229 
230 static const struct regmap_range sx9310_volatile_reg_ranges[] = {
231 	regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_STAT1),
232 	regmap_reg_range(SX9310_REG_USE_MSB, SX9310_REG_DIFF_LSB),
233 	regmap_reg_range(SX9310_REG_SAR_MSB, SX9310_REG_SAR_LSB),
234 	regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
235 };
236 
237 static const struct regmap_access_table sx9310_volatile_regs = {
238 	.yes_ranges = sx9310_volatile_reg_ranges,
239 	.n_yes_ranges = ARRAY_SIZE(sx9310_volatile_reg_ranges),
240 };
241 
242 static const struct regmap_config sx9310_regmap_config = {
243 	.reg_bits = 8,
244 	.val_bits = 8,
245 
246 	.max_register = SX9310_REG_RESET,
247 	.cache_type = REGCACHE_RBTREE,
248 
249 	.wr_table = &sx9310_writeable_regs,
250 	.rd_table = &sx9310_readable_regs,
251 	.volatile_table = &sx9310_volatile_regs,
252 };
253 
sx9310_read_prox_data(struct sx_common_data * data,const struct iio_chan_spec * chan,__be16 * val)254 static int sx9310_read_prox_data(struct sx_common_data *data,
255 				 const struct iio_chan_spec *chan, __be16 *val)
256 {
257 	int ret;
258 
259 	ret = regmap_write(data->regmap, SX9310_REG_SENSOR_SEL, chan->channel);
260 	if (ret)
261 		return ret;
262 
263 	return regmap_bulk_read(data->regmap, chan->address, val, sizeof(*val));
264 }
265 
266 /*
267  * If we have no interrupt support, we have to wait for a scan period
268  * after enabling a channel to get a result.
269  */
sx9310_wait_for_sample(struct sx_common_data * data)270 static int sx9310_wait_for_sample(struct sx_common_data *data)
271 {
272 	int ret;
273 	unsigned int val;
274 
275 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &val);
276 	if (ret)
277 		return ret;
278 
279 	val = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, val);
280 
281 	msleep(sx9310_scan_period_table[val]);
282 
283 	return 0;
284 }
285 
sx9310_read_gain(struct sx_common_data * data,const struct iio_chan_spec * chan,int * val)286 static int sx9310_read_gain(struct sx_common_data *data,
287 			    const struct iio_chan_spec *chan, int *val)
288 {
289 	unsigned int regval, gain;
290 	int ret;
291 
292 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL3, &regval);
293 	if (ret)
294 		return ret;
295 
296 	switch (chan->channel) {
297 	case 0:
298 	case 3:
299 		gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN0_MASK, regval);
300 		break;
301 	case 1:
302 	case 2:
303 		gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN12_MASK, regval);
304 		break;
305 	default:
306 		return -EINVAL;
307 	}
308 
309 	*val = 1 << gain;
310 
311 	return IIO_VAL_INT;
312 }
313 
sx9310_read_samp_freq(struct sx_common_data * data,int * val,int * val2)314 static int sx9310_read_samp_freq(struct sx_common_data *data, int *val, int *val2)
315 {
316 	unsigned int regval;
317 	int ret;
318 
319 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &regval);
320 	if (ret)
321 		return ret;
322 
323 	regval = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, regval);
324 	*val = sx9310_samp_freq_table[regval].val;
325 	*val2 = sx9310_samp_freq_table[regval].val2;
326 
327 	return IIO_VAL_INT_PLUS_MICRO;
328 }
329 
sx9310_read_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int * val,int * val2,long mask)330 static int sx9310_read_raw(struct iio_dev *indio_dev,
331 			   const struct iio_chan_spec *chan, int *val,
332 			   int *val2, long mask)
333 {
334 	struct sx_common_data *data = iio_priv(indio_dev);
335 	int ret;
336 
337 	if (chan->type != IIO_PROXIMITY)
338 		return -EINVAL;
339 
340 	switch (mask) {
341 	case IIO_CHAN_INFO_RAW:
342 		ret = iio_device_claim_direct_mode(indio_dev);
343 		if (ret)
344 			return ret;
345 
346 		ret = sx_common_read_proximity(data, chan, val);
347 		iio_device_release_direct_mode(indio_dev);
348 		return ret;
349 	case IIO_CHAN_INFO_HARDWAREGAIN:
350 		ret = iio_device_claim_direct_mode(indio_dev);
351 		if (ret)
352 			return ret;
353 
354 		ret = sx9310_read_gain(data, chan, val);
355 		iio_device_release_direct_mode(indio_dev);
356 		return ret;
357 	case IIO_CHAN_INFO_SAMP_FREQ:
358 		return sx9310_read_samp_freq(data, val, val2);
359 	default:
360 		return -EINVAL;
361 	}
362 }
363 
364 static const int sx9310_gain_vals[] = { 1, 2, 4, 8 };
365 
sx9310_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)366 static int sx9310_read_avail(struct iio_dev *indio_dev,
367 			     struct iio_chan_spec const *chan,
368 			     const int **vals, int *type, int *length,
369 			     long mask)
370 {
371 	if (chan->type != IIO_PROXIMITY)
372 		return -EINVAL;
373 
374 	switch (mask) {
375 	case IIO_CHAN_INFO_HARDWAREGAIN:
376 		*type = IIO_VAL_INT;
377 		*length = ARRAY_SIZE(sx9310_gain_vals);
378 		*vals = sx9310_gain_vals;
379 		return IIO_AVAIL_LIST;
380 	case IIO_CHAN_INFO_SAMP_FREQ:
381 		*type = IIO_VAL_INT_PLUS_MICRO;
382 		*length = ARRAY_SIZE(sx9310_samp_freq_table) * 2;
383 		*vals = (int *)sx9310_samp_freq_table;
384 		return IIO_AVAIL_LIST;
385 	default:
386 		return -EINVAL;
387 	}
388 }
389 
390 static const unsigned int sx9310_pthresh_codes[] = {
391 	2, 4, 6, 8, 12, 16, 20, 24, 28, 32, 40, 48, 56, 64, 72, 80, 88, 96, 112,
392 	128, 144, 160, 192, 224, 256, 320, 384, 512, 640, 768, 1024, 1536
393 };
394 
sx9310_get_thresh_reg(unsigned int channel)395 static int sx9310_get_thresh_reg(unsigned int channel)
396 {
397 	switch (channel) {
398 	case 0:
399 	case 3:
400 		return SX9310_REG_PROX_CTRL8;
401 	case 1:
402 	case 2:
403 		return SX9310_REG_PROX_CTRL9;
404 	default:
405 		return -EINVAL;
406 	}
407 }
408 
sx9310_read_thresh(struct sx_common_data * data,const struct iio_chan_spec * chan,int * val)409 static int sx9310_read_thresh(struct sx_common_data *data,
410 			      const struct iio_chan_spec *chan, int *val)
411 {
412 	unsigned int reg;
413 	unsigned int regval;
414 	int ret;
415 
416 	reg = ret = sx9310_get_thresh_reg(chan->channel);
417 	if (ret < 0)
418 		return ret;
419 
420 	ret = regmap_read(data->regmap, reg, &regval);
421 	if (ret)
422 		return ret;
423 
424 	regval = FIELD_GET(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
425 	if (regval >= ARRAY_SIZE(sx9310_pthresh_codes))
426 		return -EINVAL;
427 
428 	*val = sx9310_pthresh_codes[regval];
429 	return IIO_VAL_INT;
430 }
431 
sx9310_read_hysteresis(struct sx_common_data * data,const struct iio_chan_spec * chan,int * val)432 static int sx9310_read_hysteresis(struct sx_common_data *data,
433 				  const struct iio_chan_spec *chan, int *val)
434 {
435 	unsigned int regval, pthresh;
436 	int ret;
437 
438 	ret = sx9310_read_thresh(data, chan, &pthresh);
439 	if (ret < 0)
440 		return ret;
441 
442 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, &regval);
443 	if (ret)
444 		return ret;
445 
446 	regval = FIELD_GET(SX9310_REG_PROX_CTRL10_HYST_MASK, regval);
447 	if (!regval)
448 		regval = 5;
449 
450 	/* regval is at most 5 */
451 	*val = pthresh >> (5 - regval);
452 
453 	return IIO_VAL_INT;
454 }
455 
sx9310_read_far_debounce(struct sx_common_data * data,int * val)456 static int sx9310_read_far_debounce(struct sx_common_data *data, int *val)
457 {
458 	unsigned int regval;
459 	int ret;
460 
461 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, &regval);
462 	if (ret)
463 		return ret;
464 
465 	regval = FIELD_GET(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, regval);
466 	if (regval)
467 		*val = 1 << regval;
468 	else
469 		*val = 0;
470 
471 	return IIO_VAL_INT;
472 }
473 
sx9310_read_close_debounce(struct sx_common_data * data,int * val)474 static int sx9310_read_close_debounce(struct sx_common_data *data, int *val)
475 {
476 	unsigned int regval;
477 	int ret;
478 
479 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, &regval);
480 	if (ret)
481 		return ret;
482 
483 	regval = FIELD_GET(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, regval);
484 	if (regval)
485 		*val = 1 << regval;
486 	else
487 		*val = 0;
488 
489 	return IIO_VAL_INT;
490 }
491 
sx9310_read_event_val(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)492 static int sx9310_read_event_val(struct iio_dev *indio_dev,
493 				 const struct iio_chan_spec *chan,
494 				 enum iio_event_type type,
495 				 enum iio_event_direction dir,
496 				 enum iio_event_info info, int *val, int *val2)
497 {
498 	struct sx_common_data *data = iio_priv(indio_dev);
499 
500 	if (chan->type != IIO_PROXIMITY)
501 		return -EINVAL;
502 
503 	switch (info) {
504 	case IIO_EV_INFO_VALUE:
505 		return sx9310_read_thresh(data, chan, val);
506 	case IIO_EV_INFO_PERIOD:
507 		switch (dir) {
508 		case IIO_EV_DIR_RISING:
509 			return sx9310_read_far_debounce(data, val);
510 		case IIO_EV_DIR_FALLING:
511 			return sx9310_read_close_debounce(data, val);
512 		default:
513 			return -EINVAL;
514 		}
515 	case IIO_EV_INFO_HYSTERESIS:
516 		return sx9310_read_hysteresis(data, chan, val);
517 	default:
518 		return -EINVAL;
519 	}
520 }
521 
sx9310_write_thresh(struct sx_common_data * data,const struct iio_chan_spec * chan,int val)522 static int sx9310_write_thresh(struct sx_common_data *data,
523 			       const struct iio_chan_spec *chan, int val)
524 {
525 	unsigned int reg;
526 	unsigned int regval;
527 	int ret, i;
528 
529 	reg = ret = sx9310_get_thresh_reg(chan->channel);
530 	if (ret < 0)
531 		return ret;
532 
533 	for (i = 0; i < ARRAY_SIZE(sx9310_pthresh_codes); i++) {
534 		if (sx9310_pthresh_codes[i] == val) {
535 			regval = i;
536 			break;
537 		}
538 	}
539 
540 	if (i == ARRAY_SIZE(sx9310_pthresh_codes))
541 		return -EINVAL;
542 
543 	regval = FIELD_PREP(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
544 	mutex_lock(&data->mutex);
545 	ret = regmap_update_bits(data->regmap, reg,
546 				 SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
547 	mutex_unlock(&data->mutex);
548 
549 	return ret;
550 }
551 
sx9310_write_hysteresis(struct sx_common_data * data,const struct iio_chan_spec * chan,int _val)552 static int sx9310_write_hysteresis(struct sx_common_data *data,
553 				   const struct iio_chan_spec *chan, int _val)
554 {
555 	unsigned int hyst, val = _val;
556 	int ret, pthresh;
557 
558 	ret = sx9310_read_thresh(data, chan, &pthresh);
559 	if (ret < 0)
560 		return ret;
561 
562 	if (val == 0)
563 		hyst = 0;
564 	else if (val == pthresh >> 2)
565 		hyst = 3;
566 	else if (val == pthresh >> 3)
567 		hyst = 2;
568 	else if (val == pthresh >> 4)
569 		hyst = 1;
570 	else
571 		return -EINVAL;
572 
573 	hyst = FIELD_PREP(SX9310_REG_PROX_CTRL10_HYST_MASK, hyst);
574 	mutex_lock(&data->mutex);
575 	ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
576 				 SX9310_REG_PROX_CTRL10_HYST_MASK, hyst);
577 	mutex_unlock(&data->mutex);
578 
579 	return ret;
580 }
581 
sx9310_write_far_debounce(struct sx_common_data * data,int val)582 static int sx9310_write_far_debounce(struct sx_common_data *data, int val)
583 {
584 	int ret;
585 	unsigned int regval;
586 
587 	if (val > 0)
588 		val = ilog2(val);
589 	if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val))
590 		return -EINVAL;
591 
592 	regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val);
593 
594 	mutex_lock(&data->mutex);
595 	ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
596 				 SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK,
597 				 regval);
598 	mutex_unlock(&data->mutex);
599 
600 	return ret;
601 }
602 
sx9310_write_close_debounce(struct sx_common_data * data,int val)603 static int sx9310_write_close_debounce(struct sx_common_data *data, int val)
604 {
605 	int ret;
606 	unsigned int regval;
607 
608 	if (val > 0)
609 		val = ilog2(val);
610 	if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val))
611 		return -EINVAL;
612 
613 	regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val);
614 
615 	mutex_lock(&data->mutex);
616 	ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
617 				 SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK,
618 				 regval);
619 	mutex_unlock(&data->mutex);
620 
621 	return ret;
622 }
623 
sx9310_write_event_val(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)624 static int sx9310_write_event_val(struct iio_dev *indio_dev,
625 				  const struct iio_chan_spec *chan,
626 				  enum iio_event_type type,
627 				  enum iio_event_direction dir,
628 				  enum iio_event_info info, int val, int val2)
629 {
630 	struct sx_common_data *data = iio_priv(indio_dev);
631 
632 	if (chan->type != IIO_PROXIMITY)
633 		return -EINVAL;
634 
635 	switch (info) {
636 	case IIO_EV_INFO_VALUE:
637 		return sx9310_write_thresh(data, chan, val);
638 	case IIO_EV_INFO_PERIOD:
639 		switch (dir) {
640 		case IIO_EV_DIR_RISING:
641 			return sx9310_write_far_debounce(data, val);
642 		case IIO_EV_DIR_FALLING:
643 			return sx9310_write_close_debounce(data, val);
644 		default:
645 			return -EINVAL;
646 		}
647 	case IIO_EV_INFO_HYSTERESIS:
648 		return sx9310_write_hysteresis(data, chan, val);
649 	default:
650 		return -EINVAL;
651 	}
652 }
653 
sx9310_set_samp_freq(struct sx_common_data * data,int val,int val2)654 static int sx9310_set_samp_freq(struct sx_common_data *data, int val, int val2)
655 {
656 	int i, ret;
657 
658 	for (i = 0; i < ARRAY_SIZE(sx9310_samp_freq_table); i++)
659 		if (val == sx9310_samp_freq_table[i].val &&
660 		    val2 == sx9310_samp_freq_table[i].val2)
661 			break;
662 
663 	if (i == ARRAY_SIZE(sx9310_samp_freq_table))
664 		return -EINVAL;
665 
666 	mutex_lock(&data->mutex);
667 
668 	ret = regmap_update_bits(
669 		data->regmap, SX9310_REG_PROX_CTRL0,
670 		SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK,
671 		FIELD_PREP(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, i));
672 
673 	mutex_unlock(&data->mutex);
674 
675 	return ret;
676 }
677 
sx9310_write_gain(struct sx_common_data * data,const struct iio_chan_spec * chan,int val)678 static int sx9310_write_gain(struct sx_common_data *data,
679 			     const struct iio_chan_spec *chan, int val)
680 {
681 	unsigned int gain, mask;
682 	int ret;
683 
684 	gain = ilog2(val);
685 
686 	switch (chan->channel) {
687 	case 0:
688 	case 3:
689 		mask = SX9310_REG_PROX_CTRL3_GAIN0_MASK;
690 		gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN0_MASK, gain);
691 		break;
692 	case 1:
693 	case 2:
694 		mask = SX9310_REG_PROX_CTRL3_GAIN12_MASK;
695 		gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN12_MASK, gain);
696 		break;
697 	default:
698 		return -EINVAL;
699 	}
700 
701 	mutex_lock(&data->mutex);
702 	ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL3, mask,
703 				 gain);
704 	mutex_unlock(&data->mutex);
705 
706 	return ret;
707 }
708 
sx9310_write_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int val,int val2,long mask)709 static int sx9310_write_raw(struct iio_dev *indio_dev,
710 			    const struct iio_chan_spec *chan, int val, int val2,
711 			    long mask)
712 {
713 	struct sx_common_data *data = iio_priv(indio_dev);
714 
715 	if (chan->type != IIO_PROXIMITY)
716 		return -EINVAL;
717 
718 	switch (mask) {
719 	case IIO_CHAN_INFO_SAMP_FREQ:
720 		return sx9310_set_samp_freq(data, val, val2);
721 	case IIO_CHAN_INFO_HARDWAREGAIN:
722 		return sx9310_write_gain(data, chan, val);
723 	default:
724 		return -EINVAL;
725 	}
726 }
727 
728 static const struct sx_common_reg_default sx9310_default_regs[] = {
729 	{ SX9310_REG_IRQ_MSK, 0x00 },
730 	{ SX9310_REG_IRQ_FUNC, 0x00 },
731 	/*
732 	 * The lower 4 bits should not be set as it enable sensors measurements.
733 	 * Turning the detection on before the configuration values are set to
734 	 * good values can cause the device to return erroneous readings.
735 	 */
736 	{ SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS },
737 	{ SX9310_REG_PROX_CTRL1, 0x00 },
738 	{ SX9310_REG_PROX_CTRL2, SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 |
739 				 SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC },
740 	{ SX9310_REG_PROX_CTRL3, SX9310_REG_PROX_CTRL3_GAIN0_X8 |
741 				 SX9310_REG_PROX_CTRL3_GAIN12_X4 },
742 	{ SX9310_REG_PROX_CTRL4, SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST },
743 	{ SX9310_REG_PROX_CTRL5, SX9310_REG_PROX_CTRL5_RANGE_SMALL |
744 				 SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 |
745 				 SX9310_REG_PROX_CTRL5_RAWFILT_1P25 },
746 	{ SX9310_REG_PROX_CTRL6, SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT },
747 	{ SX9310_REG_PROX_CTRL7, SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 |
748 				 SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 },
749 	{ SX9310_REG_PROX_CTRL8, SX9310_REG_PROX_CTRL8_9_PTHRESH_96 |
750 				 SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 },
751 	{ SX9310_REG_PROX_CTRL9, SX9310_REG_PROX_CTRL8_9_PTHRESH_28 |
752 				 SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 },
753 	{ SX9310_REG_PROX_CTRL10, SX9310_REG_PROX_CTRL10_HYST_6PCT |
754 				  SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 },
755 	{ SX9310_REG_PROX_CTRL11, 0x00 },
756 	{ SX9310_REG_PROX_CTRL12, 0x00 },
757 	{ SX9310_REG_PROX_CTRL13, 0x00 },
758 	{ SX9310_REG_PROX_CTRL14, 0x00 },
759 	{ SX9310_REG_PROX_CTRL15, 0x00 },
760 	{ SX9310_REG_PROX_CTRL16, 0x00 },
761 	{ SX9310_REG_PROX_CTRL17, 0x00 },
762 	{ SX9310_REG_PROX_CTRL18, 0x00 },
763 	{ SX9310_REG_PROX_CTRL19, 0x00 },
764 	{ SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES |
765 				SX9310_REG_SAR_CTRL0_SARHYST_8 },
766 	{ SX9310_REG_SAR_CTRL1, SX9310_REG_SAR_CTRL1_SLOPE(10781250) },
767 	{ SX9310_REG_SAR_CTRL2, SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT },
768 };
769 
770 /* Activate all channels and perform an initial compensation. */
sx9310_init_compensation(struct iio_dev * indio_dev)771 static int sx9310_init_compensation(struct iio_dev *indio_dev)
772 {
773 	struct sx_common_data *data = iio_priv(indio_dev);
774 	int ret;
775 	unsigned int val;
776 	unsigned int ctrl0;
777 
778 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &ctrl0);
779 	if (ret)
780 		return ret;
781 
782 	/* run the compensation phase on all channels */
783 	ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0,
784 			   ctrl0 | SX9310_REG_PROX_CTRL0_SENSOREN_MASK);
785 	if (ret)
786 		return ret;
787 
788 	ret = regmap_read_poll_timeout(data->regmap, SX9310_REG_STAT1, val,
789 				       !(val & SX9310_REG_STAT1_COMPSTAT_MASK),
790 				       20000, 2000000);
791 	if (ret)
792 		return ret;
793 
794 	regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);
795 	return ret;
796 }
797 
798 static const struct sx_common_reg_default *
sx9310_get_default_reg(struct device * dev,int idx,struct sx_common_reg_default * reg_def)799 sx9310_get_default_reg(struct device *dev, int idx,
800 		       struct sx_common_reg_default *reg_def)
801 {
802 	u32 combined[SX9310_NUM_CHANNELS];
803 	u32 start = 0, raw = 0, pos = 0;
804 	unsigned long comb_mask = 0;
805 	int ret, i, count;
806 	const char *res;
807 
808 	memcpy(reg_def, &sx9310_default_regs[idx], sizeof(*reg_def));
809 	switch (reg_def->reg) {
810 	case SX9310_REG_PROX_CTRL2:
811 		if (device_property_read_bool(dev, "semtech,cs0-ground")) {
812 			reg_def->def &= ~SX9310_REG_PROX_CTRL2_SHIELDEN_MASK;
813 			reg_def->def |= SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND;
814 		}
815 
816 		count = device_property_count_u32(dev, "semtech,combined-sensors");
817 		if (count < 0 || count > ARRAY_SIZE(combined))
818 			break;
819 		ret = device_property_read_u32_array(dev, "semtech,combined-sensors",
820 				combined, count);
821 		if (ret)
822 			break;
823 
824 		for (i = 0; i < count; i++)
825 			comb_mask |= BIT(combined[i]);
826 
827 		reg_def->def &= ~SX9310_REG_PROX_CTRL2_COMBMODE_MASK;
828 		if (comb_mask == (BIT(3) | BIT(2) | BIT(1) | BIT(0)))
829 			reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3;
830 		else if (comb_mask == (BIT(1) | BIT(2)))
831 			reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2;
832 		else if (comb_mask == (BIT(0) | BIT(1)))
833 			reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1;
834 		else if (comb_mask == BIT(3))
835 			reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS3;
836 
837 		break;
838 	case SX9310_REG_PROX_CTRL4:
839 		ret = device_property_read_string(dev, "semtech,resolution", &res);
840 		if (ret)
841 			break;
842 
843 		reg_def->def &= ~SX9310_REG_PROX_CTRL4_RESOLUTION_MASK;
844 		if (!strcmp(res, "coarsest"))
845 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST;
846 		else if (!strcmp(res, "very-coarse"))
847 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE;
848 		else if (!strcmp(res, "coarse"))
849 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE;
850 		else if (!strcmp(res, "medium-coarse"))
851 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE;
852 		else if (!strcmp(res, "medium"))
853 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM;
854 		else if (!strcmp(res, "fine"))
855 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINE;
856 		else if (!strcmp(res, "very-fine"))
857 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE;
858 		else if (!strcmp(res, "finest"))
859 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST;
860 
861 		break;
862 	case SX9310_REG_PROX_CTRL5:
863 		ret = device_property_read_u32(dev, "semtech,startup-sensor", &start);
864 		if (ret) {
865 			start = FIELD_GET(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK,
866 					  reg_def->def);
867 		}
868 
869 		reg_def->def &= ~SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK;
870 		reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK,
871 					   start);
872 
873 		ret = device_property_read_u32(dev, "semtech,proxraw-strength", &raw);
874 		if (ret) {
875 			raw = FIELD_GET(SX9310_REG_PROX_CTRL5_RAWFILT_MASK,
876 					reg_def->def);
877 		} else {
878 			raw = ilog2(raw);
879 		}
880 
881 		reg_def->def &= ~SX9310_REG_PROX_CTRL5_RAWFILT_MASK;
882 		reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_RAWFILT_MASK,
883 					   raw);
884 		break;
885 	case SX9310_REG_PROX_CTRL7:
886 		ret = device_property_read_u32(dev, "semtech,avg-pos-strength", &pos);
887 		if (ret)
888 			break;
889 
890 		/* Powers of 2, except for a gap between 16 and 64 */
891 		pos = clamp(ilog2(pos), 3, 11) - (pos >= 32 ? 4 : 3);
892 		reg_def->def &= ~SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK;
893 		reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK,
894 					   pos);
895 		break;
896 	}
897 
898 	return reg_def;
899 }
900 
sx9310_check_whoami(struct device * dev,struct iio_dev * indio_dev)901 static int sx9310_check_whoami(struct device *dev,
902 			       struct iio_dev *indio_dev)
903 {
904 	struct sx_common_data *data = iio_priv(indio_dev);
905 	unsigned int long ddata;
906 	unsigned int whoami;
907 	int ret;
908 
909 	ret = regmap_read(data->regmap, SX9310_REG_WHOAMI, &whoami);
910 	if (ret)
911 		return ret;
912 
913 	ddata = (uintptr_t)device_get_match_data(dev);
914 	if (ddata != whoami)
915 		return -EINVAL;
916 
917 	switch (whoami) {
918 	case SX9310_WHOAMI_VALUE:
919 		indio_dev->name = "sx9310";
920 		break;
921 	case SX9311_WHOAMI_VALUE:
922 		indio_dev->name = "sx9311";
923 		break;
924 	default:
925 		return -ENODEV;
926 	}
927 
928 	return 0;
929 }
930 
931 static const struct sx_common_chip_info sx9310_chip_info = {
932 	.reg_stat = SX9310_REG_STAT0,
933 	.reg_irq_msk = SX9310_REG_IRQ_MSK,
934 	.reg_enable_chan = SX9310_REG_PROX_CTRL0,
935 	.reg_reset = SX9310_REG_RESET,
936 
937 	.mask_enable_chan = SX9310_REG_STAT1_COMPSTAT_MASK,
938 	.irq_msk_offset = 3,
939 	.num_channels = SX9310_NUM_CHANNELS,
940 	.num_default_regs = ARRAY_SIZE(sx9310_default_regs),
941 
942 	.ops = {
943 		.read_prox_data = sx9310_read_prox_data,
944 		.check_whoami = sx9310_check_whoami,
945 		.init_compensation = sx9310_init_compensation,
946 		.wait_for_sample = sx9310_wait_for_sample,
947 		.get_default_reg = sx9310_get_default_reg,
948 	},
949 
950 	.iio_channels = sx9310_channels,
951 	.num_iio_channels = ARRAY_SIZE(sx9310_channels),
952 	.iio_info =  {
953 		.read_raw = sx9310_read_raw,
954 		.read_avail = sx9310_read_avail,
955 		.read_event_value = sx9310_read_event_val,
956 		.write_event_value = sx9310_write_event_val,
957 		.write_raw = sx9310_write_raw,
958 		.read_event_config = sx_common_read_event_config,
959 		.write_event_config = sx_common_write_event_config,
960 	},
961 };
962 
sx9310_probe(struct i2c_client * client)963 static int sx9310_probe(struct i2c_client *client)
964 {
965 	return sx_common_probe(client, &sx9310_chip_info, &sx9310_regmap_config);
966 }
967 
sx9310_suspend(struct device * dev)968 static int sx9310_suspend(struct device *dev)
969 {
970 	struct sx_common_data *data = iio_priv(dev_get_drvdata(dev));
971 	u8 ctrl0;
972 	int ret;
973 
974 	disable_irq_nosync(data->client->irq);
975 
976 	mutex_lock(&data->mutex);
977 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0,
978 			  &data->suspend_ctrl);
979 	if (ret)
980 		goto out;
981 
982 	ctrl0 = data->suspend_ctrl & ~SX9310_REG_PROX_CTRL0_SENSOREN_MASK;
983 	ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);
984 	if (ret)
985 		goto out;
986 
987 	ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 0);
988 
989 out:
990 	mutex_unlock(&data->mutex);
991 	return ret;
992 }
993 
sx9310_resume(struct device * dev)994 static int sx9310_resume(struct device *dev)
995 {
996 	struct sx_common_data *data = iio_priv(dev_get_drvdata(dev));
997 	int ret;
998 
999 	mutex_lock(&data->mutex);
1000 	ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 1);
1001 	if (ret)
1002 		goto out;
1003 
1004 	ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0,
1005 			   data->suspend_ctrl);
1006 
1007 out:
1008 	mutex_unlock(&data->mutex);
1009 	if (ret)
1010 		return ret;
1011 
1012 	enable_irq(data->client->irq);
1013 	return 0;
1014 }
1015 
1016 static DEFINE_SIMPLE_DEV_PM_OPS(sx9310_pm_ops, sx9310_suspend, sx9310_resume);
1017 
1018 static const struct acpi_device_id sx9310_acpi_match[] = {
1019 	{ "STH9310", SX9310_WHOAMI_VALUE },
1020 	{ "STH9311", SX9311_WHOAMI_VALUE },
1021 	{}
1022 };
1023 MODULE_DEVICE_TABLE(acpi, sx9310_acpi_match);
1024 
1025 static const struct of_device_id sx9310_of_match[] = {
1026 	{ .compatible = "semtech,sx9310", (void *)SX9310_WHOAMI_VALUE },
1027 	{ .compatible = "semtech,sx9311", (void *)SX9311_WHOAMI_VALUE },
1028 	{}
1029 };
1030 MODULE_DEVICE_TABLE(of, sx9310_of_match);
1031 
1032 static const struct i2c_device_id sx9310_id[] = {
1033 	{ "sx9310", SX9310_WHOAMI_VALUE },
1034 	{ "sx9311", SX9311_WHOAMI_VALUE },
1035 	{}
1036 };
1037 MODULE_DEVICE_TABLE(i2c, sx9310_id);
1038 
1039 static struct i2c_driver sx9310_driver = {
1040 	.driver = {
1041 		.name	= "sx9310",
1042 		.acpi_match_table = sx9310_acpi_match,
1043 		.of_match_table = sx9310_of_match,
1044 		.pm = pm_sleep_ptr(&sx9310_pm_ops),
1045 
1046 		/*
1047 		 * Lots of i2c transfers in probe + over 200 ms waiting in
1048 		 * sx9310_init_compensation() mean a slow probe; prefer async
1049 		 * so we don't delay boot if we're builtin to the kernel.
1050 		 */
1051 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
1052 	},
1053 	.probe		= sx9310_probe,
1054 	.id_table	= sx9310_id,
1055 };
1056 module_i2c_driver(sx9310_driver);
1057 
1058 MODULE_AUTHOR("Gwendal Grignou <gwendal@chromium.org>");
1059 MODULE_AUTHOR("Daniel Campello <campello@chromium.org>");
1060 MODULE_DESCRIPTION("Driver for Semtech SX9310/SX9311 proximity sensor");
1061 MODULE_LICENSE("GPL v2");
1062 MODULE_IMPORT_NS(SEMTECH_PROX);
1063