1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * DRM driver for Solomon SSD130x OLED displays
4 *
5 * Copyright 2022 Red Hat Inc.
6 * Author: Javier Martinez Canillas <javierm@redhat.com>
7 *
8 * Based on drivers/video/fbdev/ssd1307fb.c
9 * Copyright 2012 Free Electrons
10 */
11
12 #include <linux/backlight.h>
13 #include <linux/bitfield.h>
14 #include <linux/bits.h>
15 #include <linux/delay.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/property.h>
18 #include <linux/pwm.h>
19 #include <linux/regulator/consumer.h>
20
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <drm/drm_damage_helper.h>
25 #include <drm/drm_edid.h>
26 #include <drm/drm_fbdev_generic.h>
27 #include <drm/drm_format_helper.h>
28 #include <drm/drm_framebuffer.h>
29 #include <drm/drm_gem_atomic_helper.h>
30 #include <drm/drm_gem_framebuffer_helper.h>
31 #include <drm/drm_gem_shmem_helper.h>
32 #include <drm/drm_managed.h>
33 #include <drm/drm_modes.h>
34 #include <drm/drm_rect.h>
35 #include <drm/drm_probe_helper.h>
36
37 #include "ssd130x.h"
38
39 #define DRIVER_NAME "ssd130x"
40 #define DRIVER_DESC "DRM driver for Solomon SSD130x OLED displays"
41 #define DRIVER_DATE "20220131"
42 #define DRIVER_MAJOR 1
43 #define DRIVER_MINOR 0
44
45 #define SSD130X_PAGE_COL_START_LOW 0x00
46 #define SSD130X_PAGE_COL_START_HIGH 0x10
47 #define SSD130X_SET_ADDRESS_MODE 0x20
48 #define SSD130X_SET_COL_RANGE 0x21
49 #define SSD130X_SET_PAGE_RANGE 0x22
50 #define SSD130X_CONTRAST 0x81
51 #define SSD130X_SET_LOOKUP_TABLE 0x91
52 #define SSD130X_CHARGE_PUMP 0x8d
53 #define SSD130X_SET_SEG_REMAP 0xa0
54 #define SSD130X_DISPLAY_OFF 0xae
55 #define SSD130X_SET_MULTIPLEX_RATIO 0xa8
56 #define SSD130X_DISPLAY_ON 0xaf
57 #define SSD130X_START_PAGE_ADDRESS 0xb0
58 #define SSD130X_SET_COM_SCAN_DIR 0xc0
59 #define SSD130X_SET_DISPLAY_OFFSET 0xd3
60 #define SSD130X_SET_CLOCK_FREQ 0xd5
61 #define SSD130X_SET_AREA_COLOR_MODE 0xd8
62 #define SSD130X_SET_PRECHARGE_PERIOD 0xd9
63 #define SSD130X_SET_COM_PINS_CONFIG 0xda
64 #define SSD130X_SET_VCOMH 0xdb
65
66 #define SSD130X_PAGE_COL_START_MASK GENMASK(3, 0)
67 #define SSD130X_PAGE_COL_START_HIGH_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val) >> 4)
68 #define SSD130X_PAGE_COL_START_LOW_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val))
69 #define SSD130X_START_PAGE_ADDRESS_MASK GENMASK(2, 0)
70 #define SSD130X_START_PAGE_ADDRESS_SET(val) FIELD_PREP(SSD130X_START_PAGE_ADDRESS_MASK, (val))
71 #define SSD130X_SET_SEG_REMAP_MASK GENMASK(0, 0)
72 #define SSD130X_SET_SEG_REMAP_SET(val) FIELD_PREP(SSD130X_SET_SEG_REMAP_MASK, (val))
73 #define SSD130X_SET_COM_SCAN_DIR_MASK GENMASK(3, 3)
74 #define SSD130X_SET_COM_SCAN_DIR_SET(val) FIELD_PREP(SSD130X_SET_COM_SCAN_DIR_MASK, (val))
75 #define SSD130X_SET_CLOCK_DIV_MASK GENMASK(3, 0)
76 #define SSD130X_SET_CLOCK_DIV_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_DIV_MASK, (val))
77 #define SSD130X_SET_CLOCK_FREQ_MASK GENMASK(7, 4)
78 #define SSD130X_SET_CLOCK_FREQ_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_FREQ_MASK, (val))
79 #define SSD130X_SET_PRECHARGE_PERIOD1_MASK GENMASK(3, 0)
80 #define SSD130X_SET_PRECHARGE_PERIOD1_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD1_MASK, (val))
81 #define SSD130X_SET_PRECHARGE_PERIOD2_MASK GENMASK(7, 4)
82 #define SSD130X_SET_PRECHARGE_PERIOD2_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD2_MASK, (val))
83 #define SSD130X_SET_COM_PINS_CONFIG1_MASK GENMASK(4, 4)
84 #define SSD130X_SET_COM_PINS_CONFIG1_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG1_MASK, (val))
85 #define SSD130X_SET_COM_PINS_CONFIG2_MASK GENMASK(5, 5)
86 #define SSD130X_SET_COM_PINS_CONFIG2_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG2_MASK, (val))
87
88 #define SSD130X_SET_ADDRESS_MODE_HORIZONTAL 0x00
89 #define SSD130X_SET_ADDRESS_MODE_VERTICAL 0x01
90 #define SSD130X_SET_ADDRESS_MODE_PAGE 0x02
91
92 #define SSD130X_SET_AREA_COLOR_MODE_ENABLE 0x1e
93 #define SSD130X_SET_AREA_COLOR_MODE_LOW_POWER 0x05
94
95 #define MAX_CONTRAST 255
96
97 const struct ssd130x_deviceinfo ssd130x_variants[] = {
98 [SH1106_ID] = {
99 .default_vcomh = 0x40,
100 .default_dclk_div = 1,
101 .default_dclk_frq = 5,
102 .default_width = 132,
103 .default_height = 64,
104 .page_mode_only = 1,
105 .page_height = 8,
106 },
107 [SSD1305_ID] = {
108 .default_vcomh = 0x34,
109 .default_dclk_div = 1,
110 .default_dclk_frq = 7,
111 .default_width = 132,
112 .default_height = 64,
113 .page_height = 8,
114 },
115 [SSD1306_ID] = {
116 .default_vcomh = 0x20,
117 .default_dclk_div = 1,
118 .default_dclk_frq = 8,
119 .need_chargepump = 1,
120 .default_width = 128,
121 .default_height = 64,
122 .page_height = 8,
123 },
124 [SSD1307_ID] = {
125 .default_vcomh = 0x20,
126 .default_dclk_div = 2,
127 .default_dclk_frq = 12,
128 .need_pwm = 1,
129 .default_width = 128,
130 .default_height = 39,
131 .page_height = 8,
132 },
133 [SSD1309_ID] = {
134 .default_vcomh = 0x34,
135 .default_dclk_div = 1,
136 .default_dclk_frq = 10,
137 .default_width = 128,
138 .default_height = 64,
139 .page_height = 8,
140 }
141 };
142 EXPORT_SYMBOL_NS_GPL(ssd130x_variants, DRM_SSD130X);
143
144 struct ssd130x_plane_state {
145 struct drm_shadow_plane_state base;
146 /* Intermediate buffer to convert pixels from XRGB8888 to HW format */
147 u8 *buffer;
148 /* Buffer to store pixels in HW format and written to the panel */
149 u8 *data_array;
150 };
151
to_ssd130x_plane_state(struct drm_plane_state * state)152 static inline struct ssd130x_plane_state *to_ssd130x_plane_state(struct drm_plane_state *state)
153 {
154 return container_of(state, struct ssd130x_plane_state, base.base);
155 }
156
drm_to_ssd130x(struct drm_device * drm)157 static inline struct ssd130x_device *drm_to_ssd130x(struct drm_device *drm)
158 {
159 return container_of(drm, struct ssd130x_device, drm);
160 }
161
162 /*
163 * Helper to write data (SSD130X_DATA) to the device.
164 */
ssd130x_write_data(struct ssd130x_device * ssd130x,u8 * values,int count)165 static int ssd130x_write_data(struct ssd130x_device *ssd130x, u8 *values, int count)
166 {
167 return regmap_bulk_write(ssd130x->regmap, SSD130X_DATA, values, count);
168 }
169
170 /*
171 * Helper to write command (SSD130X_COMMAND). The fist variadic argument
172 * is the command to write and the following are the command options.
173 *
174 * Note that the ssd130x protocol requires each command and option to be
175 * written as a SSD130X_COMMAND device register value. That is why a call
176 * to regmap_write(..., SSD130X_COMMAND, ...) is done for each argument.
177 */
ssd130x_write_cmd(struct ssd130x_device * ssd130x,int count,...)178 static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count,
179 /* u8 cmd, u8 option, ... */...)
180 {
181 va_list ap;
182 u8 value;
183 int ret;
184
185 va_start(ap, count);
186
187 do {
188 value = va_arg(ap, int);
189 ret = regmap_write(ssd130x->regmap, SSD130X_COMMAND, value);
190 if (ret)
191 goto out_end;
192 } while (--count);
193
194 out_end:
195 va_end(ap);
196
197 return ret;
198 }
199
200 /* Set address range for horizontal/vertical addressing modes */
ssd130x_set_col_range(struct ssd130x_device * ssd130x,u8 col_start,u8 cols)201 static int ssd130x_set_col_range(struct ssd130x_device *ssd130x,
202 u8 col_start, u8 cols)
203 {
204 u8 col_end = col_start + cols - 1;
205 int ret;
206
207 if (col_start == ssd130x->col_start && col_end == ssd130x->col_end)
208 return 0;
209
210 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_COL_RANGE, col_start, col_end);
211 if (ret < 0)
212 return ret;
213
214 ssd130x->col_start = col_start;
215 ssd130x->col_end = col_end;
216 return 0;
217 }
218
ssd130x_set_page_range(struct ssd130x_device * ssd130x,u8 page_start,u8 pages)219 static int ssd130x_set_page_range(struct ssd130x_device *ssd130x,
220 u8 page_start, u8 pages)
221 {
222 u8 page_end = page_start + pages - 1;
223 int ret;
224
225 if (page_start == ssd130x->page_start && page_end == ssd130x->page_end)
226 return 0;
227
228 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_PAGE_RANGE, page_start, page_end);
229 if (ret < 0)
230 return ret;
231
232 ssd130x->page_start = page_start;
233 ssd130x->page_end = page_end;
234 return 0;
235 }
236
237 /* Set page and column start address for page addressing mode */
ssd130x_set_page_pos(struct ssd130x_device * ssd130x,u8 page_start,u8 col_start)238 static int ssd130x_set_page_pos(struct ssd130x_device *ssd130x,
239 u8 page_start, u8 col_start)
240 {
241 int ret;
242 u32 page, col_low, col_high;
243
244 page = SSD130X_START_PAGE_ADDRESS |
245 SSD130X_START_PAGE_ADDRESS_SET(page_start);
246 col_low = SSD130X_PAGE_COL_START_LOW |
247 SSD130X_PAGE_COL_START_LOW_SET(col_start);
248 col_high = SSD130X_PAGE_COL_START_HIGH |
249 SSD130X_PAGE_COL_START_HIGH_SET(col_start);
250 ret = ssd130x_write_cmd(ssd130x, 3, page, col_low, col_high);
251 if (ret < 0)
252 return ret;
253
254 return 0;
255 }
256
ssd130x_pwm_enable(struct ssd130x_device * ssd130x)257 static int ssd130x_pwm_enable(struct ssd130x_device *ssd130x)
258 {
259 struct device *dev = ssd130x->dev;
260 struct pwm_state pwmstate;
261
262 ssd130x->pwm = pwm_get(dev, NULL);
263 if (IS_ERR(ssd130x->pwm)) {
264 dev_err(dev, "Could not get PWM from firmware description!\n");
265 return PTR_ERR(ssd130x->pwm);
266 }
267
268 pwm_init_state(ssd130x->pwm, &pwmstate);
269 pwm_set_relative_duty_cycle(&pwmstate, 50, 100);
270 pwm_apply_might_sleep(ssd130x->pwm, &pwmstate);
271
272 /* Enable the PWM */
273 pwm_enable(ssd130x->pwm);
274
275 dev_dbg(dev, "Using PWM%d with a %lluns period.\n",
276 ssd130x->pwm->pwm, pwm_get_period(ssd130x->pwm));
277
278 return 0;
279 }
280
ssd130x_reset(struct ssd130x_device * ssd130x)281 static void ssd130x_reset(struct ssd130x_device *ssd130x)
282 {
283 if (!ssd130x->reset)
284 return;
285
286 /* Reset the screen */
287 gpiod_set_value_cansleep(ssd130x->reset, 1);
288 udelay(4);
289 gpiod_set_value_cansleep(ssd130x->reset, 0);
290 udelay(4);
291 }
292
ssd130x_power_on(struct ssd130x_device * ssd130x)293 static int ssd130x_power_on(struct ssd130x_device *ssd130x)
294 {
295 struct device *dev = ssd130x->dev;
296 int ret;
297
298 ssd130x_reset(ssd130x);
299
300 ret = regulator_enable(ssd130x->vcc_reg);
301 if (ret) {
302 dev_err(dev, "Failed to enable VCC: %d\n", ret);
303 return ret;
304 }
305
306 if (ssd130x->device_info->need_pwm) {
307 ret = ssd130x_pwm_enable(ssd130x);
308 if (ret) {
309 dev_err(dev, "Failed to enable PWM: %d\n", ret);
310 regulator_disable(ssd130x->vcc_reg);
311 return ret;
312 }
313 }
314
315 return 0;
316 }
317
ssd130x_power_off(struct ssd130x_device * ssd130x)318 static void ssd130x_power_off(struct ssd130x_device *ssd130x)
319 {
320 pwm_disable(ssd130x->pwm);
321 pwm_put(ssd130x->pwm);
322
323 regulator_disable(ssd130x->vcc_reg);
324 }
325
ssd130x_init(struct ssd130x_device * ssd130x)326 static int ssd130x_init(struct ssd130x_device *ssd130x)
327 {
328 u32 precharge, dclk, com_invdir, compins, chargepump, seg_remap;
329 bool scan_mode;
330 int ret;
331
332 /* Set initial contrast */
333 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CONTRAST, ssd130x->contrast);
334 if (ret < 0)
335 return ret;
336
337 /* Set segment re-map */
338 seg_remap = (SSD130X_SET_SEG_REMAP |
339 SSD130X_SET_SEG_REMAP_SET(ssd130x->seg_remap));
340 ret = ssd130x_write_cmd(ssd130x, 1, seg_remap);
341 if (ret < 0)
342 return ret;
343
344 /* Set COM direction */
345 com_invdir = (SSD130X_SET_COM_SCAN_DIR |
346 SSD130X_SET_COM_SCAN_DIR_SET(ssd130x->com_invdir));
347 ret = ssd130x_write_cmd(ssd130x, 1, com_invdir);
348 if (ret < 0)
349 return ret;
350
351 /* Set multiplex ratio value */
352 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_MULTIPLEX_RATIO, ssd130x->height - 1);
353 if (ret < 0)
354 return ret;
355
356 /* set display offset value */
357 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_DISPLAY_OFFSET, ssd130x->com_offset);
358 if (ret < 0)
359 return ret;
360
361 /* Set clock frequency */
362 dclk = (SSD130X_SET_CLOCK_DIV_SET(ssd130x->dclk_div - 1) |
363 SSD130X_SET_CLOCK_FREQ_SET(ssd130x->dclk_frq));
364 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_CLOCK_FREQ, dclk);
365 if (ret < 0)
366 return ret;
367
368 /* Set Area Color Mode ON/OFF & Low Power Display Mode */
369 if (ssd130x->area_color_enable || ssd130x->low_power) {
370 u32 mode = 0;
371
372 if (ssd130x->area_color_enable)
373 mode |= SSD130X_SET_AREA_COLOR_MODE_ENABLE;
374
375 if (ssd130x->low_power)
376 mode |= SSD130X_SET_AREA_COLOR_MODE_LOW_POWER;
377
378 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_AREA_COLOR_MODE, mode);
379 if (ret < 0)
380 return ret;
381 }
382
383 /* Set precharge period in number of ticks from the internal clock */
384 precharge = (SSD130X_SET_PRECHARGE_PERIOD1_SET(ssd130x->prechargep1) |
385 SSD130X_SET_PRECHARGE_PERIOD2_SET(ssd130x->prechargep2));
386 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_PRECHARGE_PERIOD, precharge);
387 if (ret < 0)
388 return ret;
389
390 /* Set COM pins configuration */
391 compins = BIT(1);
392 /*
393 * The COM scan mode field values are the inverse of the boolean DT
394 * property "solomon,com-seq". The value 0b means scan from COM0 to
395 * COM[N - 1] while 1b means scan from COM[N - 1] to COM0.
396 */
397 scan_mode = !ssd130x->com_seq;
398 compins |= (SSD130X_SET_COM_PINS_CONFIG1_SET(scan_mode) |
399 SSD130X_SET_COM_PINS_CONFIG2_SET(ssd130x->com_lrremap));
400 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_COM_PINS_CONFIG, compins);
401 if (ret < 0)
402 return ret;
403
404 /* Set VCOMH */
405 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_VCOMH, ssd130x->vcomh);
406 if (ret < 0)
407 return ret;
408
409 /* Turn on the DC-DC Charge Pump */
410 chargepump = BIT(4);
411
412 if (ssd130x->device_info->need_chargepump)
413 chargepump |= BIT(2);
414
415 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CHARGE_PUMP, chargepump);
416 if (ret < 0)
417 return ret;
418
419 /* Set lookup table */
420 if (ssd130x->lookup_table_set) {
421 int i;
422
423 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_SET_LOOKUP_TABLE);
424 if (ret < 0)
425 return ret;
426
427 for (i = 0; i < ARRAY_SIZE(ssd130x->lookup_table); i++) {
428 u8 val = ssd130x->lookup_table[i];
429
430 if (val < 31 || val > 63)
431 dev_warn(ssd130x->dev,
432 "lookup table index %d value out of range 31 <= %d <= 63\n",
433 i, val);
434 ret = ssd130x_write_cmd(ssd130x, 1, val);
435 if (ret < 0)
436 return ret;
437 }
438 }
439
440 /* Switch to page addressing mode */
441 if (ssd130x->page_address_mode)
442 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE,
443 SSD130X_SET_ADDRESS_MODE_PAGE);
444
445 /* Switch to horizontal addressing mode */
446 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE,
447 SSD130X_SET_ADDRESS_MODE_HORIZONTAL);
448 }
449
ssd130x_update_rect(struct ssd130x_device * ssd130x,struct ssd130x_plane_state * ssd130x_state,struct drm_rect * rect)450 static int ssd130x_update_rect(struct ssd130x_device *ssd130x,
451 struct ssd130x_plane_state *ssd130x_state,
452 struct drm_rect *rect)
453 {
454 unsigned int x = rect->x1;
455 unsigned int y = rect->y1;
456 u8 *buf = ssd130x_state->buffer;
457 u8 *data_array = ssd130x_state->data_array;
458 unsigned int width = drm_rect_width(rect);
459 unsigned int height = drm_rect_height(rect);
460 unsigned int line_length = DIV_ROUND_UP(width, 8);
461 unsigned int page_height = ssd130x->device_info->page_height;
462 unsigned int pages = DIV_ROUND_UP(height, page_height);
463 struct drm_device *drm = &ssd130x->drm;
464 u32 array_idx = 0;
465 int ret, i, j, k;
466
467 drm_WARN_ONCE(drm, y % 8 != 0, "y must be aligned to screen page\n");
468
469 /*
470 * The screen is divided in pages, each having a height of 8
471 * pixels, and the width of the screen. When sending a byte of
472 * data to the controller, it gives the 8 bits for the current
473 * column. I.e, the first byte are the 8 bits of the first
474 * column, then the 8 bits for the second column, etc.
475 *
476 *
477 * Representation of the screen, assuming it is 5 bits
478 * wide. Each letter-number combination is a bit that controls
479 * one pixel.
480 *
481 * A0 A1 A2 A3 A4
482 * B0 B1 B2 B3 B4
483 * C0 C1 C2 C3 C4
484 * D0 D1 D2 D3 D4
485 * E0 E1 E2 E3 E4
486 * F0 F1 F2 F3 F4
487 * G0 G1 G2 G3 G4
488 * H0 H1 H2 H3 H4
489 *
490 * If you want to update this screen, you need to send 5 bytes:
491 * (1) A0 B0 C0 D0 E0 F0 G0 H0
492 * (2) A1 B1 C1 D1 E1 F1 G1 H1
493 * (3) A2 B2 C2 D2 E2 F2 G2 H2
494 * (4) A3 B3 C3 D3 E3 F3 G3 H3
495 * (5) A4 B4 C4 D4 E4 F4 G4 H4
496 */
497
498 if (!ssd130x->page_address_mode) {
499 /* Set address range for horizontal addressing mode */
500 ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset + x, width);
501 if (ret < 0)
502 return ret;
503
504 ret = ssd130x_set_page_range(ssd130x, ssd130x->page_offset + y / 8, pages);
505 if (ret < 0)
506 return ret;
507 }
508
509 for (i = 0; i < pages; i++) {
510 int m = 8;
511
512 /* Last page may be partial */
513 if (8 * (y / 8 + i + 1) > ssd130x->height)
514 m = ssd130x->height % 8;
515 for (j = 0; j < width; j++) {
516 u8 data = 0;
517
518 for (k = 0; k < m; k++) {
519 u8 byte = buf[(8 * i + k) * line_length + j / 8];
520 u8 bit = (byte >> (j % 8)) & 1;
521
522 data |= bit << k;
523 }
524 data_array[array_idx++] = data;
525 }
526
527 /*
528 * In page addressing mode, the start address needs to be reset,
529 * and each page then needs to be written out separately.
530 */
531 if (ssd130x->page_address_mode) {
532 ret = ssd130x_set_page_pos(ssd130x,
533 ssd130x->page_offset + i,
534 ssd130x->col_offset + x);
535 if (ret < 0)
536 return ret;
537
538 ret = ssd130x_write_data(ssd130x, data_array, width);
539 if (ret < 0)
540 return ret;
541
542 array_idx = 0;
543 }
544 }
545
546 /* Write out update in one go if we aren't using page addressing mode */
547 if (!ssd130x->page_address_mode)
548 ret = ssd130x_write_data(ssd130x, data_array, width * pages);
549
550 return ret;
551 }
552
ssd130x_clear_screen(struct ssd130x_device * ssd130x,struct ssd130x_plane_state * ssd130x_state)553 static void ssd130x_clear_screen(struct ssd130x_device *ssd130x,
554 struct ssd130x_plane_state *ssd130x_state)
555 {
556 unsigned int page_height = ssd130x->device_info->page_height;
557 unsigned int pages = DIV_ROUND_UP(ssd130x->height, page_height);
558 u8 *data_array = ssd130x_state->data_array;
559 unsigned int width = ssd130x->width;
560 int ret, i;
561
562 if (!ssd130x->page_address_mode) {
563 memset(data_array, 0, width * pages);
564
565 /* Set address range for horizontal addressing mode */
566 ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset, width);
567 if (ret < 0)
568 return;
569
570 ret = ssd130x_set_page_range(ssd130x, ssd130x->page_offset, pages);
571 if (ret < 0)
572 return;
573
574 /* Write out update in one go if we aren't using page addressing mode */
575 ssd130x_write_data(ssd130x, data_array, width * pages);
576 } else {
577 /*
578 * In page addressing mode, the start address needs to be reset,
579 * and each page then needs to be written out separately.
580 */
581 memset(data_array, 0, width);
582
583 for (i = 0; i < pages; i++) {
584 ret = ssd130x_set_page_pos(ssd130x,
585 ssd130x->page_offset + i,
586 ssd130x->col_offset);
587 if (ret < 0)
588 return;
589
590 ret = ssd130x_write_data(ssd130x, data_array, width);
591 if (ret < 0)
592 return;
593 }
594 }
595 }
596
ssd130x_fb_blit_rect(struct drm_plane_state * state,const struct iosys_map * vmap,struct drm_rect * rect)597 static int ssd130x_fb_blit_rect(struct drm_plane_state *state,
598 const struct iosys_map *vmap,
599 struct drm_rect *rect)
600 {
601 struct drm_framebuffer *fb = state->fb;
602 struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev);
603 unsigned int page_height = ssd130x->device_info->page_height;
604 struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(state);
605 u8 *buf = ssd130x_state->buffer;
606 struct iosys_map dst;
607 unsigned int dst_pitch;
608 int ret = 0;
609
610 /* Align y to display page boundaries */
611 rect->y1 = round_down(rect->y1, page_height);
612 rect->y2 = min_t(unsigned int, round_up(rect->y2, page_height), ssd130x->height);
613
614 dst_pitch = DIV_ROUND_UP(drm_rect_width(rect), 8);
615
616 ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE);
617 if (ret)
618 return ret;
619
620 iosys_map_set_vaddr(&dst, buf);
621 drm_fb_xrgb8888_to_mono(&dst, &dst_pitch, vmap, fb, rect);
622
623 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE);
624
625 ssd130x_update_rect(ssd130x, ssd130x_state, rect);
626
627 return ret;
628 }
629
ssd130x_primary_plane_helper_atomic_check(struct drm_plane * plane,struct drm_atomic_state * state)630 static int ssd130x_primary_plane_helper_atomic_check(struct drm_plane *plane,
631 struct drm_atomic_state *state)
632 {
633 struct drm_device *drm = plane->dev;
634 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
635 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
636 struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(plane_state);
637 unsigned int page_height = ssd130x->device_info->page_height;
638 unsigned int pages = DIV_ROUND_UP(ssd130x->height, page_height);
639 const struct drm_format_info *fi;
640 unsigned int pitch;
641 int ret;
642
643 ret = drm_plane_helper_atomic_check(plane, state);
644 if (ret)
645 return ret;
646
647 fi = drm_format_info(DRM_FORMAT_R1);
648 if (!fi)
649 return -EINVAL;
650
651 pitch = drm_format_info_min_pitch(fi, 0, ssd130x->width);
652
653 ssd130x_state->buffer = kcalloc(pitch, ssd130x->height, GFP_KERNEL);
654 if (!ssd130x_state->buffer)
655 return -ENOMEM;
656
657 ssd130x_state->data_array = kcalloc(ssd130x->width, pages, GFP_KERNEL);
658 if (!ssd130x_state->data_array) {
659 kfree(ssd130x_state->buffer);
660 /* Set to prevent a double free in .atomic_destroy_state() */
661 ssd130x_state->buffer = NULL;
662 return -ENOMEM;
663 }
664
665 return 0;
666 }
667
ssd130x_primary_plane_helper_atomic_update(struct drm_plane * plane,struct drm_atomic_state * state)668 static void ssd130x_primary_plane_helper_atomic_update(struct drm_plane *plane,
669 struct drm_atomic_state *state)
670 {
671 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
672 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
673 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
674 struct drm_atomic_helper_damage_iter iter;
675 struct drm_device *drm = plane->dev;
676 struct drm_rect dst_clip;
677 struct drm_rect damage;
678 int idx;
679
680 if (!drm_dev_enter(drm, &idx))
681 return;
682
683 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state);
684 drm_atomic_for_each_plane_damage(&iter, &damage) {
685 dst_clip = plane_state->dst;
686
687 if (!drm_rect_intersect(&dst_clip, &damage))
688 continue;
689
690 ssd130x_fb_blit_rect(plane_state, &shadow_plane_state->data[0], &dst_clip);
691 }
692
693 drm_dev_exit(idx);
694 }
695
ssd130x_primary_plane_helper_atomic_disable(struct drm_plane * plane,struct drm_atomic_state * state)696 static void ssd130x_primary_plane_helper_atomic_disable(struct drm_plane *plane,
697 struct drm_atomic_state *state)
698 {
699 struct drm_device *drm = plane->dev;
700 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
701 struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(plane->state);
702 int idx;
703
704 if (!drm_dev_enter(drm, &idx))
705 return;
706
707 ssd130x_clear_screen(ssd130x, ssd130x_state);
708
709 drm_dev_exit(idx);
710 }
711
712 /* Called during init to allocate the plane's atomic state. */
ssd130x_primary_plane_reset(struct drm_plane * plane)713 static void ssd130x_primary_plane_reset(struct drm_plane *plane)
714 {
715 struct ssd130x_plane_state *ssd130x_state;
716
717 WARN_ON(plane->state);
718
719 ssd130x_state = kzalloc(sizeof(*ssd130x_state), GFP_KERNEL);
720 if (!ssd130x_state)
721 return;
722
723 __drm_gem_reset_shadow_plane(plane, &ssd130x_state->base);
724 }
725
ssd130x_primary_plane_duplicate_state(struct drm_plane * plane)726 static struct drm_plane_state *ssd130x_primary_plane_duplicate_state(struct drm_plane *plane)
727 {
728 struct drm_shadow_plane_state *new_shadow_plane_state;
729 struct ssd130x_plane_state *old_ssd130x_state;
730 struct ssd130x_plane_state *ssd130x_state;
731
732 if (WARN_ON(!plane->state))
733 return NULL;
734
735 old_ssd130x_state = to_ssd130x_plane_state(plane->state);
736 ssd130x_state = kmemdup(old_ssd130x_state, sizeof(*ssd130x_state), GFP_KERNEL);
737 if (!ssd130x_state)
738 return NULL;
739
740 /* The buffers are not duplicated and are allocated in .atomic_check */
741 ssd130x_state->buffer = NULL;
742 ssd130x_state->data_array = NULL;
743
744 new_shadow_plane_state = &ssd130x_state->base;
745
746 __drm_gem_duplicate_shadow_plane_state(plane, new_shadow_plane_state);
747
748 return &new_shadow_plane_state->base;
749 }
750
ssd130x_primary_plane_destroy_state(struct drm_plane * plane,struct drm_plane_state * state)751 static void ssd130x_primary_plane_destroy_state(struct drm_plane *plane,
752 struct drm_plane_state *state)
753 {
754 struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(state);
755
756 kfree(ssd130x_state->data_array);
757 kfree(ssd130x_state->buffer);
758
759 __drm_gem_destroy_shadow_plane_state(&ssd130x_state->base);
760
761 kfree(ssd130x_state);
762 }
763
764 static const struct drm_plane_helper_funcs ssd130x_primary_plane_helper_funcs = {
765 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
766 .atomic_check = ssd130x_primary_plane_helper_atomic_check,
767 .atomic_update = ssd130x_primary_plane_helper_atomic_update,
768 .atomic_disable = ssd130x_primary_plane_helper_atomic_disable,
769 };
770
771 static const struct drm_plane_funcs ssd130x_primary_plane_funcs = {
772 .update_plane = drm_atomic_helper_update_plane,
773 .disable_plane = drm_atomic_helper_disable_plane,
774 .reset = ssd130x_primary_plane_reset,
775 .atomic_duplicate_state = ssd130x_primary_plane_duplicate_state,
776 .atomic_destroy_state = ssd130x_primary_plane_destroy_state,
777 .destroy = drm_plane_cleanup,
778 };
779
ssd130x_crtc_helper_mode_valid(struct drm_crtc * crtc,const struct drm_display_mode * mode)780 static enum drm_mode_status ssd130x_crtc_helper_mode_valid(struct drm_crtc *crtc,
781 const struct drm_display_mode *mode)
782 {
783 struct ssd130x_device *ssd130x = drm_to_ssd130x(crtc->dev);
784
785 if (mode->hdisplay != ssd130x->mode.hdisplay &&
786 mode->vdisplay != ssd130x->mode.vdisplay)
787 return MODE_ONE_SIZE;
788 else if (mode->hdisplay != ssd130x->mode.hdisplay)
789 return MODE_ONE_WIDTH;
790 else if (mode->vdisplay != ssd130x->mode.vdisplay)
791 return MODE_ONE_HEIGHT;
792
793 return MODE_OK;
794 }
795
796 /*
797 * The CRTC is always enabled. Screen updates are performed by
798 * the primary plane's atomic_update function. Disabling clears
799 * the screen in the primary plane's atomic_disable function.
800 */
801 static const struct drm_crtc_helper_funcs ssd130x_crtc_helper_funcs = {
802 .mode_valid = ssd130x_crtc_helper_mode_valid,
803 .atomic_check = drm_crtc_helper_atomic_check,
804 };
805
806 static const struct drm_crtc_funcs ssd130x_crtc_funcs = {
807 .reset = drm_atomic_helper_crtc_reset,
808 .destroy = drm_crtc_cleanup,
809 .set_config = drm_atomic_helper_set_config,
810 .page_flip = drm_atomic_helper_page_flip,
811 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
812 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
813 };
814
ssd130x_encoder_helper_atomic_enable(struct drm_encoder * encoder,struct drm_atomic_state * state)815 static void ssd130x_encoder_helper_atomic_enable(struct drm_encoder *encoder,
816 struct drm_atomic_state *state)
817 {
818 struct drm_device *drm = encoder->dev;
819 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
820 int ret;
821
822 ret = ssd130x_power_on(ssd130x);
823 if (ret)
824 return;
825
826 ret = ssd130x_init(ssd130x);
827 if (ret)
828 goto power_off;
829
830 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_ON);
831
832 backlight_enable(ssd130x->bl_dev);
833
834 return;
835
836 power_off:
837 ssd130x_power_off(ssd130x);
838 return;
839 }
840
ssd130x_encoder_helper_atomic_disable(struct drm_encoder * encoder,struct drm_atomic_state * state)841 static void ssd130x_encoder_helper_atomic_disable(struct drm_encoder *encoder,
842 struct drm_atomic_state *state)
843 {
844 struct drm_device *drm = encoder->dev;
845 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
846
847 backlight_disable(ssd130x->bl_dev);
848
849 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_OFF);
850
851 ssd130x_power_off(ssd130x);
852 }
853
854 static const struct drm_encoder_helper_funcs ssd130x_encoder_helper_funcs = {
855 .atomic_enable = ssd130x_encoder_helper_atomic_enable,
856 .atomic_disable = ssd130x_encoder_helper_atomic_disable,
857 };
858
859 static const struct drm_encoder_funcs ssd130x_encoder_funcs = {
860 .destroy = drm_encoder_cleanup,
861 };
862
ssd130x_connector_helper_get_modes(struct drm_connector * connector)863 static int ssd130x_connector_helper_get_modes(struct drm_connector *connector)
864 {
865 struct ssd130x_device *ssd130x = drm_to_ssd130x(connector->dev);
866 struct drm_display_mode *mode;
867 struct device *dev = ssd130x->dev;
868
869 mode = drm_mode_duplicate(connector->dev, &ssd130x->mode);
870 if (!mode) {
871 dev_err(dev, "Failed to duplicated mode\n");
872 return 0;
873 }
874
875 drm_mode_probed_add(connector, mode);
876 drm_set_preferred_mode(connector, mode->hdisplay, mode->vdisplay);
877
878 /* There is only a single mode */
879 return 1;
880 }
881
882 static const struct drm_connector_helper_funcs ssd130x_connector_helper_funcs = {
883 .get_modes = ssd130x_connector_helper_get_modes,
884 };
885
886 static const struct drm_connector_funcs ssd130x_connector_funcs = {
887 .reset = drm_atomic_helper_connector_reset,
888 .fill_modes = drm_helper_probe_single_connector_modes,
889 .destroy = drm_connector_cleanup,
890 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
891 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
892 };
893
894 static const struct drm_mode_config_funcs ssd130x_mode_config_funcs = {
895 .fb_create = drm_gem_fb_create_with_dirty,
896 .atomic_check = drm_atomic_helper_check,
897 .atomic_commit = drm_atomic_helper_commit,
898 };
899
900 static const uint32_t ssd130x_formats[] = {
901 DRM_FORMAT_XRGB8888,
902 };
903
904 DEFINE_DRM_GEM_FOPS(ssd130x_fops);
905
906 static const struct drm_driver ssd130x_drm_driver = {
907 DRM_GEM_SHMEM_DRIVER_OPS,
908 .name = DRIVER_NAME,
909 .desc = DRIVER_DESC,
910 .date = DRIVER_DATE,
911 .major = DRIVER_MAJOR,
912 .minor = DRIVER_MINOR,
913 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET,
914 .fops = &ssd130x_fops,
915 };
916
ssd130x_update_bl(struct backlight_device * bdev)917 static int ssd130x_update_bl(struct backlight_device *bdev)
918 {
919 struct ssd130x_device *ssd130x = bl_get_data(bdev);
920 int brightness = backlight_get_brightness(bdev);
921 int ret;
922
923 ssd130x->contrast = brightness;
924
925 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_CONTRAST);
926 if (ret < 0)
927 return ret;
928
929 ret = ssd130x_write_cmd(ssd130x, 1, ssd130x->contrast);
930 if (ret < 0)
931 return ret;
932
933 return 0;
934 }
935
936 static const struct backlight_ops ssd130xfb_bl_ops = {
937 .update_status = ssd130x_update_bl,
938 };
939
ssd130x_parse_properties(struct ssd130x_device * ssd130x)940 static void ssd130x_parse_properties(struct ssd130x_device *ssd130x)
941 {
942 struct device *dev = ssd130x->dev;
943
944 if (device_property_read_u32(dev, "solomon,width", &ssd130x->width))
945 ssd130x->width = ssd130x->device_info->default_width;
946
947 if (device_property_read_u32(dev, "solomon,height", &ssd130x->height))
948 ssd130x->height = ssd130x->device_info->default_height;
949
950 if (device_property_read_u32(dev, "solomon,page-offset", &ssd130x->page_offset))
951 ssd130x->page_offset = 1;
952
953 if (device_property_read_u32(dev, "solomon,col-offset", &ssd130x->col_offset))
954 ssd130x->col_offset = 0;
955
956 if (device_property_read_u32(dev, "solomon,com-offset", &ssd130x->com_offset))
957 ssd130x->com_offset = 0;
958
959 if (device_property_read_u32(dev, "solomon,prechargep1", &ssd130x->prechargep1))
960 ssd130x->prechargep1 = 2;
961
962 if (device_property_read_u32(dev, "solomon,prechargep2", &ssd130x->prechargep2))
963 ssd130x->prechargep2 = 2;
964
965 if (!device_property_read_u8_array(dev, "solomon,lookup-table",
966 ssd130x->lookup_table,
967 ARRAY_SIZE(ssd130x->lookup_table)))
968 ssd130x->lookup_table_set = 1;
969
970 ssd130x->seg_remap = !device_property_read_bool(dev, "solomon,segment-no-remap");
971 ssd130x->com_seq = device_property_read_bool(dev, "solomon,com-seq");
972 ssd130x->com_lrremap = device_property_read_bool(dev, "solomon,com-lrremap");
973 ssd130x->com_invdir = device_property_read_bool(dev, "solomon,com-invdir");
974 ssd130x->area_color_enable =
975 device_property_read_bool(dev, "solomon,area-color-enable");
976 ssd130x->low_power = device_property_read_bool(dev, "solomon,low-power");
977
978 ssd130x->contrast = 127;
979 ssd130x->vcomh = ssd130x->device_info->default_vcomh;
980
981 /* Setup display timing */
982 if (device_property_read_u32(dev, "solomon,dclk-div", &ssd130x->dclk_div))
983 ssd130x->dclk_div = ssd130x->device_info->default_dclk_div;
984 if (device_property_read_u32(dev, "solomon,dclk-frq", &ssd130x->dclk_frq))
985 ssd130x->dclk_frq = ssd130x->device_info->default_dclk_frq;
986 }
987
ssd130x_init_modeset(struct ssd130x_device * ssd130x)988 static int ssd130x_init_modeset(struct ssd130x_device *ssd130x)
989 {
990 struct drm_display_mode *mode = &ssd130x->mode;
991 struct device *dev = ssd130x->dev;
992 struct drm_device *drm = &ssd130x->drm;
993 unsigned long max_width, max_height;
994 struct drm_plane *primary_plane;
995 struct drm_crtc *crtc;
996 struct drm_encoder *encoder;
997 struct drm_connector *connector;
998 int ret;
999
1000 /*
1001 * Modesetting
1002 */
1003
1004 ret = drmm_mode_config_init(drm);
1005 if (ret) {
1006 dev_err(dev, "DRM mode config init failed: %d\n", ret);
1007 return ret;
1008 }
1009
1010 mode->type = DRM_MODE_TYPE_DRIVER;
1011 mode->clock = 1;
1012 mode->hdisplay = mode->htotal = ssd130x->width;
1013 mode->hsync_start = mode->hsync_end = ssd130x->width;
1014 mode->vdisplay = mode->vtotal = ssd130x->height;
1015 mode->vsync_start = mode->vsync_end = ssd130x->height;
1016 mode->width_mm = 27;
1017 mode->height_mm = 27;
1018
1019 max_width = max_t(unsigned long, mode->hdisplay, DRM_SHADOW_PLANE_MAX_WIDTH);
1020 max_height = max_t(unsigned long, mode->vdisplay, DRM_SHADOW_PLANE_MAX_HEIGHT);
1021
1022 drm->mode_config.min_width = mode->hdisplay;
1023 drm->mode_config.max_width = max_width;
1024 drm->mode_config.min_height = mode->vdisplay;
1025 drm->mode_config.max_height = max_height;
1026 drm->mode_config.preferred_depth = 24;
1027 drm->mode_config.funcs = &ssd130x_mode_config_funcs;
1028
1029 /* Primary plane */
1030
1031 primary_plane = &ssd130x->primary_plane;
1032 ret = drm_universal_plane_init(drm, primary_plane, 0, &ssd130x_primary_plane_funcs,
1033 ssd130x_formats, ARRAY_SIZE(ssd130x_formats),
1034 NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
1035 if (ret) {
1036 dev_err(dev, "DRM primary plane init failed: %d\n", ret);
1037 return ret;
1038 }
1039
1040 drm_plane_helper_add(primary_plane, &ssd130x_primary_plane_helper_funcs);
1041
1042 drm_plane_enable_fb_damage_clips(primary_plane);
1043
1044 /* CRTC */
1045
1046 crtc = &ssd130x->crtc;
1047 ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
1048 &ssd130x_crtc_funcs, NULL);
1049 if (ret) {
1050 dev_err(dev, "DRM crtc init failed: %d\n", ret);
1051 return ret;
1052 }
1053
1054 drm_crtc_helper_add(crtc, &ssd130x_crtc_helper_funcs);
1055
1056 /* Encoder */
1057
1058 encoder = &ssd130x->encoder;
1059 ret = drm_encoder_init(drm, encoder, &ssd130x_encoder_funcs,
1060 DRM_MODE_ENCODER_NONE, NULL);
1061 if (ret) {
1062 dev_err(dev, "DRM encoder init failed: %d\n", ret);
1063 return ret;
1064 }
1065
1066 drm_encoder_helper_add(encoder, &ssd130x_encoder_helper_funcs);
1067
1068 encoder->possible_crtcs = drm_crtc_mask(crtc);
1069
1070 /* Connector */
1071
1072 connector = &ssd130x->connector;
1073 ret = drm_connector_init(drm, connector, &ssd130x_connector_funcs,
1074 DRM_MODE_CONNECTOR_Unknown);
1075 if (ret) {
1076 dev_err(dev, "DRM connector init failed: %d\n", ret);
1077 return ret;
1078 }
1079
1080 drm_connector_helper_add(connector, &ssd130x_connector_helper_funcs);
1081
1082 ret = drm_connector_attach_encoder(connector, encoder);
1083 if (ret) {
1084 dev_err(dev, "DRM attach connector to encoder failed: %d\n", ret);
1085 return ret;
1086 }
1087
1088 drm_mode_config_reset(drm);
1089
1090 return 0;
1091 }
1092
ssd130x_get_resources(struct ssd130x_device * ssd130x)1093 static int ssd130x_get_resources(struct ssd130x_device *ssd130x)
1094 {
1095 struct device *dev = ssd130x->dev;
1096
1097 ssd130x->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
1098 if (IS_ERR(ssd130x->reset))
1099 return dev_err_probe(dev, PTR_ERR(ssd130x->reset),
1100 "Failed to get reset gpio\n");
1101
1102 ssd130x->vcc_reg = devm_regulator_get(dev, "vcc");
1103 if (IS_ERR(ssd130x->vcc_reg))
1104 return dev_err_probe(dev, PTR_ERR(ssd130x->vcc_reg),
1105 "Failed to get VCC regulator\n");
1106
1107 return 0;
1108 }
1109
ssd130x_probe(struct device * dev,struct regmap * regmap)1110 struct ssd130x_device *ssd130x_probe(struct device *dev, struct regmap *regmap)
1111 {
1112 struct ssd130x_device *ssd130x;
1113 struct backlight_device *bl;
1114 struct drm_device *drm;
1115 int ret;
1116
1117 ssd130x = devm_drm_dev_alloc(dev, &ssd130x_drm_driver,
1118 struct ssd130x_device, drm);
1119 if (IS_ERR(ssd130x))
1120 return ERR_PTR(dev_err_probe(dev, PTR_ERR(ssd130x),
1121 "Failed to allocate DRM device\n"));
1122
1123 drm = &ssd130x->drm;
1124
1125 ssd130x->dev = dev;
1126 ssd130x->regmap = regmap;
1127 ssd130x->device_info = device_get_match_data(dev);
1128
1129 if (ssd130x->device_info->page_mode_only)
1130 ssd130x->page_address_mode = 1;
1131
1132 ssd130x_parse_properties(ssd130x);
1133
1134 ret = ssd130x_get_resources(ssd130x);
1135 if (ret)
1136 return ERR_PTR(ret);
1137
1138 bl = devm_backlight_device_register(dev, dev_name(dev), dev, ssd130x,
1139 &ssd130xfb_bl_ops, NULL);
1140 if (IS_ERR(bl))
1141 return ERR_PTR(dev_err_probe(dev, PTR_ERR(bl),
1142 "Unable to register backlight device\n"));
1143
1144 bl->props.brightness = ssd130x->contrast;
1145 bl->props.max_brightness = MAX_CONTRAST;
1146 ssd130x->bl_dev = bl;
1147
1148 ret = ssd130x_init_modeset(ssd130x);
1149 if (ret)
1150 return ERR_PTR(ret);
1151
1152 ret = drm_dev_register(drm, 0);
1153 if (ret)
1154 return ERR_PTR(dev_err_probe(dev, ret, "DRM device register failed\n"));
1155
1156 drm_fbdev_generic_setup(drm, 32);
1157
1158 return ssd130x;
1159 }
1160 EXPORT_SYMBOL_GPL(ssd130x_probe);
1161
ssd130x_remove(struct ssd130x_device * ssd130x)1162 void ssd130x_remove(struct ssd130x_device *ssd130x)
1163 {
1164 drm_dev_unplug(&ssd130x->drm);
1165 }
1166 EXPORT_SYMBOL_GPL(ssd130x_remove);
1167
ssd130x_shutdown(struct ssd130x_device * ssd130x)1168 void ssd130x_shutdown(struct ssd130x_device *ssd130x)
1169 {
1170 drm_atomic_helper_shutdown(&ssd130x->drm);
1171 }
1172 EXPORT_SYMBOL_GPL(ssd130x_shutdown);
1173
1174 MODULE_DESCRIPTION(DRIVER_DESC);
1175 MODULE_AUTHOR("Javier Martinez Canillas <javierm@redhat.com>");
1176 MODULE_LICENSE("GPL v2");
1177