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Searched defs:SPRN_L1CSR0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/powerpc/include/asm/
H A Dreg_booke.h173 #define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ macro
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h485 #define SPRN_L1CSR0 0x3f2 /* L1 Data Cache Control and Status Register 0 */ macro