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Searched defs:SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8849 #define SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK 0x1f macro
H A Dgfx_8_0_sh_mask.h10467 #define SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK 0x7f macro
H A Dgfx_8_1_sh_mask.h10865 #define SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK 0x7f macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12311 #define SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK … macro
H A Dgc_9_2_1_sh_mask.h13491 #define SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK … macro
H A Dgc_9_1_sh_mask.h13695 #define SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK … macro
H A Dgc_9_4_3_sh_mask.h15840 #define SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK … macro
H A Dgc_9_4_2_sh_mask.h24925 #define SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK … macro
H A Dgc_11_0_0_sh_mask.h17203 #define SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK … macro
H A Dgc_11_0_3_sh_mask.h19446 #define SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK … macro
H A Dgc_10_1_0_sh_mask.h19696 #define SPI_WCL_PIPE_PERCENT_CS5__VALUE_MASK … macro