xref: /openbmc/linux/arch/arm/mach-sa1100/pm.c (revision a9ff6961)
1 /*
2  * SA1100 Power Management Routines
3  *
4  * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License.
8  *
9  * History:
10  *
11  * 2001-02-06:	Cliff Brake         Initial code
12  *
13  * 2001-02-25:	Sukjae Cho <sjcho@east.isi.edu> &
14  * 		Chester Kuo <chester@linux.org.tw>
15  * 			Save more value for the resume function! Support
16  * 			Bitsy/Assabet/Freebird board
17  *
18  * 2001-08-29:	Nicolas Pitre <nico@fluxnic.net>
19  * 			Cleaned up, pushed platform dependent stuff
20  * 			in the platform specific files.
21  *
22  * 2002-05-27:	Nicolas Pitre	Killed sleep.h and the kmalloced save array.
23  * 				Storage is local on the stack now.
24  */
25 #include <linux/init.h>
26 #include <linux/io.h>
27 #include <linux/suspend.h>
28 #include <linux/errno.h>
29 #include <linux/time.h>
30 
31 #include <mach/hardware.h>
32 #include <asm/page.h>
33 #include <asm/suspend.h>
34 #include <asm/mach/time.h>
35 
36 #include "generic.h"
37 
38 extern int sa1100_finish_suspend(unsigned long);
39 
40 #define SAVE(x)		sleep_save[SLEEP_SAVE_##x] = x
41 #define RESTORE(x)	x = sleep_save[SLEEP_SAVE_##x]
42 
43 /*
44  * List of global SA11x0 peripheral registers to preserve.
45  * More ones like CP and general purpose register values are preserved
46  * on the stack and then the stack pointer is stored last in sleep.S.
47  */
48 enum {	SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR,
49 	SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR,
50 
51 	SLEEP_SAVE_Ser1SDCR0,
52 
53 	SLEEP_SAVE_COUNT
54 };
55 
56 
sa11x0_pm_enter(suspend_state_t state)57 static int sa11x0_pm_enter(suspend_state_t state)
58 {
59 	unsigned long gpio, sleep_save[SLEEP_SAVE_COUNT];
60 
61 	gpio = GPLR;
62 
63 	/* save vital registers */
64 	SAVE(GPDR);
65 	SAVE(GAFR);
66 
67 	SAVE(PPDR);
68 	SAVE(PPSR);
69 	SAVE(PPAR);
70 	SAVE(PSDR);
71 
72 	SAVE(Ser1SDCR0);
73 
74 	/* Clear previous reset status */
75 	RCSR = RCSR_HWR | RCSR_SWR | RCSR_WDR | RCSR_SMR;
76 
77 	/* set resume return address */
78 	PSPR = __pa_symbol(cpu_resume);
79 
80 	/* go zzz */
81 	cpu_suspend(0, sa1100_finish_suspend);
82 
83 	/*
84 	 * Ensure not to come back here if it wasn't intended
85 	 */
86 	RCSR = RCSR_SMR;
87 	PSPR = 0;
88 
89 	/*
90 	 * Ensure interrupt sources are disabled; we will re-init
91 	 * the interrupt subsystem via the device manager.
92 	 */
93 	ICLR = 0;
94 	ICCR = 1;
95 	ICMR = 0;
96 
97 	/* restore registers */
98 	RESTORE(GPDR);
99 	RESTORE(GAFR);
100 
101 	RESTORE(PPDR);
102 	RESTORE(PPSR);
103 	RESTORE(PPAR);
104 	RESTORE(PSDR);
105 
106 	RESTORE(Ser1SDCR0);
107 
108 	GPSR = gpio;
109 	GPCR = ~gpio;
110 
111 	/*
112 	 * Clear the peripheral sleep-hold bit.
113 	 */
114 	PSSR = PSSR_PH;
115 
116 	return 0;
117 }
118 
119 static const struct platform_suspend_ops sa11x0_pm_ops = {
120 	.enter		= sa11x0_pm_enter,
121 	.valid		= suspend_valid_only_mem,
122 };
123 
sa11x0_pm_init(void)124 int __init sa11x0_pm_init(void)
125 {
126 	suspend_set_ops(&sa11x0_pm_ops);
127 	return 0;
128 }
129