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Searched defs:SDMA0_BASE__INST1_SEG1 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega20_ip_offset.h680 #define SDMA0_BASE__INST1_SEG1 0 macro
H A Dsienna_cichlid_ip_offset.h881 #define SDMA0_BASE__INST1_SEG1 0 macro
H A Dvega10_ip_offset.h1002 #define SDMA0_BASE__INST1_SEG1 0 macro
H A Dbeige_goby_ip_offset.h1037 #define SDMA0_BASE__INST1_SEG1 0 macro
H A Drenoir_ip_offset.h1124 #define SDMA0_BASE__INST1_SEG1 0 macro
H A Dyellow_carp_offset.h1128 #define SDMA0_BASE__INST1_SEG1 0 macro
H A Daldebaran_ip_offset.h1207 #define SDMA0_BASE__INST1_SEG1 0 macro
H A Darct_ip_offset.h926 #define SDMA0_BASE__INST1_SEG1 0 macro