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Searched defs:SDCDIV (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/hw/sd/
H A Dbcm2835_sdhost.c32 #define SDCDIV 0x0c /* Start value for clock divider - 11 R/W */ in DECLARE_INSTANCE_CHECKER() macro
/openbmc/u-boot/drivers/mmc/
H A Dbcm2835_sdhost.c51 #define SDCDIV 0x0c /* Start value for clock divider - 11 R/W */ macro
/openbmc/linux/drivers/mmc/host/
H A Dbcm2835.c55 #define SDCDIV 0x0c /* Start value for clock divider - 11 R/W */ macro