1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Intel(R) Trace Hub data structures
4  *
5  * Copyright (C) 2014-2015 Intel Corporation.
6  */
7 
8 #ifndef __INTEL_TH_H__
9 #define __INTEL_TH_H__
10 
11 #include <linux/irqreturn.h>
12 
13 /* intel_th_device device types */
14 enum {
15 	/* Devices that generate trace data */
16 	INTEL_TH_SOURCE = 0,
17 	/* Output ports (MSC, PTI) */
18 	INTEL_TH_OUTPUT,
19 	/* Switch, the Global Trace Hub (GTH) */
20 	INTEL_TH_SWITCH,
21 };
22 
23 struct intel_th_device;
24 
25 /**
26  * struct intel_th_output - descriptor INTEL_TH_OUTPUT type devices
27  * @port:	output port number, assigned by the switch
28  * @type:	GTH_{MSU,CTP,PTI}
29  * @scratchpad:	scratchpad bits to flag when this output is enabled
30  * @multiblock:	true for multiblock output configuration
31  * @active:	true when this output is enabled
32  * @wait_empty:	wait for device pipeline to be empty
33  *
34  * Output port descriptor, used by switch driver to tell which output
35  * port this output device corresponds to. Filled in at output device's
36  * probe time by switch::assign(). Passed from output device driver to
37  * switch related code to enable/disable its port.
38  */
39 struct intel_th_output {
40 	int		port;
41 	unsigned int	type;
42 	unsigned int	scratchpad;
43 	bool		multiblock;
44 	bool		active;
45 };
46 
47 /**
48  * struct intel_th_drvdata - describes hardware capabilities and quirks
49  * @tscu_enable:	device needs SW to enable time stamping unit
50  * @multi_is_broken:	device has multiblock mode is broken
51  * @has_mintctl:	device has interrupt control (MINTCTL) register
52  * @host_mode_only:	device can only operate in 'host debugger' mode
53  */
54 struct intel_th_drvdata {
55 	unsigned int	tscu_enable        : 1,
56 			multi_is_broken    : 1,
57 			has_mintctl        : 1,
58 			host_mode_only     : 1;
59 };
60 
61 #define INTEL_TH_CAP(_th, _cap) ((_th)->drvdata ? (_th)->drvdata->_cap : 0)
62 
63 /**
64  * struct intel_th_device - device on the intel_th bus
65  * @dev:		device
66  * @drvdata:		hardware capabilities/quirks
67  * @resource:		array of resources available to this device
68  * @num_resources:	number of resources in @resource array
69  * @type:		INTEL_TH_{SOURCE,OUTPUT,SWITCH}
70  * @id:			device instance or -1
71  * @host_mode:		Intel TH is controlled by an external debug host
72  * @output:		output descriptor for INTEL_TH_OUTPUT devices
73  * @name:		device name to match the driver
74  */
75 struct intel_th_device {
76 	struct device		dev;
77 	const struct intel_th_drvdata *drvdata;
78 	struct resource		*resource;
79 	unsigned int		num_resources;
80 	unsigned int		type;
81 	int			id;
82 
83 	/* INTEL_TH_SWITCH specific */
84 	bool			host_mode;
85 
86 	/* INTEL_TH_OUTPUT specific */
87 	struct intel_th_output	output;
88 
89 	char		name[];
90 };
91 
92 #define to_intel_th_device(_d)				\
93 	container_of((_d), struct intel_th_device, dev)
94 
95 /**
96  * intel_th_device_get_resource() - obtain @num'th resource of type @type
97  * @thdev:	the device to search the resource for
98  * @type:	resource type
99  * @num:	number of the resource
100  */
101 static inline struct resource *
intel_th_device_get_resource(struct intel_th_device * thdev,unsigned int type,unsigned int num)102 intel_th_device_get_resource(struct intel_th_device *thdev, unsigned int type,
103 			     unsigned int num)
104 {
105 	int i;
106 
107 	for (i = 0; i < thdev->num_resources; i++)
108 		if (resource_type(&thdev->resource[i]) == type && !num--)
109 			return &thdev->resource[i];
110 
111 	return NULL;
112 }
113 
114 /*
115  * GTH, output ports configuration
116  */
117 enum {
118 	GTH_NONE = 0,
119 	GTH_MSU,	/* memory/usb */
120 	GTH_CTP,	/* Common Trace Port */
121 	GTH_LPP,	/* Low Power Path */
122 	GTH_PTI,	/* MIPI-PTI */
123 };
124 
125 /**
126  * intel_th_output_assigned() - if an output device is assigned to a switch port
127  * @thdev:	the output device
128  *
129  * Return:	true if the device is INTEL_TH_OUTPUT *and* is assigned a port
130  */
131 static inline bool
intel_th_output_assigned(struct intel_th_device * thdev)132 intel_th_output_assigned(struct intel_th_device *thdev)
133 {
134 	return thdev->type == INTEL_TH_OUTPUT &&
135 		(thdev->output.port >= 0 ||
136 		 thdev->output.type == GTH_NONE);
137 }
138 
139 /**
140  * struct intel_th_driver - driver for an intel_th_device device
141  * @driver:	generic driver
142  * @probe:	probe method
143  * @remove:	remove method
144  * @assign:	match a given output type device against available outputs
145  * @unassign:	deassociate an output type device from an output port
146  * @prepare:	prepare output port for tracing
147  * @enable:	enable tracing for a given output device
148  * @disable:	disable tracing for a given output device
149  * @irq:	interrupt callback
150  * @activate:	enable tracing on the output's side
151  * @deactivate:	disable tracing on the output's side
152  * @fops:	file operations for device nodes
153  * @attr_group:	attributes provided by the driver
154  *
155  * Callbacks @probe and @remove are required for all device types.
156  * Switch device driver needs to fill in @assign, @enable and @disable
157  * callbacks.
158  */
159 struct intel_th_driver {
160 	struct device_driver	driver;
161 	int			(*probe)(struct intel_th_device *thdev);
162 	void			(*remove)(struct intel_th_device *thdev);
163 	/* switch (GTH) ops */
164 	int			(*assign)(struct intel_th_device *thdev,
165 					  struct intel_th_device *othdev);
166 	void			(*unassign)(struct intel_th_device *thdev,
167 					    struct intel_th_device *othdev);
168 	void			(*prepare)(struct intel_th_device *thdev,
169 					   struct intel_th_output *output);
170 	void			(*enable)(struct intel_th_device *thdev,
171 					  struct intel_th_output *output);
172 	void			(*trig_switch)(struct intel_th_device *thdev,
173 					       struct intel_th_output *output);
174 	void			(*disable)(struct intel_th_device *thdev,
175 					   struct intel_th_output *output);
176 	/* output ops */
177 	irqreturn_t		(*irq)(struct intel_th_device *thdev);
178 	void			(*wait_empty)(struct intel_th_device *thdev);
179 	int			(*activate)(struct intel_th_device *thdev);
180 	void			(*deactivate)(struct intel_th_device *thdev);
181 	/* file_operations for those who want a device node */
182 	const struct file_operations *fops;
183 	/* optional attributes */
184 	const struct attribute_group *attr_group;
185 
186 	/* source ops */
187 	int			(*set_output)(struct intel_th_device *thdev,
188 					      unsigned int master);
189 };
190 
191 #define to_intel_th_driver(_d)					\
192 	container_of((_d), struct intel_th_driver, driver)
193 
194 #define to_intel_th_driver_or_null(_d)		\
195 	((_d) ? to_intel_th_driver(_d) : NULL)
196 
197 /*
198  * Subdevice tree structure is as follows:
199  * + struct intel_th device (pci; dev_{get,set}_drvdata()
200  *   + struct intel_th_device INTEL_TH_SWITCH (GTH)
201  *     + struct intel_th_device INTEL_TH_OUTPUT (MSU, PTI)
202  *   + struct intel_th_device INTEL_TH_SOURCE (STH)
203  *
204  * In other words, INTEL_TH_OUTPUT devices are children of INTEL_TH_SWITCH;
205  * INTEL_TH_SWITCH and INTEL_TH_SOURCE are children of the intel_th device.
206  */
207 static inline struct intel_th_device *
to_intel_th_parent(const struct intel_th_device * thdev)208 to_intel_th_parent(const struct intel_th_device *thdev)
209 {
210 	struct device *parent = thdev->dev.parent;
211 
212 	if (!parent)
213 		return NULL;
214 
215 	return to_intel_th_device(parent);
216 }
217 
to_intel_th(const struct intel_th_device * thdev)218 static inline struct intel_th *to_intel_th(const struct intel_th_device *thdev)
219 {
220 	if (thdev->type == INTEL_TH_OUTPUT)
221 		thdev = to_intel_th_parent(thdev);
222 
223 	if (WARN_ON_ONCE(!thdev || thdev->type == INTEL_TH_OUTPUT))
224 		return NULL;
225 
226 	return dev_get_drvdata(thdev->dev.parent);
227 }
228 
229 struct intel_th *
230 intel_th_alloc(struct device *dev, const struct intel_th_drvdata *drvdata,
231 	       struct resource *devres, unsigned int ndevres);
232 void intel_th_free(struct intel_th *th);
233 
234 int intel_th_driver_register(struct intel_th_driver *thdrv);
235 void intel_th_driver_unregister(struct intel_th_driver *thdrv);
236 
237 int intel_th_trace_enable(struct intel_th_device *thdev);
238 int intel_th_trace_switch(struct intel_th_device *thdev);
239 int intel_th_trace_disable(struct intel_th_device *thdev);
240 int intel_th_set_output(struct intel_th_device *thdev,
241 			unsigned int master);
242 int intel_th_output_enable(struct intel_th *th, unsigned int otype);
243 
244 enum th_mmio_idx {
245 	TH_MMIO_CONFIG = 0,
246 	TH_MMIO_SW = 1,
247 	TH_MMIO_RTIT = 2,
248 	TH_MMIO_END,
249 };
250 
251 #define TH_POSSIBLE_OUTPUTS	8
252 /* Total number of possible subdevices: outputs + GTH + STH */
253 #define TH_SUBDEVICE_MAX	(TH_POSSIBLE_OUTPUTS + 2)
254 #define TH_CONFIGURABLE_MASTERS 256
255 #define TH_MSC_MAX		2
256 
257 /* Maximum IRQ vectors */
258 #define TH_NVEC_MAX		8
259 
260 /**
261  * struct intel_th - Intel TH controller
262  * @dev:	driver core's device
263  * @thdev:	subdevices
264  * @hub:	"switch" subdevice (GTH)
265  * @resource:	resources of the entire controller
266  * @num_thdevs:	number of devices in the @thdev array
267  * @num_resources:	number of resources in the @resource array
268  * @irq:	irq number
269  * @num_irqs:	number of IRQs is use
270  * @id:		this Intel TH controller's device ID in the system
271  * @major:	device node major for output devices
272  */
273 struct intel_th {
274 	struct device		*dev;
275 
276 	struct intel_th_device	*thdev[TH_SUBDEVICE_MAX];
277 	struct intel_th_device	*hub;
278 	const struct intel_th_drvdata	*drvdata;
279 
280 	struct resource		resource[TH_MMIO_END];
281 	int			(*activate)(struct intel_th *);
282 	void			(*deactivate)(struct intel_th *);
283 	unsigned int		num_thdevs;
284 	unsigned int		num_resources;
285 	int			irq;
286 	int			num_irqs;
287 
288 	int			id;
289 	int			major;
290 #ifdef CONFIG_MODULES
291 	struct work_struct	request_module_work;
292 #endif /* CONFIG_MODULES */
293 #ifdef CONFIG_INTEL_TH_DEBUG
294 	struct dentry		*dbg;
295 #endif
296 };
297 
298 static inline struct intel_th_device *
to_intel_th_hub(struct intel_th_device * thdev)299 to_intel_th_hub(struct intel_th_device *thdev)
300 {
301 	if (thdev->type == INTEL_TH_SWITCH)
302 		return thdev;
303 	else if (thdev->type == INTEL_TH_OUTPUT)
304 		return to_intel_th_parent(thdev);
305 
306 	return to_intel_th(thdev)->hub;
307 }
308 
309 /*
310  * Register windows
311  */
312 enum {
313 	/* Global Trace Hub (GTH) */
314 	REG_GTH_OFFSET		= 0x0000,
315 	REG_GTH_LENGTH		= 0x2000,
316 
317 	/* Timestamp counter unit (TSCU) */
318 	REG_TSCU_OFFSET		= 0x2000,
319 	REG_TSCU_LENGTH		= 0x1000,
320 
321 	REG_CTS_OFFSET		= 0x3000,
322 	REG_CTS_LENGTH		= 0x1000,
323 
324 	/* Software Trace Hub (STH) [0x4000..0x4fff] */
325 	REG_STH_OFFSET		= 0x4000,
326 	REG_STH_LENGTH		= 0x2000,
327 
328 	/* Memory Storage Unit (MSU) [0xa0000..0xa1fff] */
329 	REG_MSU_OFFSET		= 0xa0000,
330 	REG_MSU_LENGTH		= 0x02000,
331 
332 	/* Internal MSU trace buffer [0x80000..0x9ffff] */
333 	BUF_MSU_OFFSET		= 0x80000,
334 	BUF_MSU_LENGTH		= 0x20000,
335 
336 	/* PTI output == same window as GTH */
337 	REG_PTI_OFFSET		= REG_GTH_OFFSET,
338 	REG_PTI_LENGTH		= REG_GTH_LENGTH,
339 
340 	/* DCI Handler (DCIH) == some window as MSU */
341 	REG_DCIH_OFFSET		= REG_MSU_OFFSET,
342 	REG_DCIH_LENGTH		= REG_MSU_LENGTH,
343 };
344 
345 /*
346  * Scratchpad bits: tell firmware and external debuggers
347  * what we are up to.
348  */
349 enum {
350 	/* Memory is the primary destination */
351 	SCRPD_MEM_IS_PRIM_DEST		= BIT(0),
352 	/* XHCI DbC is the primary destination */
353 	SCRPD_DBC_IS_PRIM_DEST		= BIT(1),
354 	/* PTI is the primary destination */
355 	SCRPD_PTI_IS_PRIM_DEST		= BIT(2),
356 	/* BSSB is the primary destination */
357 	SCRPD_BSSB_IS_PRIM_DEST		= BIT(3),
358 	/* PTI is the alternate destination */
359 	SCRPD_PTI_IS_ALT_DEST		= BIT(4),
360 	/* BSSB is the alternate destination */
361 	SCRPD_BSSB_IS_ALT_DEST		= BIT(5),
362 	/* DeepSx exit occurred */
363 	SCRPD_DEEPSX_EXIT		= BIT(6),
364 	/* S4 exit occurred */
365 	SCRPD_S4_EXIT			= BIT(7),
366 	/* S5 exit occurred */
367 	SCRPD_S5_EXIT			= BIT(8),
368 	/* MSU controller 0/1 is enabled */
369 	SCRPD_MSC0_IS_ENABLED		= BIT(9),
370 	SCRPD_MSC1_IS_ENABLED		= BIT(10),
371 	/* Sx exit occurred */
372 	SCRPD_SX_EXIT			= BIT(11),
373 	/* Trigger Unit is enabled */
374 	SCRPD_TRIGGER_IS_ENABLED	= BIT(12),
375 	SCRPD_ODLA_IS_ENABLED		= BIT(13),
376 	SCRPD_SOCHAP_IS_ENABLED		= BIT(14),
377 	SCRPD_STH_IS_ENABLED		= BIT(15),
378 	SCRPD_DCIH_IS_ENABLED		= BIT(16),
379 	SCRPD_VER_IS_ENABLED		= BIT(17),
380 	/* External debugger is using Intel TH */
381 	SCRPD_DEBUGGER_IN_USE		= BIT(24),
382 };
383 
384 #endif
385