Home
last modified time | relevance | path

Searched defs:RISCVCPUClass (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu.h538 struct RISCVCPUClass { struct
539 CPUClass parent_class;
541 DeviceRealize parent_realize;
542 ResettablePhases parent_phases;
543 RISCVMXL misa_mxl_max; /* max mxl for this cpu */