| /openbmc/qemu/tests/tcg/hexagon/ |
| H A D | load_align.c | 52 #define LOAD_io(SZ, RES, ADDR, OFF) \ argument
57 #define LOAD_io_b(RES, ADDR, OFF) \ argument
59 #define LOAD_io_h(RES, ADDR, OFF) \ argument
92 #define LOAD_ur_b(RES, SHIFT, IDX) \ argument
126 #define LOAD_ap_b(RES, PTR, ADDR) \ argument
128 #define LOAD_ap_h(RES, PTR, ADDR) \ argument
168 #define LOAD_pr_b(RES, PTR, INC) \ argument
170 #define LOAD_pr_h(RES, PTR, INC) \ argument
203 #define LOAD_pbr(SZ, RES, PTR) \ argument
211 #define LOAD_pbr_b(RES, PTR) \ argument
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| H A D | load_unpack.c | 55 #define BxW_LOAD_io(SZ, RES, ADDR, OFF) \ argument
60 #define BxW_LOAD_io_Z(RES, ADDR, OFF) \ argument
62 #define BxW_LOAD_io_S(RES, ADDR, OFF) \ argument
101 #define BxW_LOAD_ur_Z(RES, SHIFT, IDX) \ argument
140 #define BxW_LOAD_ap_Z(RES, PTR, ADDR) \ argument
142 #define BxW_LOAD_ap_S(RES, PTR, ADDR) \ argument
187 #define BxW_LOAD_pr_Z(RES, PTR, INC) \ argument
189 #define BxW_LOAD_pr_S(RES, PTR, INC) \ argument
227 #define BxW_LOAD_pbr(SZ, RES, PTR) \ argument
235 #define BxW_LOAD_pbr_Z(RES, PTR) \ argument
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| H A D | usr.c | 433 #define TEST_R_OP_R(FUNC, SRC, RES, USR_RES) \ argument
436 #define TEST_R_OP_P(FUNC, SRC, RES, USR_RES) \ argument
439 #define TEST_P_OP_P(FUNC, SRC, RES, USR_RES) \ argument
442 #define TEST_P_OP_R(FUNC, SRC, RES, USR_RES) \ argument
446 RES, PRED_RES, USR_RES) \ argument
462 FUNC, SRC1, SRC2, RES, USR_RES) \ argument
473 #define TEST_P_OP_PP(FUNC, SRC1, SRC2, RES, USR_RES) \ argument
498 RES, PRED_RES, USR_RES) \ argument
594 FUNC, SRC1, SRC2, RES, USR_RES) \ argument
605 #define TEST_CMP_RR(FUNC, SRC1, SRC2, RES, USR_RES) \ argument
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| H A D | brev.c | 38 #define BREV_LOAD(SZ, RES, ADDR, INC) \ argument
46 #define BREV_LOAD_b(RES, ADDR, INC) \ argument
48 #define BREV_LOAD_ub(RES, ADDR, INC) \ argument
50 #define BREV_LOAD_h(RES, ADDR, INC) \ argument
52 #define BREV_LOAD_uh(RES, ADDR, INC) \ argument
54 #define BREV_LOAD_w(RES, ADDR, INC) \ argument
56 #define BREV_LOAD_d(RES, ADDR, INC) \ argument
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| H A D | circ.c | 78 #define CIRC_LOAD_IMM_b(RES, ADDR, START, LEN, INC) \ in INIT() argument
80 #define CIRC_LOAD_IMM_ub(RES, ADDR, START, LEN, INC) \ in INIT() argument
82 #define CIRC_LOAD_IMM_h(RES, ADDR, START, LEN, INC) \ in INIT() argument
84 #define CIRC_LOAD_IMM_uh(RES, ADDR, START, LEN, INC) \ in INIT() argument
86 #define CIRC_LOAD_IMM_w(RES, ADDR, START, LEN, INC) \ in INIT() argument
88 #define CIRC_LOAD_IMM_d(RES, ADDR, START, LEN, INC) \ in INIT() argument
116 #define CIRC_LOAD_REG_b(RES, ADDR, START, LEN, INC) \ argument
118 #define CIRC_LOAD_REG_ub(RES, ADDR, START, LEN, INC) \ argument
120 #define CIRC_LOAD_REG_h(RES, ADDR, START, LEN, INC) \ argument
124 #define CIRC_LOAD_REG_w(RES, ADDR, START, LEN, INC) \ argument
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| H A D | hex_test.h | 30 #define check32(RES, EXP) __check32(__LINE__, RES, EXP) argument
40 #define check64(RES, EXP) __check64(__LINE__, RES, EXP) argument
60 #define checkp(RES, EXP) __checkp(__LINE__, RES, EXP) argument
70 #define check32_ne(RES, EXP) __check32_ne(__LINE__, RES, EXP) argument
80 #define check64_ne(RES, EXP) __check64_ne(__LINE__, RES, EXP) argument
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| H A D | v73_scalar.c | 37 #define check32(RES, EXP) __check32(__LINE__, RES, EXP) argument
48 #define check64(RES, EXP) __check64(__LINE__, RES, EXP) argument
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| H A D | v68_scalar.c | 40 #define check32(RES, EXP) __check32(__LINE__, RES, EXP) argument
51 #define check64(RES, EXP) __check64(__LINE__, RES, EXP) argument
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| H A D | read_write_overlap.c | 37 #define insert(RES, X, WIDTH, OFFSET) \ argument
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| /openbmc/qemu/tests/tcg/ppc64/ |
| H A D | xxspltw.c | 14 #define TEST(HI, LO, UIM, RES) \ argument
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| /openbmc/qemu/hw/net/ |
| H A D | pcnet.c | 442 #define CHECK_RMD(ADDR,RES) do { \ argument
449 #define CHECK_TMD(ADDR,RES) do { \ argument
457 #define CHECK_RMD(ADDR,RES) do { \ argument
490 #define CHECK_TMD(ADDR,RES) do { \ argument
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| /openbmc/qemu/target/hexagon/ |
| H A D | gen_tcg.h | 82 #define fGEN_TCG_LOAD_AP(RES, SIZE, SIGN) \ argument
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