1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * linux/arch/arm/mach-pxa/mfp-pxa2xx.c
4 *
5 * PXA2xx pin mux configuration support
6 *
7 * The GPIOs on PXA2xx can be configured as one of many alternate
8 * functions, this is by concept samilar to the MFP configuration
9 * on PXA3xx, what's more important, the low power pin state and
10 * wakeup detection are also supported by the same framework.
11 */
12 #include <linux/gpio.h>
13 #include <linux/gpio-pxa.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/io.h>
18 #include <linux/syscore_ops.h>
19 #include <linux/soc/pxa/cpu.h>
20
21 #include "pxa2xx-regs.h"
22 #include "mfp-pxa2xx.h"
23 #include "mfp-pxa27x.h"
24
25 #include "generic.h"
26
27 #define PGSR(x) __REG2(0x40F00020, (x) << 2)
28 #define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
29 #define GAFR_L(x) __GAFR(0, x)
30 #define GAFR_U(x) __GAFR(1, x)
31
32 #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
33 #define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
34 #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
35 #define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18)
36 #define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24)
37
38 #define PWER_WE35 (1 << 24)
39
40 struct gpio_desc {
41 unsigned valid : 1;
42 unsigned can_wakeup : 1;
43 unsigned keypad_gpio : 1;
44 unsigned dir_inverted : 1;
45 unsigned int mask; /* bit mask in PWER or PKWR */
46 unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
47 unsigned long config;
48 };
49
50 static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
51
52 static unsigned long gpdr_lpm[4];
53
__mfp_config_gpio(unsigned gpio,unsigned long c)54 static int __mfp_config_gpio(unsigned gpio, unsigned long c)
55 {
56 unsigned long gafr, mask = GPIO_bit(gpio);
57 int bank = gpio_to_bank(gpio);
58 int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
59 int shft = (gpio & 0xf) << 1;
60 int fn = MFP_AF(c);
61 int is_out = (c & MFP_DIR_OUT) ? 1 : 0;
62
63 if (fn > 3)
64 return -EINVAL;
65
66 /* alternate function and direction at run-time */
67 gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
68 gafr = (gafr & ~(0x3 << shft)) | (fn << shft);
69
70 if (uorl == 0)
71 GAFR_L(bank) = gafr;
72 else
73 GAFR_U(bank) = gafr;
74
75 if (is_out ^ gpio_desc[gpio].dir_inverted)
76 GPDR(gpio) |= mask;
77 else
78 GPDR(gpio) &= ~mask;
79
80 /* alternate function and direction at low power mode */
81 switch (c & MFP_LPM_STATE_MASK) {
82 case MFP_LPM_DRIVE_HIGH:
83 PGSR(bank) |= mask;
84 is_out = 1;
85 break;
86 case MFP_LPM_DRIVE_LOW:
87 PGSR(bank) &= ~mask;
88 is_out = 1;
89 break;
90 case MFP_LPM_INPUT:
91 case MFP_LPM_DEFAULT:
92 break;
93 default:
94 /* warning and fall through, treat as MFP_LPM_DEFAULT */
95 pr_warn("%s: GPIO%d: unsupported low power mode\n",
96 __func__, gpio);
97 break;
98 }
99
100 if (is_out ^ gpio_desc[gpio].dir_inverted)
101 gpdr_lpm[bank] |= mask;
102 else
103 gpdr_lpm[bank] &= ~mask;
104
105 /* give early warning if MFP_LPM_CAN_WAKEUP is set on the
106 * configurations of those pins not able to wakeup
107 */
108 if ((c & MFP_LPM_CAN_WAKEUP) && !gpio_desc[gpio].can_wakeup) {
109 pr_warn("%s: GPIO%d unable to wakeup\n", __func__, gpio);
110 return -EINVAL;
111 }
112
113 if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
114 pr_warn("%s: output GPIO%d unable to wakeup\n", __func__, gpio);
115 return -EINVAL;
116 }
117
118 return 0;
119 }
120
__mfp_validate(int mfp)121 static inline int __mfp_validate(int mfp)
122 {
123 int gpio = mfp_to_gpio(mfp);
124
125 if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) {
126 pr_warn("%s: GPIO%d is invalid pin\n", __func__, gpio);
127 return -1;
128 }
129
130 return gpio;
131 }
132
pxa2xx_mfp_config(unsigned long * mfp_cfgs,int num)133 void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
134 {
135 unsigned long flags;
136 unsigned long *c;
137 int i, gpio;
138
139 for (i = 0, c = mfp_cfgs; i < num; i++, c++) {
140
141 gpio = __mfp_validate(MFP_PIN(*c));
142 if (gpio < 0)
143 continue;
144
145 local_irq_save(flags);
146
147 gpio_desc[gpio].config = *c;
148 __mfp_config_gpio(gpio, *c);
149
150 local_irq_restore(flags);
151 }
152 }
153
pxa2xx_mfp_set_lpm(int mfp,unsigned long lpm)154 void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
155 {
156 unsigned long flags, c;
157 int gpio;
158
159 gpio = __mfp_validate(mfp);
160 if (gpio < 0)
161 return;
162
163 local_irq_save(flags);
164
165 c = gpio_desc[gpio].config;
166 c = (c & ~MFP_LPM_STATE_MASK) | lpm;
167 __mfp_config_gpio(gpio, c);
168
169 local_irq_restore(flags);
170 }
171
gpio_set_wake(unsigned int gpio,unsigned int on)172 int gpio_set_wake(unsigned int gpio, unsigned int on)
173 {
174 struct gpio_desc *d;
175 unsigned long c, mux_taken;
176
177 if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
178 return -EINVAL;
179
180 d = &gpio_desc[gpio];
181 c = d->config;
182
183 if (!d->valid)
184 return -EINVAL;
185
186 /* Allow keypad GPIOs to wakeup system when
187 * configured as generic GPIOs.
188 */
189 if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
190 (d->config & MFP_LPM_CAN_WAKEUP)) {
191 if (on)
192 PKWR |= d->mask;
193 else
194 PKWR &= ~d->mask;
195 return 0;
196 }
197
198 mux_taken = (PWER & d->mux_mask) & (~d->mask);
199 if (on && mux_taken)
200 return -EBUSY;
201
202 if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
203 if (on) {
204 PWER = (PWER & ~d->mux_mask) | d->mask;
205
206 if (c & MFP_LPM_EDGE_RISE)
207 PRER |= d->mask;
208 else
209 PRER &= ~d->mask;
210
211 if (c & MFP_LPM_EDGE_FALL)
212 PFER |= d->mask;
213 else
214 PFER &= ~d->mask;
215 } else {
216 PWER &= ~d->mask;
217 PRER &= ~d->mask;
218 PFER &= ~d->mask;
219 }
220 }
221 return 0;
222 }
223
224 #ifdef CONFIG_PXA25x
pxa25x_mfp_init(void)225 static void __init pxa25x_mfp_init(void)
226 {
227 int i;
228
229 /* running before pxa_gpio_probe() */
230 pxa_last_gpio = 84;
231 for (i = 0; i <= pxa_last_gpio; i++)
232 gpio_desc[i].valid = 1;
233
234 for (i = 0; i <= 15; i++) {
235 gpio_desc[i].can_wakeup = 1;
236 gpio_desc[i].mask = GPIO_bit(i);
237 }
238
239 /* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
240 * direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
241 */
242 for (i = 86; i <= pxa_last_gpio; i++)
243 gpio_desc[i].dir_inverted = 1;
244 }
245 #else
pxa25x_mfp_init(void)246 static inline void pxa25x_mfp_init(void) {}
247 #endif /* CONFIG_PXA25x */
248
249 #ifdef CONFIG_PXA27x
250 static int pxa27x_pkwr_gpio[] = {
251 13, 16, 17, 34, 36, 37, 38, 39, 90, 91, 93, 94,
252 95, 96, 97, 98, 99, 100, 101, 102
253 };
254
keypad_set_wake(unsigned int on)255 int keypad_set_wake(unsigned int on)
256 {
257 unsigned int i, gpio, mask = 0;
258 struct gpio_desc *d;
259
260 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
261
262 gpio = pxa27x_pkwr_gpio[i];
263 d = &gpio_desc[gpio];
264
265 /* skip if configured as generic GPIO */
266 if (MFP_AF(d->config) == 0)
267 continue;
268
269 if (d->config & MFP_LPM_CAN_WAKEUP)
270 mask |= gpio_desc[gpio].mask;
271 }
272
273 if (on)
274 PKWR |= mask;
275 else
276 PKWR &= ~mask;
277 return 0;
278 }
279
280 #define PWER_WEMUX2_GPIO38 (1 << 16)
281 #define PWER_WEMUX2_GPIO53 (2 << 16)
282 #define PWER_WEMUX2_GPIO40 (3 << 16)
283 #define PWER_WEMUX2_GPIO36 (4 << 16)
284 #define PWER_WEMUX2_MASK (7 << 16)
285 #define PWER_WEMUX3_GPIO31 (1 << 19)
286 #define PWER_WEMUX3_GPIO113 (2 << 19)
287 #define PWER_WEMUX3_MASK (3 << 19)
288
289 #define INIT_GPIO_DESC_MUXED(mux, gpio) \
290 do { \
291 gpio_desc[(gpio)].can_wakeup = 1; \
292 gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio; \
293 gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK; \
294 } while (0)
295
pxa27x_mfp_init(void)296 static void __init pxa27x_mfp_init(void)
297 {
298 int i, gpio;
299
300 pxa_last_gpio = 120; /* running before pxa_gpio_probe() */
301 for (i = 0; i <= pxa_last_gpio; i++) {
302 /* skip GPIO2, 5, 6, 7, 8, they are not
303 * valid pins allow configuration
304 */
305 if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8)
306 continue;
307
308 gpio_desc[i].valid = 1;
309 }
310
311 /* Keypad GPIOs */
312 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
313 gpio = pxa27x_pkwr_gpio[i];
314 gpio_desc[gpio].can_wakeup = 1;
315 gpio_desc[gpio].keypad_gpio = 1;
316 gpio_desc[gpio].mask = 1 << i;
317 }
318
319 /* Overwrite GPIO13 as a PWER wakeup source */
320 for (i = 0; i <= 15; i++) {
321 /* skip GPIO2, 5, 6, 7, 8 */
322 if (GPIO_bit(i) & 0x1e4)
323 continue;
324
325 gpio_desc[i].can_wakeup = 1;
326 gpio_desc[i].mask = GPIO_bit(i);
327 }
328
329 gpio_desc[35].can_wakeup = 1;
330 gpio_desc[35].mask = PWER_WE35;
331
332 INIT_GPIO_DESC_MUXED(WEMUX3, 31);
333 INIT_GPIO_DESC_MUXED(WEMUX3, 113);
334 INIT_GPIO_DESC_MUXED(WEMUX2, 38);
335 INIT_GPIO_DESC_MUXED(WEMUX2, 53);
336 INIT_GPIO_DESC_MUXED(WEMUX2, 40);
337 INIT_GPIO_DESC_MUXED(WEMUX2, 36);
338 }
339 #else
pxa27x_mfp_init(void)340 static inline void pxa27x_mfp_init(void) {}
341 #endif /* CONFIG_PXA27x */
342
343 #ifdef CONFIG_PM
344 static unsigned long saved_gafr[2][4];
345 static unsigned long saved_gpdr[4];
346 static unsigned long saved_gplr[4];
347 static unsigned long saved_pgsr[4];
348
pxa2xx_mfp_suspend(void)349 static int pxa2xx_mfp_suspend(void)
350 {
351 int i;
352
353 /* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
354 for (i = 0; i < pxa_last_gpio; i++) {
355 if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
356 (GPDR(i) & GPIO_bit(i))) {
357 if (GPLR(i) & GPIO_bit(i))
358 PGSR(gpio_to_bank(i)) |= GPIO_bit(i);
359 else
360 PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
361 }
362 }
363
364 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
365 saved_gafr[0][i] = GAFR_L(i);
366 saved_gafr[1][i] = GAFR_U(i);
367 saved_gpdr[i] = GPDR(i * 32);
368 saved_gplr[i] = GPLR(i * 32);
369 saved_pgsr[i] = PGSR(i);
370
371 GPSR(i * 32) = PGSR(i);
372 GPCR(i * 32) = ~PGSR(i);
373 }
374
375 /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */
376 for (i = 0; i < pxa_last_gpio; i++) {
377 if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) ||
378 ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
379 (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i))))
380 GPDR(i) |= GPIO_bit(i);
381 else
382 GPDR(i) &= ~GPIO_bit(i);
383 }
384
385 return 0;
386 }
387
pxa2xx_mfp_resume(void)388 static void pxa2xx_mfp_resume(void)
389 {
390 int i;
391
392 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
393 GAFR_L(i) = saved_gafr[0][i];
394 GAFR_U(i) = saved_gafr[1][i];
395 GPSR(i * 32) = saved_gplr[i];
396 GPCR(i * 32) = ~saved_gplr[i];
397 GPDR(i * 32) = saved_gpdr[i];
398 PGSR(i) = saved_pgsr[i];
399 }
400 PSSR = PSSR_RDH | PSSR_PH;
401 }
402 #else
403 #define pxa2xx_mfp_suspend NULL
404 #define pxa2xx_mfp_resume NULL
405 #endif
406
407 struct syscore_ops pxa2xx_mfp_syscore_ops = {
408 .suspend = pxa2xx_mfp_suspend,
409 .resume = pxa2xx_mfp_resume,
410 };
411
pxa2xx_mfp_init(void)412 static int __init pxa2xx_mfp_init(void)
413 {
414 int i;
415
416 if (!cpu_is_pxa2xx())
417 return 0;
418
419 if (cpu_is_pxa25x())
420 pxa25x_mfp_init();
421
422 if (cpu_is_pxa27x())
423 pxa27x_mfp_init();
424
425 /* clear RDH bit to enable GPIO receivers after reset/sleep exit */
426 PSSR = PSSR_RDH;
427
428 /* initialize gafr_run[], pgsr_lpm[] from existing values */
429 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
430 gpdr_lpm[i] = GPDR(i * 32);
431
432 return 0;
433 }
434 postcore_initcall(pxa2xx_mfp_init);
435