xref: /openbmc/u-boot/board/micronas/vct/vct.h (revision e8f80a5a)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
4  *
5  * Copyright (C) 2006 Micronas GmbH
6  */
7 
8 #include <asm/io.h>
9 
10 #include "bcu.h"
11 #include "dcgu.h"
12 #include "ebi.h"
13 #include "scc.h"
14 
15 #ifdef CONFIG_VCT_PREMIUM
16 /* Global start address of all memory mapped registers */
17 #define REG_GLOBAL_START_ADDR	0xbf800000
18 #define TOP_BASE		0x000c8000
19 
20 #include "vcth/reg_ebi.h"
21 #include "vcth/reg_dcgu.h"
22 #include "vcth/reg_wdt.h"
23 #include "vcth/reg_gpio.h"
24 #include "vcth/reg_fwsram.h"
25 #include "vcth/reg_scc.h"
26 #include "vcth/reg_usbh.h"
27 #endif
28 
29 #ifdef CONFIG_VCT_PLATINUM
30 /* Global start address of all memory mapped registers */
31 #define REG_GLOBAL_START_ADDR	0xbf800000
32 #define TOP_BASE		0x000c8000
33 
34 #include "vcth2/reg_ebi.h"
35 #include "vcth/reg_dcgu.h"
36 #include "vcth/reg_wdt.h"
37 #include "vcth/reg_gpio.h"
38 #include "vcth/reg_fwsram.h"
39 #include "vcth/reg_scc.h"
40 #include "vcth/reg_usbh.h"
41 #endif
42 
43 #ifdef CONFIG_VCT_PLATINUMAVC
44 /* Global start address of all memory mapped registers */
45 #define REG_GLOBAL_START_ADDR	0xbdc00000
46 #define TOP_BASE		0x00050000
47 
48 #include "vctv/reg_ebi.h"
49 #include "vctv/reg_dcgu.h"
50 #include "vctv/reg_wdt.h"
51 #include "vctv/reg_gpio.h"
52 #endif
53 
54 #ifndef _VCT_H
55 #define _VCT_H
56 
57 /*
58  * Defines
59  */
60 #define PRID_COMP_LEGACY	0x000000
61 #define PRID_COMP_MIPS		0x010000
62 #define PRID_IMP_LX4280		0xc200
63 #define PRID_IMP_VGC		0x9000
64 
65 /*
66  * Prototypes
67  */
68 int ebi_initialize(void);
69 int ebi_init_nor_flash(void);
70 int ebi_init_onenand(void);
71 int ebi_init_smc911x(void);
72 u32 smc911x_reg_read(u32 addr);
73 void smc911x_reg_write(u32 addr, u32 data);
74 int top_set_pin(int pin, int func);
75 void vct_pin_mux_initialize(void);
76 
77 /*
78  * static inlines
79  */
reg_write(u32 addr,u32 data)80 static inline void reg_write(u32 addr, u32 data)
81 {
82 	void *reg = (void *)(addr + REG_GLOBAL_START_ADDR);
83 	__raw_writel(data, reg);
84 }
85 
reg_read(u32 addr)86 static inline u32 reg_read(u32 addr)
87 {
88 	const void *reg = (const void *)(addr + REG_GLOBAL_START_ADDR);
89 	return __raw_readl(reg);
90 }
91 
92 #endif /* _VCT_H */
93