1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 2 /* 3 * linux/drivers/char/serial_core.h 4 * 5 * Copyright (C) 2000 Deep Blue Solutions Ltd. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 #ifndef _UAPILINUX_SERIAL_CORE_H 22 #define _UAPILINUX_SERIAL_CORE_H 23 24 #include <linux/serial.h> 25 26 /* 27 * The type definitions. These are from Ted Ts'o's serial.h 28 * By historical reasons the values from 0 to 13 are defined 29 * in the include/uapi/linux/serial.h, do not define them here. 30 */ 31 #define PORT_NS16550A 14 32 #define PORT_XSCALE 15 33 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 34 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 35 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 36 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */ 37 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */ 38 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */ 39 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */ 40 #define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */ 41 #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */ 42 #define PORT_BRCM_TRUMANAGE 25 43 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */ 44 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */ 45 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */ 46 #define PORT_RT2880 29 /* Ralink RT2880 internal UART */ 47 #define PORT_16550A_FSL64 30 /* Freescale 16550 UART with 64 FIFOs */ 48 49 /* 50 * ARM specific type numbers. These are not currently guaranteed 51 * to be implemented, and will change in the future. These are 52 * separate so any additions to the old serial.c that occur before 53 * we are merged can be easily merged here. 54 */ 55 #define PORT_PXA 31 56 #define PORT_AMBA 32 57 #define PORT_CLPS711X 33 58 #define PORT_SA1100 34 59 #define PORT_UART00 35 60 #define PORT_OWL 36 61 #define PORT_21285 37 62 63 /* Sparc type numbers. */ 64 #define PORT_SUNZILOG 38 65 #define PORT_SUNSAB 39 66 67 /* Nuvoton UART */ 68 #define PORT_NPCM 40 69 70 /* NVIDIA Tegra Combined UART */ 71 #define PORT_TEGRA_TCU 41 72 73 /* ASPEED AST2x00 virtual UART */ 74 #define PORT_ASPEED_VUART 42 75 76 /* Intel EG20 */ 77 #define PORT_PCH_8LINE 44 78 #define PORT_PCH_2LINE 45 79 80 /* DEC */ 81 #define PORT_DZ 46 82 #define PORT_ZS 47 83 84 /* Parisc type numbers. */ 85 #define PORT_MUX 48 86 87 /* Atmel AT91 SoC */ 88 #define PORT_ATMEL 49 89 90 /* Macintosh Zilog type numbers */ 91 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 92 #define PORT_PMAC_ZILOG 51 93 94 /* SH-SCI */ 95 #define PORT_SCI 52 96 #define PORT_SCIF 53 97 #define PORT_IRDA 54 98 99 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 100 #define PORT_IP22ZILOG 56 101 102 /* PPC CPM type number */ 103 #define PORT_CPM 58 104 105 /* MPC52xx (and MPC512x) type numbers */ 106 #define PORT_MPC52xx 59 107 108 /* IBM icom */ 109 #define PORT_ICOM 60 110 111 /* Motorola i.MX SoC */ 112 #define PORT_IMX 62 113 114 /* TXX9 type number */ 115 #define PORT_TXX9 64 116 117 /*Digi jsm */ 118 #define PORT_JSM 69 119 120 /* SUN4V Hypervisor Console */ 121 #define PORT_SUNHV 72 122 123 /* Xilinx uartlite */ 124 #define PORT_UARTLITE 74 125 126 /* Broadcom BCM7271 UART */ 127 #define PORT_BCM7271 76 128 129 /* Broadcom SB1250, etc. SOC */ 130 #define PORT_SB1250_DUART 77 131 132 /* Freescale ColdFire */ 133 #define PORT_MCF 78 134 135 #define PORT_SC26XX 82 136 137 /* SH-SCI */ 138 #define PORT_SCIFA 83 139 140 #define PORT_S3C6400 84 141 142 /* MAX3100 */ 143 #define PORT_MAX3100 86 144 145 /* Timberdale UART */ 146 #define PORT_TIMBUART 87 147 148 /* Qualcomm MSM SoCs */ 149 #define PORT_MSM 88 150 151 /* BCM63xx family SoCs */ 152 #define PORT_BCM63XX 89 153 154 /* Aeroflex Gaisler GRLIB APBUART */ 155 #define PORT_APBUART 90 156 157 /* Altera UARTs */ 158 #define PORT_ALTERA_JTAGUART 91 159 #define PORT_ALTERA_UART 92 160 161 /* SH-SCI */ 162 #define PORT_SCIFB 93 163 164 /* MAX310X */ 165 #define PORT_MAX310X 94 166 167 /* TI DA8xx/66AK2x */ 168 #define PORT_DA830 95 169 170 /* TI OMAP-UART */ 171 #define PORT_OMAP 96 172 173 /* VIA VT8500 SoC */ 174 #define PORT_VT8500 97 175 176 /* Cadence (Xilinx Zynq) UART */ 177 #define PORT_XUARTPS 98 178 179 /* Atheros AR933X SoC */ 180 #define PORT_AR933X 99 181 182 /* MCHP 16550A UART with 256 byte FIFOs */ 183 #define PORT_MCHP16550A 100 184 185 /* ARC (Synopsys) on-chip UART */ 186 #define PORT_ARC 101 187 188 /* Rocketport EXPRESS/INFINITY */ 189 #define PORT_RP2 102 190 191 /* Freescale lpuart */ 192 #define PORT_LPUART 103 193 194 /* SH-SCI */ 195 #define PORT_HSCIF 104 196 197 /* ST ASC type numbers */ 198 #define PORT_ASC 105 199 200 /* MEN 16z135 UART */ 201 #define PORT_MEN_Z135 107 202 203 /* SC16IS7xx */ 204 #define PORT_SC16IS7XX 108 205 206 /* MESON */ 207 #define PORT_MESON 109 208 209 /* Conexant Digicolor */ 210 #define PORT_DIGICOLOR 110 211 212 /* SPRD SERIAL */ 213 #define PORT_SPRD 111 214 215 /* STM32 USART */ 216 #define PORT_STM32 113 217 218 /* MVEBU UART */ 219 #define PORT_MVEBU 114 220 221 /* Microchip PIC32 UART */ 222 #define PORT_PIC32 115 223 224 /* MPS2 UART */ 225 #define PORT_MPS2UART 116 226 227 /* MediaTek BTIF */ 228 #define PORT_MTK_BTIF 117 229 230 /* RDA UART */ 231 #define PORT_RDA 118 232 233 /* Socionext Milbeaut UART */ 234 #define PORT_MLB_USIO 119 235 236 /* SiFive UART */ 237 #define PORT_SIFIVE_V0 120 238 239 /* Sunix UART */ 240 #define PORT_SUNIX 121 241 242 /* Freescale LINFlexD UART */ 243 #define PORT_LINFLEXUART 122 244 245 /* Sunplus UART */ 246 #define PORT_SUNPLUS 123 247 248 #endif /* _UAPILINUX_SERIAL_CORE_H */ 249