xref: /openbmc/linux/include/uapi/linux/serial.h (revision 6dd07781)
1 /* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */
2 /*
3  * include/linux/serial.h
4  *
5  * Copyright (C) 1992 by Theodore Ts'o.
6  *
7  * Redistribution of this file is permitted under the terms of the GNU
8  * Public License (GPL)
9  */
10 
11 #ifndef _UAPI_LINUX_SERIAL_H
12 #define _UAPI_LINUX_SERIAL_H
13 
14 #include <linux/types.h>
15 
16 #include <linux/tty_flags.h>
17 
18 
19 struct serial_struct {
20 	int	type;
21 	int	line;
22 	unsigned int	port;
23 	int	irq;
24 	int	flags;
25 	int	xmit_fifo_size;
26 	int	custom_divisor;
27 	int	baud_base;
28 	unsigned short	close_delay;
29 	char	io_type;
30 	char	reserved_char[1];
31 	int	hub6;
32 	unsigned short	closing_wait; /* time to wait before closing */
33 	unsigned short	closing_wait2; /* no longer used... */
34 	unsigned char	*iomem_base;
35 	unsigned short	iomem_reg_shift;
36 	unsigned int	port_high;
37 	unsigned long	iomap_base;	/* cookie passed into ioremap */
38 };
39 
40 /*
41  * For the close wait times, 0 means wait forever for serial port to
42  * flush its output.  65535 means don't wait at all.
43  */
44 #define ASYNC_CLOSING_WAIT_INF	0
45 #define ASYNC_CLOSING_WAIT_NONE	65535
46 
47 /*
48  * These are the supported serial types.
49  */
50 #define PORT_UNKNOWN	0
51 #define PORT_8250	1
52 #define PORT_16450	2
53 #define PORT_16550	3
54 #define PORT_16550A	4
55 #define PORT_CIRRUS     5
56 #define PORT_16650	6
57 #define PORT_16650V2	7
58 #define PORT_16750	8
59 #define PORT_STARTECH	9
60 #define PORT_16C950	10	/* Oxford Semiconductor */
61 #define PORT_16654	11
62 #define PORT_16850	12
63 #define PORT_RSA	13	/* RSA-DV II/S card */
64 #define PORT_MAX	13
65 
66 #define SERIAL_IO_PORT	0
67 #define SERIAL_IO_HUB6	1
68 #define SERIAL_IO_MEM	2
69 #define SERIAL_IO_MEM32	  3
70 #define SERIAL_IO_AU	  4
71 #define SERIAL_IO_TSI	  5
72 #define SERIAL_IO_MEM32BE 6
73 #define SERIAL_IO_MEM16	7
74 
75 #define UART_CLEAR_FIFO		0x01
76 #define UART_USE_FIFO		0x02
77 #define UART_STARTECH		0x04
78 #define UART_NATSEMI		0x08
79 
80 
81 /*
82  * Multiport serial configuration structure --- external structure
83  */
84 struct serial_multiport_struct {
85 	int		irq;
86 	int		port1;
87 	unsigned char	mask1, match1;
88 	int		port2;
89 	unsigned char	mask2, match2;
90 	int		port3;
91 	unsigned char	mask3, match3;
92 	int		port4;
93 	unsigned char	mask4, match4;
94 	int		port_monitor;
95 	int	reserved[32];
96 };
97 
98 /*
99  * Serial input interrupt line counters -- external structure
100  * Four lines can interrupt: CTS, DSR, RI, DCD
101  */
102 struct serial_icounter_struct {
103 	int cts, dsr, rng, dcd;
104 	int rx, tx;
105 	int frame, overrun, parity, brk;
106 	int buf_overrun;
107 	int reserved[9];
108 };
109 
110 /**
111  * struct serial_rs485 - serial interface for controlling RS485 settings.
112  * @flags:			RS485 feature flags.
113  * @delay_rts_before_send:	Delay before send (milliseconds).
114  * @delay_rts_after_send:	Delay after send (milliseconds).
115  * @addr_recv:			Receive filter for RS485 addressing mode
116  *				(used only when %SER_RS485_ADDR_RECV is set).
117  * @addr_dest:			Destination address for RS485 addressing mode
118  *				(used only when %SER_RS485_ADDR_DEST is set).
119  * @padding0:			Padding (set to zero).
120  * @padding1:			Padding (set to zero).
121  * @padding:			Deprecated, use @padding0 and @padding1 instead.
122  *				Do not use with @addr_recv and @addr_dest (due to
123  *				overlap).
124  *
125  * Serial interface for controlling RS485 settings on chips with suitable
126  * support. Set with TIOCSRS485 and get with TIOCGRS485 if supported by your
127  * platform. The set function returns the new state, with any unsupported bits
128  * reverted appropriately.
129  *
130  * The flag bits are:
131  *
132  * * %SER_RS485_ENABLED		- RS485 enabled.
133  * * %SER_RS485_RTS_ON_SEND	- Logical level for RTS pin when sending.
134  * * %SER_RS485_RTS_AFTER_SEND	- Logical level for RTS pin after sent.
135  * * %SER_RS485_RX_DURING_TX	- Full-duplex RS485 line.
136  * * %SER_RS485_TERMINATE_BUS	- Enable bus termination (if supported).
137  * * %SER_RS485_ADDRB		- Enable RS485 addressing mode.
138  * * %SER_RS485_ADDR_RECV - Receive address filter (enables @addr_recv). Requires %SER_RS485_ADDRB.
139  * * %SER_RS485_ADDR_DEST - Destination address (enables @addr_dest). Requires %SER_RS485_ADDRB.
140  */
141 struct serial_rs485 {
142 	__u32	flags;
143 #define SER_RS485_ENABLED		(1 << 0)
144 #define SER_RS485_RTS_ON_SEND		(1 << 1)
145 #define SER_RS485_RTS_AFTER_SEND	(1 << 2)
146 #define SER_RS485_RX_DURING_TX		(1 << 4)
147 #define SER_RS485_TERMINATE_BUS		(1 << 5)
148 #define SER_RS485_ADDRB			(1 << 6)
149 #define SER_RS485_ADDR_RECV		(1 << 7)
150 #define SER_RS485_ADDR_DEST		(1 << 8)
151 
152 	__u32	delay_rts_before_send;
153 	__u32	delay_rts_after_send;
154 
155 	/* The fields below are defined by flags */
156 	union {
157 		__u32	padding[5];		/* Memory is cheap, new structs are a pain */
158 
159 		struct {
160 			__u8	addr_recv;
161 			__u8	addr_dest;
162 			__u8	padding0[2];
163 			__u32	padding1[4];
164 		};
165 	};
166 };
167 
168 /*
169  * Serial interface for controlling ISO7816 settings on chips with suitable
170  * support. Set with TIOCSISO7816 and get with TIOCGISO7816 if supported by
171  * your platform.
172  */
173 struct serial_iso7816 {
174 	__u32	flags;			/* ISO7816 feature flags */
175 #define SER_ISO7816_ENABLED		(1 << 0)
176 #define SER_ISO7816_T_PARAM		(0x0f << 4)
177 #define SER_ISO7816_T(t)		(((t) & 0x0f) << 4)
178 	__u32	tg;
179 	__u32	sc_fi;
180 	__u32	sc_di;
181 	__u32	clk;
182 	__u32	reserved[5];
183 };
184 
185 #endif /* _UAPI_LINUX_SERIAL_H */
186