1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2015 Google, Inc
4 */
5
6 #include <common.h>
7 #include <debug_uart.h>
8 #include <dm.h>
9 #include <fdtdec.h>
10 #include <i2c.h>
11 #include <led.h>
12 #include <malloc.h>
13 #include <ram.h>
14 #include <spl.h>
15 #include <asm/gpio.h>
16 #include <asm/io.h>
17 #include <asm/arch/bootrom.h>
18 #include <asm/arch/clock.h>
19 #include <asm/arch/hardware.h>
20 #include <asm/arch/periph.h>
21 #include <asm/arch/pmu_rk3288.h>
22 #include <asm/arch/sdram.h>
23 #include <asm/arch/sdram_common.h>
24 #include <asm/arch/sys_proto.h>
25 #include <asm/arch/timer.h>
26 #include <dm/pinctrl.h>
27 #include <dm/root.h>
28 #include <dm/test.h>
29 #include <dm/util.h>
30 #include <power/regulator.h>
31 #include <power/rk8xx_pmic.h>
32
33 DECLARE_GLOBAL_DATA_PTR;
34
spl_boot_device(void)35 u32 spl_boot_device(void)
36 {
37 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
38 const void *blob = gd->fdt_blob;
39 struct udevice *dev;
40 const char *bootdev;
41 int node;
42 int ret;
43
44 bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
45 debug("Boot device %s\n", bootdev);
46 if (!bootdev)
47 goto fallback;
48
49 node = fdt_path_offset(blob, bootdev);
50 if (node < 0) {
51 debug("node=%d\n", node);
52 goto fallback;
53 }
54 ret = device_get_global_by_ofnode(offset_to_ofnode(node), &dev);
55 if (ret) {
56 debug("device at node %s/%d not found: %d\n", bootdev, node,
57 ret);
58 goto fallback;
59 }
60 debug("Found device %s\n", dev->name);
61 switch (device_get_uclass_id(dev)) {
62 case UCLASS_SPI_FLASH:
63 return BOOT_DEVICE_SPI;
64 case UCLASS_MMC:
65 return BOOT_DEVICE_MMC1;
66 default:
67 debug("Booting from device uclass '%s' not supported\n",
68 dev_get_uclass_name(dev));
69 }
70
71 fallback:
72 #elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
73 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
74 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
75 defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY)
76 return BOOT_DEVICE_SPI;
77 #endif
78 return BOOT_DEVICE_MMC1;
79 }
80
81 #if !defined(CONFIG_SPL_OF_PLATDATA)
phycore_init(void)82 static int phycore_init(void)
83 {
84 struct udevice *pmic;
85 int ret;
86
87 ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
88 if (ret)
89 return ret;
90
91 #if defined(CONFIG_SPL_POWER_SUPPORT)
92 /* Increase USB input current to 2A */
93 ret = rk818_spl_configure_usb_input_current(pmic, 2000);
94 if (ret)
95 return ret;
96
97 /* Close charger when USB lower then 3.26V */
98 ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
99 if (ret)
100 return ret;
101 #endif
102
103 return 0;
104 }
105 #endif
106
board_init_f(ulong dummy)107 void board_init_f(ulong dummy)
108 {
109 struct udevice *dev;
110 int ret;
111
112 /* Example code showing how to enable the debug UART on RK3288 */
113 #include <asm/arch/grf_rk3288.h>
114 /* Enable early UART on the RK3288 */
115 #define GRF_BASE 0xff770000
116 struct rk3288_grf * const grf = (void *)GRF_BASE;
117
118 rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
119 GPIO7C6_MASK << GPIO7C6_SHIFT,
120 GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
121 GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
122 /*
123 * Debug UART can be used from here if required:
124 *
125 * debug_uart_init();
126 * printch('a');
127 * printhex8(0x1234);
128 * printascii("string");
129 */
130 debug_uart_init();
131 debug("\nspl:debug uart enabled in %s\n", __func__);
132 ret = spl_early_init();
133 if (ret) {
134 debug("spl_early_init() failed: %d\n", ret);
135 hang();
136 }
137
138 rockchip_timer_init();
139 configure_l2ctlr();
140
141 ret = rockchip_get_clk(&dev);
142 if (ret) {
143 debug("CLK init failed: %d\n", ret);
144 return;
145 }
146
147 #if !defined(CONFIG_SPL_OF_PLATDATA)
148 if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
149 ret = phycore_init();
150 if (ret) {
151 debug("Failed to set up phycore power settings: %d\n",
152 ret);
153 return;
154 }
155 }
156 #endif
157
158 #if !defined(CONFIG_SUPPORT_TPL)
159 debug("\nspl:init dram\n");
160 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
161 if (ret) {
162 debug("DRAM init failed: %d\n", ret);
163 return;
164 }
165 #endif
166
167 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
168 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
169 #endif
170 }
171
setup_led(void)172 static int setup_led(void)
173 {
174 #ifdef CONFIG_SPL_LED
175 struct udevice *dev;
176 char *led_name;
177 int ret;
178
179 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
180 if (!led_name)
181 return 0;
182 ret = led_get_by_label(led_name, &dev);
183 if (ret) {
184 debug("%s: get=%d\n", __func__, ret);
185 return ret;
186 }
187 ret = led_set_on(dev, 1);
188 if (ret)
189 return ret;
190 #endif
191
192 return 0;
193 }
194
spl_board_init(void)195 void spl_board_init(void)
196 {
197 int ret;
198
199 ret = setup_led();
200 if (ret) {
201 debug("LED ret=%d\n", ret);
202 hang();
203 }
204
205 preloader_console_init();
206 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
207 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
208 #endif
209 return;
210 }
211
212 #ifdef CONFIG_SPL_OS_BOOT
213
214 #define PMU_BASE 0xff730000
dram_init_banksize(void)215 int dram_init_banksize(void)
216 {
217 struct rk3288_pmu *const pmu = (void *)PMU_BASE;
218 size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
219
220 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
221 gd->bd->bi_dram[0].size = size;
222
223 return 0;
224 }
225 #endif
226