1 /* SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later */ 2 #ifndef STATE_SET_H 3 #define STATE_SET_H 4 5 #ifdef __cplusplus 6 extern "C" { 7 #endif 8 9 /** @brief PLDM State Set IDs in DSP0249_1.1.0 specification 10 */ 11 enum pldm_state_set_ids { 12 13 /* Table 1 - General State Sets */ 14 PLDM_STATE_SET_HEALTH_STATE = 1, 15 PLDM_STATE_SET_AVAILABILITY = 2, 16 PLDM_STATE_SET_PREDICTIVE_CONDITION = 3, 17 PLDM_STATE_SET_REDUNDANCY_STATUS = 4, 18 PLDM_STATE_SET_HEALTH_REDUNDANCY_TREND = 5, 19 PLDM_STATE_SET_GROUP_RESOURCE_LEVEL = 6, 20 PLDM_STATE_SET_REDUNDANCY_ENTITY_ROLE = 7, 21 PLDM_STATE_SET_OPERATIONAL_STATUS = 8, 22 PLDM_STATE_SET_OPERATIONAL_STRESS_STATUS = 9, 23 PLDM_STATE_SET_OPERATIONAL_FAULT_STATUS = 10, 24 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS = 11, 25 PLDM_STATE_SET_OPERATIONAL_CONNECTION_STATUS = 12, 26 PLDM_STATE_SET_PRESENCE = 13, 27 PLDM_STATE_SET_PERFORMANCE = 14, 28 PLDM_STATE_SET_CONFIGURATION_STATE = 15, 29 PLDM_STATE_SET_CHANGED_CONFIGURATION = 16, 30 PLDM_STATE_SET_IDENTIFY_STATE = 17, 31 PLDM_STATE_SET_VERSION = 18, 32 PLDM_STATE_SET_ALARM_STATE = 19, 33 PLDM_STATE_SET_DEVICE_INITIALIZATION = 20, 34 PLDM_STATE_SET_THERMAL_TRIP = 21, 35 36 /* Table 2 - Communication State Sets */ 37 PLDM_STATE_SET_HEARTBEAT = 32, 38 PLDM_STATE_SET_LINK_STATE = 33, 39 40 /* Table 3 - General Sensor State Sets */ 41 PLDM_STATE_SET_SMOKE_STATE = 64, 42 PLDM_STATE_SET_HUMIDITY_STATE = 65, 43 PLDM_STATE_SET_DOOR_STATE = 66, 44 PLDM_STATE_SET_SWITCH_STATE = 67, 45 PLDM_STATE_SET_DEVICE_FILE = 68, 46 47 /* Table 4 - Security-Related State Sets */ 48 PLDM_STATE_SET_LOCK_STATE = 96, 49 PLDM_STATE_SET_PHYSICAL_SECURITY = 97, 50 PLDM_STATE_SET_DOCK_AUTHORIZATION = 98, 51 PLDM_STATE_SET_HW_SECURITY = 99, 52 PLDM_STATE_SET_PHYSICAL_COMM_CONNECTION = 100, 53 PLDM_STATE_SET_COMM_LEASH_STATUS = 101, 54 PLDM_STATE_SET_FOREIGN_NW_DETECTION_STATUS = 102, 55 PLDM_STATE_SET_PASSWORD_PROTECTED_ACCESS_SECURITY = 103, 56 PLDM_STATE_SET_SECURITY_ACCESS_PRIVILEGE_LEVEL = 104, 57 PLDM_STATE_SET_SESSION_AUDIT = 105, 58 PLDM_STATE_SET_SUPPLY_VOLTAGE_GLITCH_DETECTION_SENSOR = 106, 59 PLDM_STATE_SET_CLOCK_GLITCH_DETECTION_SENSOR = 107, 60 PLDM_STATE_SET_SIGNAL_GLITCH_DETECTION_SENSOR = 108, 61 PLDM_STATE_SET_TEMPERATURE_GLITCH_DETECTION_SENSOR = 109, 62 63 /* Table 5 - Software-Related State Sets */ 64 PLDM_STATE_SET_SW_TERMINATION_STATUS = 129, 65 66 /* Table 6 - Redundant Storage Media (RAID) State Sets */ 67 PLDM_STATE_SET_STORAGE_MEDIA_ACTIVITY = 160, 68 69 /* Table 7 - Boot-Related State Sets */ 70 PLDM_STATE_SET_BOOT_RESTART_CAUSE = 192, 71 PLDM_STATE_SET_BOOT_RESTART_REQUEST = 193, 72 PLDM_STATE_SET_ENTITY_BOOT_STATUS = 194, 73 PLDM_STATE_SET_BOOT_ERROR_STATUS = 195, 74 PLDM_STATE_SET_BOOT_PROGRESS = 196, 75 PLDM_STATE_SET_SYS_FIRMWARE_HANG = 197, 76 PLDM_STATE_SET_POST_ERRORS = 198, 77 PLDM_STATE_SET_EMBEDDED_PROCESSOR_OS_STATES = 199, 78 79 /* Table 8 - Monitored System-Related State Sets */ 80 PLDM_STATE_SET_LOG_FILL_STATUS = 225, 81 PLDM_STATE_SET_LOG_FILTER_STATUS = 226, 82 PLDM_STATE_SET_LOG_TIMESTAMP_CHANGE = 227, 83 PLDM_STATE_SET_INTERRUPT_REQUESTED = 228, 84 PLDM_STATE_SET_INTERRUPT_RECEIVED = 229, 85 PLDM_STATE_SET_DIAGNOSTIC_INTERRUPT_REQUESTED = 230, 86 PLDM_STATE_SET_DIAGNOSTIC_INTERRUPT_RECEIVED = 231, 87 PLDM_STATE_SET_IO_CHANNEL_CHECK_NMI_REQUESTED = 232, 88 PLDM_STATE_SET_IO_CHANNEL_CHECK_NMI_RECEIVED = 233, 89 PLDM_STATE_SET_FATAL_NMI_REQUESTED = 234, 90 PLDM_STATE_SET_FATAL_NMI_RECEIVED = 235, 91 PLDM_STATE_SET_SOFTWARE_NMI_REQUESTED = 236, 92 PLDM_STATE_SET_SOFTWARE_NMI_RECEIVED = 237, 93 PLDM_STATE_SET_SMI_REQUESTED = 238, 94 PLDM_STATE_SET_SMI_RECEIVED = 238, 95 PLDM_STATE_SET_PCI_PERR_REQUESTED = 239, 96 PLDM_STATE_SET_PCI_PERR_RECEIVED = 240, 97 PLDM_STATE_SET_PCI_SERR_REQUESTED = 241, 98 PLDM_STATE_SET_PCI_SERR_RECEIVED = 242, 99 PLDM_STATE_SET_BUS_ERROR_STATUS = 243, 100 PLDM_STATE_SET_WATCHDOG_STATUS = 244, 101 102 /* Table 9 - Power-Related State Sets */ 103 PLDM_STATE_SET_POWER_SUPPLY_STATE = 256, 104 PLDM_STATE_SET_DEVICE_POWER_STATE = 257, 105 PLDM_STATE_SET_ACPI_POWER_STATE = 258, 106 PLDM_STATE_SET_BACKUP_POWER_SOURCE = 259, 107 PLDM_STATE_SET_SYSTEM_POWER_STATE = 260, 108 PLDM_STATE_SET_BATTERY_ACTIVITY = 261, 109 PLDM_STATE_SET_BATTERY_STATE = 262, 110 111 /* Table 10 - Processor-Related State Sets */ 112 PLDM_STATE_SET_PROC_POWER_STATE = 288, 113 PLDM_STATE_SET_POWER_PERFORMANCE_STATE = 289, 114 PLDM_STATE_SET_PROC_ERROR_STATUS = 290, 115 PLDM_STATE_SET_BIST_FAILURE_STATUS = 291, 116 PLDM_STATE_SET_IBIST_FAILURE_STATUS = 292, 117 PLDM_STATE_SET_PROC_HANG_IN_POST = 293, 118 PLDM_STATE_SET_PROC_STARTUP_FAILURE = 294, 119 PLDM_STATE_SET_UNCORRECTABLE_CPU_ERROR = 295, 120 PLDM_STATE_SET_MACHINE_CHECK_ERROR = 296, 121 PLDM_STATE_SET_CORRECTED_MACHINE_CHECK = 297, 122 123 /* Table 11 - Memory-Related State Sets */ 124 PLDM_STATE_SET_CACHE_STATUS = 320, 125 PLDM_STATE_SET_MEMORY_ERROR_STATUS = 321, 126 PLDM_STATE_SET_REDUNDANT_MEMORY_ACTIVITY_STATUS = 322, 127 128 /* Table 12 - Storage Device State Sets */ 129 PLDM_STATE_SET_ERROR_DETECTION_STATUS = 330, 130 PLDM_STATE_SET_STUCK_BIT_STATUS = 331, 131 PLDM_STATE_SET_SCRUB_STATUS = 332, 132 133 /* Table 13 - Slot/Module State Sets */ 134 PLDM_STATE_SET_SLOT_OCCUPANCY = 352, 135 PLDM_STATE_SET_SLOT_STATE = 353, 136 }; 137 138 /* @brief List of states for the Health State state set (ID 1). 139 */ 140 enum pldm_state_set_health_state_values { 141 PLDM_STATE_SET_HEALTH_STATE_NORMAL = 1, 142 PLDM_STATE_SET_HEALTH_STATE_NON_CRITICAL = 2, 143 PLDM_STATE_SET_HEALTH_STATE_CRITICAL = 3, 144 PLDM_STATE_SET_HEALTH_STATE_FATAL = 4, 145 PLDM_STATE_SET_HEALTH_STATE_UPPER_NON_CRITICAL = 5, 146 PLDM_STATE_SET_HEALTH_STATE_LOWER_NON_CRITICAL = 6, 147 PLDM_STATE_SET_HEALTH_STATE_UPPER_CRITICAL = 7, 148 PLDM_STATE_SET_HEALTH_STATE_LOWER_CRITICAL = 8, 149 PLDM_STATE_SET_HEALTH_STATE_UPPER_FATAL = 9, 150 PLDM_STATE_SET_HEALTH_STATE_LOWER_FATAL = 10, 151 }; 152 153 /* @brief List of states for the State Set Availability (ID 2), 154 */ 155 enum pldm_state_set_availability_values { 156 PLDM_STATE_SET_AVAILABILITY_REBOOTING = 8 157 }; 158 159 /* @brief List of states for the Operational Stress status (ID 9). 160 */ 161 enum pldm_state_set_operational_stress_status_values { 162 PLDM_STATE_SET_OPERATIONAL_STRESS_STATUS_NORMAL = 1, 163 PLDM_STATE_SET_OPERATIONAL_STRESS_STATUS_STRESSED = 2, 164 }; 165 /* @brief List of states for Operational Fault status (ID 10). 166 */ 167 enum pldm_state_set_operational_fault_status_values { 168 PLDM_STATE_SET_OPERATIONAL_FAULT_STATUS_NORMAL = 1, 169 PLDM_STATE_SET_OPERATIONAL_FAULT_STATUS_ERROR = 2, 170 PLDM_STATE_SET_OPERATIONAL_FAULT_STATUS_NON_RECOVERABLE_ERROR = 3, 171 }; 172 173 /* @brief List of states for the Operational Running Status state set (ID 11). 174 */ 175 enum pldm_state_set_operational_running_status_values { 176 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_STARTING = 1, 177 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_STOPPING = 2, 178 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_STOPPED = 3, 179 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_IN_SERVICE = 4, 180 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_ABORTED = 5, 181 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_DORMANT = 6 182 }; 183 184 /* @brief List of states for the Set Identify state (ID 17). 185 */ 186 enum pldm_state_set_identify_state_values { 187 PLDM_STATE_SET_IDENTIFY_STATE_UNASSERTED = 1, 188 PLDM_STATE_SET_IDENTIFY_STATE_ASSERTED = 2, 189 }; 190 191 /* @brief List of states for the Set Thermal Trip state set (ID 21). 192 */ 193 enum pldm_state_set_thermal_trip_values { 194 PLDM_STATE_SET_THERMAL_TRIP_STATUS_NORMAL = 1, 195 PLDM_STATE_SET_THERMAL_TRIP_STATUS_THERMAL_TRIP = 2, 196 }; 197 198 /* @brief List of states for the Set Link state (ID 33). 199 */ 200 enum pldm_state_set_link_state_values { 201 PLDM_STATE_SET_LINK_STATE_CONNECTED = 1, 202 PLDM_STATE_SET_LINK_STATE_DISCONNECTED = 2, 203 }; 204 205 /* @brief List of states for the Software-related state set (ID 129). 206 */ 207 enum pldm_software_termination_status_values { 208 PLDM_SW_TERM_NORMAL = 1, 209 PLDM_SW_TERM_SOFTWARE_TERMINATION_DETECTED = 2, 210 PLDM_SW_TERM_CRITICAL_STOP_DURING_LOAD_INITIALIZATION = 3, 211 PLDM_SW_TERM_RUN_TIME_CRITICAL_STOP = 4, 212 PLDM_SW_TERM_GRACEFUL_SHUTDOWN_REQUESTED = 5, 213 PLDM_SW_TERM_GRACEFUL_RESTART_REQUESTED = 6, 214 PLDM_SW_TERM_GRACEFUL_SHUTDOWN = 7, 215 PLDM_SW_TERM_TERMINATION_REQUEST_FAILED = 8, 216 }; 217 218 /* @brief List of states for the Boot Restart Cause state set (ID 192). 219 */ 220 enum pldm_state_set_boot_restart_cause_values { 221 PLDM_STATE_SET_BOOT_RESTART_CAUSE_POWERED_UP = 1, 222 PLDM_STATE_SET_BOOT_RESTART_CAUSE_HARD_RESET = 2, 223 PLDM_STATE_SET_BOOT_RESTART_CAUSE_WARM_RESET = 3, 224 PLDM_STATE_SET_BOOT_RESTART_CAUSE_MANUAL_HARD_RESET = 4, 225 PLDM_STATE_SET_BOOT_RESTART_CAUSE_MANUAL_WARM_RESET = 5, 226 PLDM_STATE_SET_BOOT_RESTART_CAUSE_SYSTEM_RESTART = 6, 227 PLDM_STATE_SET_BOOT_RESTART_CAUSE_WATCHDOG_TIMEOUT = 7 228 }; 229 230 /* @brief List of states for the Boot Progress state set (ID 196). 231 */ 232 enum pldm_state_set_boot_progress_state_values { 233 PLDM_STATE_SET_BOOT_PROG_STATE_NOT_ACTIVE = 1, 234 PLDM_STATE_SET_BOOT_PROG_STATE_COMPLETED = 2, 235 PLDM_STATE_SET_BOOT_PROG_STATE_MEM_INITIALIZATION = 3, 236 PLDM_STATE_SET_BOOT_PROG_STATE_SEC_PROC_INITIALIZATION = 5, 237 PLDM_STATE_SET_BOOT_PROG_STATE_PCI_RESORUCE_CONFIG = 9, 238 PLDM_STATE_SET_BOOT_PROG_STATE_OSSTART = 20, 239 PLDM_STATE_SET_BOOT_PROG_STATE_STARTING_OP_SYS = 21, 240 PLDM_STATE_SET_BOOT_PROG_STATE_BASE_BOARD_INITIALIZATION = 22, 241 PLDM_STATE_SET_BOOT_PROG_STATE_PRIMARY_PROC_INITIALIZATION = 26, 242 }; 243 244 /* @brief List of states for the System Power State set (ID 260). 245 */ 246 enum pldm_state_set_system_power_state_values { 247 PLDM_STATE_SET_SYS_POWER_STATE_ON = 1, 248 PLDM_STATE_SET_SYS_POWER_STATE_HIBERNATE = 2, 249 PLDM_STATE_SET_SYS_POWER_STATE_SLEEP_LIGHT = 3, 250 PLDM_STATE_SET_SYS_POWER_STATE_SLEEP_DEEP = 4, 251 PLDM_STATE_SET_SYS_POWER_CYCLE_SOFT = 5, 252 PLDM_STATE_SET_SYS_POWER_CYCLE_HARD = 6, 253 PLDM_STATE_SET_SYS_POWER_CYCLE_OFF_SOFT_GRACEFUL = 7, 254 PLDM_STATE_SET_SYS_POWER_CYCLE_OFF_HARD_GRACEFUL = 8, 255 PLDM_STATE_SET_SYS_POWER_STATE_OFF_SOFT_GRACEFUL = 9, 256 PLDM_STATE_SET_SYS_POWER_STATE_OFF_HARD_GRACEFUL = 10, 257 PLDM_STATE_SET_SYS_POWER_STATE_MASTER_BUS_RESET = 11, 258 PLDM_STATE_SET_SYS_POWER_STATE_MASTER_BUS_RESET_GRACEFUL = 12, 259 PLDM_STATE_SET_SYS_POWER_STATE_NMI = 13, 260 }; 261 262 /* @brief List of states for Device Power State set (ID 257). 263 */ 264 enum pldm_state_set_device_power_state_values { 265 PLDM_STATE_SET_ACPI_DEVICE_POWER_STATE_UNKNOWN = 0, 266 PLDM_STATE_SET_ACPI_DEVICE_POWER_STATE_FULLY_ON = 1, 267 PLDM_STATE_SET_ACPI_DEVICE_POWER_STATE_INTERMEDIATE_1 = 2, 268 PLDM_STATE_SET_ACPI_DEVICE_POWER_STATE_INTERMEDIATE_2 = 3, 269 PLDM_STATE_SET_ACPI_DEVICE_POWER_STATE_OFF = 4, 270 }; 271 272 /* OEM ranges */ 273 #define PLDM_OEM_STATE_SET_ID_START 32768 274 #define PLDM_OEM_STATE_SET_ID_END 65535 275 276 #ifdef __cplusplus 277 } 278 #endif 279 280 #endif /* STATE_SET_H */ 281