1 /* SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later */ 2 #ifndef STATE_SET_H 3 #define STATE_SET_H 4 5 #ifdef __cplusplus 6 extern "C" { 7 #endif 8 9 /** @brief PLDM State Set IDs in DSP0249_1.1.0 specification 10 */ 11 enum pldm_state_set_ids { 12 13 /* Table 1 - General State Sets */ 14 PLDM_STATE_SET_HEALTH_STATE = 1, 15 PLDM_STATE_SET_AVAILABILITY = 2, 16 PLDM_STATE_SET_PREDICTIVE_CONDITION = 3, 17 PLDM_STATE_SET_REDUNDANCY_STATUS = 4, 18 PLDM_STATE_SET_HEALTH_REDUNDANCY_TREND = 5, 19 PLDM_STATE_SET_GROUP_RESOURCE_LEVEL = 6, 20 PLDM_STATE_SET_REDUNDANCY_ENTITY_ROLE = 7, 21 PLDM_STATE_SET_OPERATIONAL_STATUS = 8, 22 PLDM_STATE_SET_OPERATIONAL_STRESS_STATUS = 9, 23 PLDM_STATE_SET_OPERATIONAL_FAULT_STATUS = 10, 24 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS = 11, 25 PLDM_STATE_SET_OPERATIONAL_CONNECTION_STATUS = 12, 26 PLDM_STATE_SET_PRESENCE = 13, 27 PLDM_STATE_SET_PERFORMANCE = 14, 28 PLDM_STATE_SET_CONFIGURATION_STATE = 15, 29 PLDM_STATE_SET_CHANGED_CONFIGURATION = 16, 30 PLDM_STATE_SET_IDENTIFY_STATE = 17, 31 PLDM_STATE_SET_VERSION = 18, 32 PLDM_STATE_SET_ALARM_STATE = 19, 33 PLDM_STATE_SET_DEVICE_INITIALIZATION = 20, 34 PLDM_STATE_SET_THERMAL_TRIP = 21, 35 PLDM_STATE_SET_LEAK_DETECTION = 22, 36 37 /* Table 2 - Communication State Sets */ 38 PLDM_STATE_SET_HEARTBEAT = 32, 39 PLDM_STATE_SET_LINK_STATE = 33, 40 41 /* Table 3 - General Sensor State Sets */ 42 PLDM_STATE_SET_SMOKE_STATE = 64, 43 PLDM_STATE_SET_HUMIDITY_STATE = 65, 44 PLDM_STATE_SET_DOOR_STATE = 66, 45 PLDM_STATE_SET_SWITCH_STATE = 67, 46 PLDM_STATE_SET_DEVICE_FILE = 68, 47 48 /* Table 4 - Security-Related State Sets */ 49 PLDM_STATE_SET_LOCK_STATE = 96, 50 PLDM_STATE_SET_PHYSICAL_SECURITY = 97, 51 PLDM_STATE_SET_DOCK_AUTHORIZATION = 98, 52 PLDM_STATE_SET_HW_SECURITY = 99, 53 PLDM_STATE_SET_PHYSICAL_COMM_CONNECTION = 100, 54 PLDM_STATE_SET_COMM_LEASH_STATUS = 101, 55 PLDM_STATE_SET_FOREIGN_NW_DETECTION_STATUS = 102, 56 PLDM_STATE_SET_PASSWORD_PROTECTED_ACCESS_SECURITY = 103, 57 PLDM_STATE_SET_SECURITY_ACCESS_PRIVILEGE_LEVEL = 104, 58 PLDM_STATE_SET_SESSION_AUDIT = 105, 59 PLDM_STATE_SET_SUPPLY_VOLTAGE_GLITCH_DETECTION_SENSOR = 106, 60 PLDM_STATE_SET_CLOCK_GLITCH_DETECTION_SENSOR = 107, 61 PLDM_STATE_SET_SIGNAL_GLITCH_DETECTION_SENSOR = 108, 62 PLDM_STATE_SET_TEMPERATURE_GLITCH_DETECTION_SENSOR = 109, 63 PLDM_STATE_SET_SUPPLY_VOLTAGE_GLITCH_DETECTION_CONFIGURABLE_SENSOR = 64 110, 65 PLDM_STATE_SET_CLOCK_GLITCH_DETECTION_CONFIGURABLE_SENSOR = 111, 66 PLDM_STATE_SET_SIGNAL_GLITCH_DETECTION_CONFIGURABLE_SENSOR = 112, 67 PLDM_STATE_SET_TEMPERATURE_GLITCH_DETECTION_CONFIGURABLE_SENSOR = 113, 68 69 /* Table 5 - Software-Related State Sets */ 70 PLDM_STATE_SET_SW_TERMINATION_STATUS = 129, 71 72 /* Table 6 - Redundant Storage Media (RAID) State Sets */ 73 PLDM_STATE_SET_STORAGE_MEDIA_ACTIVITY = 160, 74 75 /* Table 7 - Boot-Related State Sets */ 76 PLDM_STATE_SET_BOOT_RESTART_CAUSE = 192, 77 PLDM_STATE_SET_BOOT_RESTART_REQUEST = 193, 78 PLDM_STATE_SET_ENTITY_BOOT_STATUS = 194, 79 PLDM_STATE_SET_BOOT_ERROR_STATUS = 195, 80 PLDM_STATE_SET_BOOT_PROGRESS = 196, 81 PLDM_STATE_SET_SYS_FIRMWARE_HANG = 197, 82 PLDM_STATE_SET_POST_ERRORS = 198, 83 PLDM_STATE_SET_EMBEDDED_PROCESSOR_OS_STATES = 199, 84 85 /* Table 8 - Monitored System-Related State Sets */ 86 PLDM_STATE_SET_LOG_FILL_STATUS = 225, 87 PLDM_STATE_SET_LOG_FILTER_STATUS = 226, 88 PLDM_STATE_SET_LOG_TIMESTAMP_CHANGE = 227, 89 PLDM_STATE_SET_INTERRUPT_REQUESTED = 228, 90 PLDM_STATE_SET_INTERRUPT_RECEIVED = 229, 91 PLDM_STATE_SET_DIAGNOSTIC_INTERRUPT_REQUESTED = 230, 92 PLDM_STATE_SET_DIAGNOSTIC_INTERRUPT_RECEIVED = 231, 93 PLDM_STATE_SET_IO_CHANNEL_CHECK_NMI_REQUESTED = 232, 94 PLDM_STATE_SET_IO_CHANNEL_CHECK_NMI_RECEIVED = 233, 95 PLDM_STATE_SET_FATAL_NMI_REQUESTED = 234, 96 PLDM_STATE_SET_FATAL_NMI_RECEIVED = 235, 97 PLDM_STATE_SET_SOFTWARE_NMI_REQUESTED = 236, 98 PLDM_STATE_SET_SOFTWARE_NMI_RECEIVED = 237, 99 PLDM_STATE_SET_SMI_REQUESTED = 238, 100 PLDM_STATE_SET_SMI_RECEIVED = 238, 101 PLDM_STATE_SET_PCI_PERR_REQUESTED = 239, 102 PLDM_STATE_SET_PCI_PERR_RECEIVED = 240, 103 PLDM_STATE_SET_PCI_SERR_REQUESTED = 241, 104 PLDM_STATE_SET_PCI_SERR_RECEIVED = 242, 105 PLDM_STATE_SET_BUS_ERROR_STATUS = 243, 106 PLDM_STATE_SET_WATCHDOG_STATUS = 244, 107 PLDM_STATE_SET_CRASH_LOG_CONTROL_OWNERSHIP = 245, 108 PLDM_STATE_SET_CRASH_LOG_CONSUMED = 246, 109 110 /* Table 9 - Power-Related State Sets */ 111 PLDM_STATE_SET_POWER_SUPPLY_STATE = 256, 112 PLDM_STATE_SET_DEVICE_POWER_STATE = 257, 113 PLDM_STATE_SET_ACPI_POWER_STATE = 258, 114 PLDM_STATE_SET_BACKUP_POWER_SOURCE = 259, 115 PLDM_STATE_SET_SYSTEM_POWER_STATE = 260, 116 PLDM_STATE_SET_BATTERY_ACTIVITY = 261, 117 PLDM_STATE_SET_BATTERY_STATE = 262, 118 119 /* Table 10 - Processor-Related State Sets */ 120 PLDM_STATE_SET_PROC_POWER_STATE = 288, 121 PLDM_STATE_SET_POWER_PERFORMANCE_STATE = 289, 122 PLDM_STATE_SET_PROC_ERROR_STATUS = 290, 123 PLDM_STATE_SET_BIST_FAILURE_STATUS = 291, 124 PLDM_STATE_SET_IBIST_FAILURE_STATUS = 292, 125 PLDM_STATE_SET_PROC_HANG_IN_POST = 293, 126 PLDM_STATE_SET_PROC_STARTUP_FAILURE = 294, 127 PLDM_STATE_SET_UNCORRECTABLE_CPU_ERROR = 295, 128 PLDM_STATE_SET_MACHINE_CHECK_ERROR = 296, 129 PLDM_STATE_SET_CORRECTED_MACHINE_CHECK = 297, 130 131 /* Table 11 - Memory-Related State Sets */ 132 PLDM_STATE_SET_CACHE_STATUS = 320, 133 PLDM_STATE_SET_MEMORY_ERROR_STATUS = 321, 134 PLDM_STATE_SET_REDUNDANT_MEMORY_ACTIVITY_STATUS = 322, 135 136 /* Table 12 - Storage Device State Sets */ 137 PLDM_STATE_SET_ERROR_DETECTION_STATUS = 330, 138 PLDM_STATE_SET_STUCK_BIT_STATUS = 331, 139 PLDM_STATE_SET_SCRUB_STATUS = 332, 140 141 /* Table 13 - Slot/Module State Sets */ 142 PLDM_STATE_SET_SLOT_OCCUPANCY = 352, 143 PLDM_STATE_SET_SLOT_STATE = 353, 144 }; 145 146 /* @brief List of states for the Health State state set (ID 1). 147 */ 148 enum pldm_state_set_health_state_values { 149 PLDM_STATE_SET_HEALTH_STATE_NORMAL = 1, 150 PLDM_STATE_SET_HEALTH_STATE_NON_CRITICAL = 2, 151 PLDM_STATE_SET_HEALTH_STATE_CRITICAL = 3, 152 PLDM_STATE_SET_HEALTH_STATE_FATAL = 4, 153 PLDM_STATE_SET_HEALTH_STATE_UPPER_NON_CRITICAL = 5, 154 PLDM_STATE_SET_HEALTH_STATE_LOWER_NON_CRITICAL = 6, 155 PLDM_STATE_SET_HEALTH_STATE_UPPER_CRITICAL = 7, 156 PLDM_STATE_SET_HEALTH_STATE_LOWER_CRITICAL = 8, 157 PLDM_STATE_SET_HEALTH_STATE_UPPER_FATAL = 9, 158 PLDM_STATE_SET_HEALTH_STATE_LOWER_FATAL = 10, 159 }; 160 161 /* @brief List of states for the State Set Availability (ID 2), 162 */ 163 enum pldm_state_set_availability_values { 164 PLDM_STATE_SET_AVAILABILITY_REBOOTING = 8 165 }; 166 167 /* @brief List of states for the Operational Stress status (ID 9). 168 */ 169 enum pldm_state_set_operational_stress_status_values { 170 PLDM_STATE_SET_OPERATIONAL_STRESS_STATUS_NORMAL = 1, 171 PLDM_STATE_SET_OPERATIONAL_STRESS_STATUS_STRESSED = 2, 172 }; 173 /* @brief List of states for Operational Fault status (ID 10). 174 */ 175 enum pldm_state_set_operational_fault_status_values { 176 PLDM_STATE_SET_OPERATIONAL_FAULT_STATUS_NORMAL = 1, 177 PLDM_STATE_SET_OPERATIONAL_FAULT_STATUS_ERROR = 2, 178 PLDM_STATE_SET_OPERATIONAL_FAULT_STATUS_NON_RECOVERABLE_ERROR = 3, 179 }; 180 181 /* @brief List of states for the Operational Running Status state set (ID 11). 182 */ 183 enum pldm_state_set_operational_running_status_values { 184 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_STARTING = 1, 185 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_STOPPING = 2, 186 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_STOPPED = 3, 187 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_IN_SERVICE = 4, 188 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_ABORTED = 5, 189 PLDM_STATE_SET_OPERATIONAL_RUNNING_STATUS_DORMANT = 6 190 }; 191 192 /* @brief List of states for the Set Identify state (ID 17). 193 */ 194 enum pldm_state_set_identify_state_values { 195 PLDM_STATE_SET_IDENTIFY_STATE_UNASSERTED = 1, 196 PLDM_STATE_SET_IDENTIFY_STATE_ASSERTED = 2, 197 }; 198 199 /* @brief List of states for the Set Thermal Trip state set (ID 21). 200 */ 201 enum pldm_state_set_thermal_trip_values { 202 PLDM_STATE_SET_THERMAL_TRIP_STATUS_NORMAL = 1, 203 PLDM_STATE_SET_THERMAL_TRIP_STATUS_THERMAL_TRIP = 2, 204 }; 205 206 /* @brief List of states for the Set Link state (ID 33). 207 */ 208 enum pldm_state_set_link_state_values { 209 PLDM_STATE_SET_LINK_STATE_CONNECTED = 1, 210 PLDM_STATE_SET_LINK_STATE_DISCONNECTED = 2, 211 }; 212 213 /* @brief List of states for the Software-related state set (ID 129). 214 */ 215 enum pldm_software_termination_status_values { 216 PLDM_SW_TERM_NORMAL = 1, 217 PLDM_SW_TERM_SOFTWARE_TERMINATION_DETECTED = 2, 218 PLDM_SW_TERM_CRITICAL_STOP_DURING_LOAD_INITIALIZATION = 3, 219 PLDM_SW_TERM_RUN_TIME_CRITICAL_STOP = 4, 220 PLDM_SW_TERM_GRACEFUL_SHUTDOWN_REQUESTED = 5, 221 PLDM_SW_TERM_GRACEFUL_RESTART_REQUESTED = 6, 222 PLDM_SW_TERM_GRACEFUL_SHUTDOWN = 7, 223 PLDM_SW_TERM_TERMINATION_REQUEST_FAILED = 8, 224 }; 225 226 /* @brief List of states for the Boot Restart Cause state set (ID 192). 227 */ 228 enum pldm_state_set_boot_restart_cause_values { 229 PLDM_STATE_SET_BOOT_RESTART_CAUSE_POWERED_UP = 1, 230 PLDM_STATE_SET_BOOT_RESTART_CAUSE_HARD_RESET = 2, 231 PLDM_STATE_SET_BOOT_RESTART_CAUSE_WARM_RESET = 3, 232 PLDM_STATE_SET_BOOT_RESTART_CAUSE_MANUAL_HARD_RESET = 4, 233 PLDM_STATE_SET_BOOT_RESTART_CAUSE_MANUAL_WARM_RESET = 5, 234 PLDM_STATE_SET_BOOT_RESTART_CAUSE_SYSTEM_RESTART = 6, 235 PLDM_STATE_SET_BOOT_RESTART_CAUSE_WATCHDOG_TIMEOUT = 7 236 }; 237 238 /* @brief List of states for the Boot Progress state set (ID 196). 239 */ 240 enum pldm_state_set_boot_progress_state_values { 241 PLDM_STATE_SET_BOOT_PROG_STATE_NOT_ACTIVE = 1, 242 PLDM_STATE_SET_BOOT_PROG_STATE_COMPLETED = 2, 243 PLDM_STATE_SET_BOOT_PROG_STATE_MEM_INITIALIZATION = 3, 244 PLDM_STATE_SET_BOOT_PROG_STATE_SEC_PROC_INITIALIZATION = 5, 245 PLDM_STATE_SET_BOOT_PROG_STATE_PCI_RESORUCE_CONFIG = 9, 246 PLDM_STATE_SET_BOOT_PROG_STATE_OSSTART = 20, 247 PLDM_STATE_SET_BOOT_PROG_STATE_STARTING_OP_SYS = 21, 248 PLDM_STATE_SET_BOOT_PROG_STATE_BASE_BOARD_INITIALIZATION = 22, 249 PLDM_STATE_SET_BOOT_PROG_STATE_PRIMARY_PROC_INITIALIZATION = 26, 250 }; 251 252 /* @brief List of states for the System Power State set (ID 260). 253 */ 254 enum pldm_state_set_system_power_state_values { 255 PLDM_STATE_SET_SYS_POWER_STATE_ON = 1, 256 PLDM_STATE_SET_SYS_POWER_STATE_HIBERNATE = 2, 257 PLDM_STATE_SET_SYS_POWER_STATE_SLEEP_LIGHT = 3, 258 PLDM_STATE_SET_SYS_POWER_STATE_SLEEP_DEEP = 4, 259 PLDM_STATE_SET_SYS_POWER_CYCLE_SOFT = 5, 260 PLDM_STATE_SET_SYS_POWER_CYCLE_HARD = 6, 261 PLDM_STATE_SET_SYS_POWER_CYCLE_OFF_SOFT_GRACEFUL = 7, 262 PLDM_STATE_SET_SYS_POWER_CYCLE_OFF_HARD_GRACEFUL = 8, 263 PLDM_STATE_SET_SYS_POWER_STATE_OFF_SOFT_GRACEFUL = 9, 264 PLDM_STATE_SET_SYS_POWER_STATE_OFF_HARD_GRACEFUL = 10, 265 PLDM_STATE_SET_SYS_POWER_STATE_MASTER_BUS_RESET = 11, 266 PLDM_STATE_SET_SYS_POWER_STATE_MASTER_BUS_RESET_GRACEFUL = 12, 267 PLDM_STATE_SET_SYS_POWER_STATE_NMI = 13, 268 }; 269 270 /* @brief List of states for Device Power State set (ID 257). 271 */ 272 enum pldm_state_set_device_power_state_values { 273 PLDM_STATE_SET_ACPI_DEVICE_POWER_STATE_UNKNOWN = 0, 274 PLDM_STATE_SET_ACPI_DEVICE_POWER_STATE_FULLY_ON = 1, 275 PLDM_STATE_SET_ACPI_DEVICE_POWER_STATE_INTERMEDIATE_1 = 2, 276 PLDM_STATE_SET_ACPI_DEVICE_POWER_STATE_INTERMEDIATE_2 = 3, 277 PLDM_STATE_SET_ACPI_DEVICE_POWER_STATE_OFF = 4, 278 }; 279 280 /* OEM ranges */ 281 #define PLDM_OEM_STATE_SET_ID_START 32768 282 #define PLDM_OEM_STATE_SET_ID_END 65535 283 284 #ifdef __cplusplus 285 } 286 #endif 287 288 #endif /* STATE_SET_H */ 289