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Searched defs:PCIE_PERF_CNTL_TXCLK2__EVENT1_SEL_MASK (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h7454 #define PCIE_PERF_CNTL_TXCLK2__EVENT1_SEL_MASK 0x0000ff00L macro
H A Dbif_4_1_sh_mask.h2449 #define PCIE_PERF_CNTL_TXCLK2__EVENT1_SEL_MASK 0xff00 macro
H A Dbif_5_0_sh_mask.h3061 #define PCIE_PERF_CNTL_TXCLK2__EVENT1_SEL_MASK 0xff00 macro
H A Dbif_5_1_sh_mask.h3403 #define PCIE_PERF_CNTL_TXCLK2__EVENT1_SEL_MASK 0xff00 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h44033 #define PCIE_PERF_CNTL_TXCLK2__EVENT1_SEL_MASK … macro
H A Dnbio_4_3_0_sh_mask.h33161 #define PCIE_PERF_CNTL_TXCLK2__EVENT1_SEL_MASK … macro
H A Dnbio_2_3_sh_mask.h55356 #define PCIE_PERF_CNTL_TXCLK2__EVENT1_SEL_MASK … macro
H A Dnbio_7_0_sh_mask.h74703 #define PCIE_PERF_CNTL_TXCLK2__EVENT1_SEL_MASK … macro
H A Dnbio_6_1_sh_mask.h39298 #define PCIE_PERF_CNTL_TXCLK2__EVENT1_SEL_MASK … macro
H A Dnbio_7_2_0_sh_mask.h100798 #define PCIE_PERF_CNTL_TXCLK2__EVENT1_SEL_MASK … macro