xref: /openbmc/linux/include/uapi/linux/scc.h (revision 1a18374f)
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* $Id: scc.h,v 1.29 1997/04/02 14:56:45 jreuter Exp jreuter $ */
3 
4 #ifndef _UAPI_SCC_H
5 #define _UAPI_SCC_H
6 
7 #include <linux/sockios.h>
8 
9 /* selection of hardware types */
10 
11 #define PA0HZP		0x00	/* hardware type for PA0HZP SCC card and compatible */
12 #define EAGLE		0x01    /* hardware type for EAGLE card */
13 #define PC100		0x02	/* hardware type for PC100 card */
14 #define PRIMUS		0x04	/* hardware type for PRIMUS-PC (DG9BL) card */
15 #define DRSI		0x08	/* hardware type for DRSI PC*Packet card */
16 #define BAYCOM		0x10	/* hardware type for BayCom (U)SCC */
17 
18 /* DEV ioctl() commands */
19 
20 enum SCC_ioctl_cmds {
21 	SIOCSCCRESERVED = SIOCDEVPRIVATE,
22 	SIOCSCCCFG,
23 	SIOCSCCINI,
24 	SIOCSCCCHANINI,
25 	SIOCSCCSMEM,
26 	SIOCSCCGKISS,
27 	SIOCSCCSKISS,
28 	SIOCSCCGSTAT,
29 	SIOCSCCCAL
30 };
31 
32 /* Device parameter control (from WAMPES) */
33 
34 enum L1_params {
35 	PARAM_DATA,
36 	PARAM_TXDELAY,
37 	PARAM_PERSIST,
38 	PARAM_SLOTTIME,
39 	PARAM_TXTAIL,
40 	PARAM_FULLDUP,
41 	PARAM_SOFTDCD,		/* was: PARAM_HW */
42 	PARAM_MUTE,		/* ??? */
43 	PARAM_DTR,
44 	PARAM_RTS,
45 	PARAM_SPEED,
46 	PARAM_ENDDELAY,		/* ??? */
47 	PARAM_GROUP,
48 	PARAM_IDLE,
49 	PARAM_MIN,
50 	PARAM_MAXKEY,
51 	PARAM_WAIT,
52 	PARAM_MAXDEFER,
53 	PARAM_TX,
54 	PARAM_HWEVENT = 31,
55 	PARAM_RETURN = 255	/* reset kiss mode */
56 };
57 
58 /* fulldup parameter */
59 
60 enum FULLDUP_modes {
61 	KISS_DUPLEX_HALF,	/* normal CSMA operation */
62 	KISS_DUPLEX_FULL,	/* fullduplex, key down trx after transmission */
63 	KISS_DUPLEX_LINK,	/* fullduplex, key down trx after 'idletime' sec */
64 	KISS_DUPLEX_OPTIMA	/* fullduplex, let the protocol layer control the hw */
65 };
66 
67 /* misc. parameters */
68 
69 #define TIMER_OFF	65535U	/* to switch off timers */
70 #define NO_SUCH_PARAM	65534U	/* param not implemented */
71 
72 /* HWEVENT parameter */
73 
74 enum HWEVENT_opts {
75 	HWEV_DCD_ON,
76 	HWEV_DCD_OFF,
77 	HWEV_ALL_SENT
78 };
79 
80 /* channel grouping */
81 
82 #define RXGROUP		0100	/* if set, only tx when all channels clear */
83 #define TXGROUP		0200	/* if set, don't transmit simultaneously */
84 
85 /* Tx/Rx clock sources */
86 
87 enum CLOCK_sources {
88 	CLK_DPLL,	/* normal halfduplex operation */
89 	CLK_EXTERNAL,	/* external clocking (G3RUH/DF9IC modems) */
90 	CLK_DIVIDER,	/* Rx = DPLL, Tx = divider (fullduplex with */
91 			/* modems without clock regeneration */
92 	CLK_BRG		/* experimental fullduplex mode with DPLL/BRG for */
93 			/* MODEMs without clock recovery */
94 };
95 
96 /* Tx state */
97 
98 enum TX_state {
99 	TXS_IDLE,	/* Transmitter off, no data pending */
100 	TXS_BUSY,	/* waiting for permission to send / tailtime */
101 	TXS_ACTIVE,	/* Transmitter on, sending data */
102 	TXS_NEWFRAME,	/* reset CRC and send (next) frame */
103 	TXS_IDLE2,	/* Transmitter on, no data pending */
104 	TXS_WAIT,	/* Waiting for Mintime to expire */
105 	TXS_TIMEOUT	/* We had a transmission timeout */
106 };
107 
108 typedef unsigned long io_port;	/* type definition for an 'io port address' */
109 
110 /* SCC statistical information */
111 
112 struct scc_stat {
113         long rxints;            /* Receiver interrupts */
114         long txints;            /* Transmitter interrupts */
115         long exints;            /* External/status interrupts */
116         long spints;            /* Special receiver interrupts */
117 
118         long txframes;          /* Packets sent */
119         long rxframes;          /* Number of Frames Actually Received */
120         long rxerrs;            /* CRC Errors */
121         long txerrs;		/* KISS errors */
122 
123 	unsigned int nospace;	/* "Out of buffers" */
124 	unsigned int rx_over;	/* Receiver Overruns */
125 	unsigned int tx_under;	/* Transmitter Underruns */
126 
127 	unsigned int tx_state;	/* Transmitter state */
128 	int tx_queued;		/* tx frames enqueued */
129 
130 	unsigned int maxqueue;	/* allocated tx_buffers */
131 	unsigned int bufsize;	/* used buffersize */
132 };
133 
134 struct scc_modem {
135 	long speed;		/* Line speed, bps */
136 	char clocksrc;		/* 0 = DPLL, 1 = external, 2 = divider */
137 	char nrz;		/* NRZ instead of NRZI */
138 };
139 
140 struct scc_kiss_cmd {
141 	int  	 command;	/* one of the KISS-Commands defined above */
142 	unsigned param;		/* KISS-Param */
143 };
144 
145 struct scc_hw_config {
146 	io_port data_a;		/* data port channel A */
147 	io_port ctrl_a;		/* control port channel A */
148 	io_port data_b;		/* data port channel B */
149 	io_port ctrl_b;		/* control port channel B */
150 	io_port vector_latch;	/* INTACK-Latch (#) */
151 	io_port	special;	/* special function port */
152 
153 	int	irq;		/* irq */
154 	long	clock;		/* clock */
155 	char	option;		/* command for function port */
156 
157 	char brand;		/* hardware type */
158 	char escc;		/* use ext. features of a 8580/85180/85280 */
159 };
160 
161 /* (#) only one INTACK latch allowed. */
162 
163 
164 struct scc_mem_config {
165 	unsigned int dummy;
166 	unsigned int bufsize;
167 };
168 
169 struct scc_calibrate {
170 	unsigned int time;
171 	unsigned char pattern;
172 };
173 
174 #endif /* _UAPI_SCC_H */
175