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Searched defs:OTG5_OTG_INTERRUPT_CONTROL__OTG_TRIGA_INT_MSK_MASK (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h31928 #define OTG5_OTG_INTERRUPT_CONTROL__OTG_TRIGA_INT_MSK_MASK … macro
H A Ddcn_1_0_sh_mask.h25939 #define OTG5_OTG_INTERRUPT_CONTROL__OTG_TRIGA_INT_MSK_MASK … macro
H A Ddcn_2_0_0_sh_mask.h35257 #define OTG5_OTG_INTERRUPT_CONTROL__OTG_TRIGA_INT_MSK_MASK … macro
H A Ddcn_3_0_0_sh_mask.h34312 #define OTG5_OTG_INTERRUPT_CONTROL__OTG_TRIGA_INT_MSK_MASK … macro