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Searched defs:OTG1_OTG_DOUBLE_BUFFER_CONTROL__OTG_H_TIMING_DIV_BY2_DB_UPDATE_PENDING__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h15289 #define OTG1_OTG_DOUBLE_BUFFER_CONTROL__OTG_H_TIMING_DIV_BY2_DB_UPDATE_PENDING__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h28589 #define OTG1_OTG_DOUBLE_BUFFER_CONTROL__OTG_H_TIMING_DIV_BY2_DB_UPDATE_PENDING__SHIFT … macro
H A Ddcn_1_0_sh_mask.h22696 #define OTG1_OTG_DOUBLE_BUFFER_CONTROL__OTG_H_TIMING_DIV_BY2_DB_UPDATE_PENDING__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h31934 #define OTG1_OTG_DOUBLE_BUFFER_CONTROL__OTG_H_TIMING_DIV_BY2_DB_UPDATE_PENDING__SHIFT … macro