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Searched defs:OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h15195 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h15343 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h28493 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_1_0_sh_mask.h22602 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h24051 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h25445 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h30366 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h28362 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h31132 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h32288 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h27399 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h31840 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h30929 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h25442 #define OTG1_OTG_COUNT_RESET__OTG_RESET_FRAME_COUNT__SHIFT … macro