1 /*
2 * COM1 NS16550 support
3 * originally from linux source (arch/powerpc/boot/ns16550.c)
4 * modified to use CONFIG_SYS_ISA_MEM and new defines
5 */
6
7 #include <common.h>
8 #include <clk.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <ns16550.h>
12 #include <reset.h>
13 #include <serial.h>
14 #include <watchdog.h>
15 #include <linux/types.h>
16 #include <asm/io.h>
17
18 DECLARE_GLOBAL_DATA_PTR;
19
20 #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
21 #define UART_MCRVAL (UART_MCR_DTR | \
22 UART_MCR_RTS) /* RTS/DTR */
23
24 #ifndef CONFIG_DM_SERIAL
25 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
26 #define serial_out(x, y) outb(x, (ulong)y)
27 #define serial_in(y) inb((ulong)y)
28 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
29 #define serial_out(x, y) out_be32(y, x)
30 #define serial_in(y) in_be32(y)
31 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
32 #define serial_out(x, y) out_le32(y, x)
33 #define serial_in(y) in_le32(y)
34 #else
35 #define serial_out(x, y) writeb(x, y)
36 #define serial_in(y) readb(y)
37 #endif
38 #endif /* !CONFIG_DM_SERIAL */
39
40 #if defined(CONFIG_SOC_KEYSTONE)
41 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
42 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
43 #undef UART_MCRVAL
44 #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
45 #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
46 #else
47 #define UART_MCRVAL (UART_MCR_RTS)
48 #endif
49 #endif
50
51 #ifndef CONFIG_SYS_NS16550_IER
52 #define CONFIG_SYS_NS16550_IER 0x00
53 #endif /* CONFIG_SYS_NS16550_IER */
54
serial_out_shift(void * addr,int shift,int value)55 static inline void serial_out_shift(void *addr, int shift, int value)
56 {
57 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
58 outb(value, (ulong)addr);
59 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
60 out_le32(addr, value);
61 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
62 out_be32(addr, value);
63 #elif defined(CONFIG_SYS_NS16550_MEM32)
64 writel(value, addr);
65 #elif defined(CONFIG_SYS_BIG_ENDIAN)
66 writeb(value, addr + (1 << shift) - 1);
67 #else
68 writeb(value, addr);
69 #endif
70 }
71
serial_in_shift(void * addr,int shift)72 static inline int serial_in_shift(void *addr, int shift)
73 {
74 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
75 return inb((ulong)addr);
76 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
77 return in_le32(addr);
78 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
79 return in_be32(addr);
80 #elif defined(CONFIG_SYS_NS16550_MEM32)
81 return readl(addr);
82 #elif defined(CONFIG_SYS_BIG_ENDIAN)
83 return readb(addr + (1 << shift) - 1);
84 #else
85 return readb(addr);
86 #endif
87 }
88
89 #ifdef CONFIG_DM_SERIAL
90
91 #ifndef CONFIG_SYS_NS16550_CLK
92 #define CONFIG_SYS_NS16550_CLK 0
93 #endif
94
ns16550_writeb(NS16550_t port,int offset,int value)95 static void ns16550_writeb(NS16550_t port, int offset, int value)
96 {
97 struct ns16550_platdata *plat = port->plat;
98 unsigned char *addr;
99
100 offset *= 1 << plat->reg_shift;
101 addr = (unsigned char *)plat->base + offset;
102
103 /*
104 * As far as we know it doesn't make sense to support selection of
105 * these options at run-time, so use the existing CONFIG options.
106 */
107 serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
108 }
109
ns16550_readb(NS16550_t port,int offset)110 static int ns16550_readb(NS16550_t port, int offset)
111 {
112 struct ns16550_platdata *plat = port->plat;
113 unsigned char *addr;
114
115 offset *= 1 << plat->reg_shift;
116 addr = (unsigned char *)plat->base + offset;
117
118 return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
119 }
120
ns16550_getfcr(NS16550_t port)121 static u32 ns16550_getfcr(NS16550_t port)
122 {
123 struct ns16550_platdata *plat = port->plat;
124
125 return plat->fcr;
126 }
127
128 /* We can clean these up once everything is moved to driver model */
129 #define serial_out(value, addr) \
130 ns16550_writeb(com_port, \
131 (unsigned char *)addr - (unsigned char *)com_port, value)
132 #define serial_in(addr) \
133 ns16550_readb(com_port, \
134 (unsigned char *)addr - (unsigned char *)com_port)
135 #else
ns16550_getfcr(NS16550_t port)136 static u32 ns16550_getfcr(NS16550_t port)
137 {
138 return UART_FCR_DEFVAL;
139 }
140 #endif
141
ns16550_calc_divisor(NS16550_t port,int clock,int baudrate)142 int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
143 {
144 const unsigned int mode_x_div = 16;
145
146 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
147 }
148
NS16550_setbrg(NS16550_t com_port,int baud_divisor)149 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
150 {
151 /* to keep serial format, read lcr before writing BKSE */
152 int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE;
153
154 serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr);
155 serial_out(baud_divisor & 0xff, &com_port->dll);
156 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
157 serial_out(lcr_val, &com_port->lcr);
158 }
159
NS16550_init(NS16550_t com_port,int baud_divisor)160 void NS16550_init(NS16550_t com_port, int baud_divisor)
161 {
162 #if (defined(CONFIG_SPL_BUILD) && \
163 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
164 /*
165 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
166 * before SPL starts only THRE bit is set. We have to empty the
167 * transmitter before initialization starts.
168 */
169 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
170 == UART_LSR_THRE) {
171 if (baud_divisor != -1)
172 NS16550_setbrg(com_port, baud_divisor);
173 serial_out(0, &com_port->mdr1);
174 }
175 #endif
176
177 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
178 ;
179
180 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
181 #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL)
182 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
183 #endif
184
185 serial_out(UART_MCRVAL, &com_port->mcr);
186 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
187 /* initialize serial config to 8N1 before writing baudrate */
188 serial_out(UART_LCRVAL, &com_port->lcr);
189 if (baud_divisor != -1)
190 NS16550_setbrg(com_port, baud_divisor);
191 #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \
192 defined(CONFIG_OMAP_SERIAL)
193 /* /16 is proper to hit 115200 with 48MHz */
194 serial_out(0, &com_port->mdr1);
195 #endif
196 #if defined(CONFIG_SOC_KEYSTONE)
197 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
198 #endif
199 }
200
201 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
NS16550_reinit(NS16550_t com_port,int baud_divisor)202 void NS16550_reinit(NS16550_t com_port, int baud_divisor)
203 {
204 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
205 NS16550_setbrg(com_port, 0);
206 serial_out(UART_MCRVAL, &com_port->mcr);
207 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
208 NS16550_setbrg(com_port, baud_divisor);
209 }
210 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
211
NS16550_putc(NS16550_t com_port,char c)212 void NS16550_putc(NS16550_t com_port, char c)
213 {
214 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
215 ;
216 serial_out(c, &com_port->thr);
217
218 /*
219 * Call watchdog_reset() upon newline. This is done here in putc
220 * since the environment code uses a single puts() to print the complete
221 * environment upon "printenv". So we can't put this watchdog call
222 * in puts().
223 */
224 if (c == '\n')
225 WATCHDOG_RESET();
226 }
227
228 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
NS16550_getc(NS16550_t com_port)229 char NS16550_getc(NS16550_t com_port)
230 {
231 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
232 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
233 extern void usbtty_poll(void);
234 usbtty_poll();
235 #endif
236 WATCHDOG_RESET();
237 }
238 return serial_in(&com_port->rbr);
239 }
240
NS16550_tstc(NS16550_t com_port)241 int NS16550_tstc(NS16550_t com_port)
242 {
243 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
244 }
245
246 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
247
248 #ifdef CONFIG_DEBUG_UART_NS16550
249
250 #include <debug_uart.h>
251
_debug_uart_init(void)252 static inline void _debug_uart_init(void)
253 {
254 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
255 int baud_divisor;
256
257 /*
258 * We copy the code from above because it is already horribly messy.
259 * Trying to refactor to nicely remove the duplication doesn't seem
260 * feasible. The better fix is to move all users of this driver to
261 * driver model.
262 */
263 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
264 CONFIG_BAUDRATE);
265 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
266 serial_dout(&com_port->mcr, UART_MCRVAL);
267 serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
268
269 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
270 serial_dout(&com_port->dll, baud_divisor & 0xff);
271 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
272 serial_dout(&com_port->lcr, UART_LCRVAL);
273 }
274
NS16550_read_baud_divisor(struct NS16550 * com_port)275 static inline int NS16550_read_baud_divisor(struct NS16550 *com_port)
276 {
277 int ret;
278
279 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
280 ret = serial_din(&com_port->dll) & 0xff;
281 ret |= (serial_din(&com_port->dlm) & 0xff) << 8;
282 serial_dout(&com_port->lcr, UART_LCRVAL);
283
284 return ret;
285 }
286
_debug_uart_putc(int ch)287 static inline void _debug_uart_putc(int ch)
288 {
289 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
290
291 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
292 #ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED
293 if (!NS16550_read_baud_divisor(com_port))
294 return;
295 #endif
296 }
297 serial_dout(&com_port->thr, ch);
298 }
299
300 DEBUG_UART_FUNCS
301
302 #endif
303
304 #ifdef CONFIG_DM_SERIAL
ns16550_serial_putc(struct udevice * dev,const char ch)305 static int ns16550_serial_putc(struct udevice *dev, const char ch)
306 {
307 struct NS16550 *const com_port = dev_get_priv(dev);
308
309 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
310 return -EAGAIN;
311 serial_out(ch, &com_port->thr);
312
313 /*
314 * Call watchdog_reset() upon newline. This is done here in putc
315 * since the environment code uses a single puts() to print the complete
316 * environment upon "printenv". So we can't put this watchdog call
317 * in puts().
318 */
319 if (ch == '\n')
320 WATCHDOG_RESET();
321
322 return 0;
323 }
324
ns16550_serial_pending(struct udevice * dev,bool input)325 static int ns16550_serial_pending(struct udevice *dev, bool input)
326 {
327 struct NS16550 *const com_port = dev_get_priv(dev);
328
329 if (input)
330 return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
331 else
332 return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
333 }
334
ns16550_serial_getc(struct udevice * dev)335 static int ns16550_serial_getc(struct udevice *dev)
336 {
337 struct NS16550 *const com_port = dev_get_priv(dev);
338
339 if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
340 return -EAGAIN;
341
342 return serial_in(&com_port->rbr);
343 }
344
ns16550_serial_setbrg(struct udevice * dev,int baudrate)345 static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
346 {
347 struct NS16550 *const com_port = dev_get_priv(dev);
348 struct ns16550_platdata *plat = com_port->plat;
349 int clock_divisor;
350
351 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
352
353 NS16550_setbrg(com_port, clock_divisor);
354
355 return 0;
356 }
357
ns16550_serial_setconfig(struct udevice * dev,uint serial_config)358 static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
359 {
360 struct NS16550 *const com_port = dev_get_priv(dev);
361 int lcr_val = UART_LCR_WLS_8;
362 uint parity = SERIAL_GET_PARITY(serial_config);
363 uint bits = SERIAL_GET_BITS(serial_config);
364 uint stop = SERIAL_GET_STOP(serial_config);
365
366 /*
367 * only parity config is implemented, check if other serial settings
368 * are the default one.
369 */
370 if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP)
371 return -ENOTSUPP; /* not supported in driver*/
372
373 switch (parity) {
374 case SERIAL_PAR_NONE:
375 /* no bits to add */
376 break;
377 case SERIAL_PAR_ODD:
378 lcr_val |= UART_LCR_PEN;
379 break;
380 case SERIAL_PAR_EVEN:
381 lcr_val |= UART_LCR_PEN | UART_LCR_EPS;
382 break;
383 default:
384 return -ENOTSUPP; /* not supported in driver*/
385 }
386
387 serial_out(lcr_val, &com_port->lcr);
388 return 0;
389 }
390
ns16550_serial_getinfo(struct udevice * dev,struct serial_device_info * info)391 static int ns16550_serial_getinfo(struct udevice *dev,
392 struct serial_device_info *info)
393 {
394 struct NS16550 *const com_port = dev_get_priv(dev);
395 struct ns16550_platdata *plat = com_port->plat;
396
397 info->type = SERIAL_CHIP_16550_COMPATIBLE;
398 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
399 info->addr_space = SERIAL_ADDRESS_SPACE_IO;
400 #else
401 info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
402 #endif
403 info->addr = plat->base;
404 info->reg_width = plat->reg_width;
405 info->reg_shift = plat->reg_shift;
406 info->reg_offset = plat->reg_offset;
407 return 0;
408 }
409
ns16550_serial_probe(struct udevice * dev)410 int ns16550_serial_probe(struct udevice *dev)
411 {
412 struct NS16550 *const com_port = dev_get_priv(dev);
413 struct reset_ctl_bulk reset_bulk;
414 int ret;
415
416 ret = reset_get_bulk(dev, &reset_bulk);
417 if (!ret)
418 reset_deassert_bulk(&reset_bulk);
419
420 com_port->plat = dev_get_platdata(dev);
421 NS16550_init(com_port, -1);
422
423 return 0;
424 }
425
426 #if CONFIG_IS_ENABLED(OF_CONTROL)
427 enum {
428 PORT_NS16550 = 0,
429 PORT_JZ4780,
430 };
431 #endif
432
433 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
ns16550_serial_ofdata_to_platdata(struct udevice * dev)434 int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
435 {
436 struct ns16550_platdata *plat = dev->platdata;
437 const u32 port_type = dev_get_driver_data(dev);
438 fdt_addr_t addr;
439 struct clk clk;
440 int err;
441
442 /* try Processor Local Bus device first */
443 addr = dev_read_addr(dev);
444 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
445 if (addr == FDT_ADDR_T_NONE) {
446 /* then try pci device */
447 struct fdt_pci_addr pci_addr;
448 u32 bar;
449 int ret;
450
451 /* we prefer to use a memory-mapped register */
452 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
453 FDT_PCI_SPACE_MEM32, "reg",
454 &pci_addr);
455 if (ret) {
456 /* try if there is any i/o-mapped register */
457 ret = fdtdec_get_pci_addr(gd->fdt_blob,
458 dev_of_offset(dev),
459 FDT_PCI_SPACE_IO,
460 "reg", &pci_addr);
461 if (ret)
462 return ret;
463 }
464
465 ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
466 if (ret)
467 return ret;
468
469 addr = bar;
470 }
471 #endif
472
473 if (addr == FDT_ADDR_T_NONE)
474 return -EINVAL;
475
476 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
477 plat->base = addr;
478 #else
479 plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
480 #endif
481
482 plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
483 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
484 plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
485
486 err = clk_get_by_index(dev, 0, &clk);
487 if (!err) {
488 err = clk_get_rate(&clk);
489 if (!IS_ERR_VALUE(err))
490 plat->clock = err;
491 } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
492 debug("ns16550 failed to get clock\n");
493 return err;
494 }
495
496 if (!plat->clock)
497 plat->clock = dev_read_u32_default(dev, "clock-frequency",
498 CONFIG_SYS_NS16550_CLK);
499 if (!plat->clock) {
500 debug("ns16550 clock not defined\n");
501 return -EINVAL;
502 }
503
504 plat->fcr = UART_FCR_DEFVAL;
505 if (port_type == PORT_JZ4780)
506 plat->fcr |= UART_FCR_UME;
507
508 return 0;
509 }
510 #endif
511
512 const struct dm_serial_ops ns16550_serial_ops = {
513 .putc = ns16550_serial_putc,
514 .pending = ns16550_serial_pending,
515 .getc = ns16550_serial_getc,
516 .setbrg = ns16550_serial_setbrg,
517 .setconfig = ns16550_serial_setconfig,
518 .getinfo = ns16550_serial_getinfo,
519 };
520
521 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
522 /*
523 * Please consider existing compatible strings before adding a new
524 * one to keep this table compact. Or you may add a generic "ns16550"
525 * compatible string to your dts.
526 */
527 static const struct udevice_id ns16550_serial_ids[] = {
528 { .compatible = "ns16550", .data = PORT_NS16550 },
529 { .compatible = "ns16550a", .data = PORT_NS16550 },
530 { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
531 { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
532 { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
533 {}
534 };
535 #endif /* OF_CONTROL && !OF_PLATDATA */
536
537 #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
538
539 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
540 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
541 U_BOOT_DRIVER(ns16550_serial) = {
542 .name = "ns16550_serial",
543 .id = UCLASS_SERIAL,
544 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
545 .of_match = ns16550_serial_ids,
546 .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
547 .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
548 #endif
549 .priv_auto_alloc_size = sizeof(struct NS16550),
550 .probe = ns16550_serial_probe,
551 .ops = &ns16550_serial_ops,
552 #if !CONFIG_IS_ENABLED(OF_CONTROL)
553 .flags = DM_FLAG_PRE_RELOC,
554 #endif
555 };
556 #endif
557 #endif /* SERIAL_PRESENT */
558
559 #endif /* CONFIG_DM_SERIAL */
560