xref: /openbmc/u-boot/drivers/mtd/nand/raw/mxc_nand.h (revision a1588ac8)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (c) 2009 Magnus Lilja <lilja.magnus@gmail.com>
4  */
5 
6 #ifndef __MXC_NAND_H
7 #define __MXC_NAND_H
8 
9 /*
10  * Register map and bit definitions for the Freescale NAND Flash Controller
11  * present in various i.MX devices.
12  *
13  * MX31 and MX27 have version 1, which has:
14  *	4 512-byte main buffers and
15  *	4 16-byte spare buffers
16  *	to support up to 2K byte pagesize nand.
17  *	Reading or writing a 2K page requires 4 FDI/FDO cycles.
18  *
19  * MX25 and MX35 have version 2.1, and MX51 and MX53 have version 3.2, which
20  * have:
21  *	8 512-byte main buffers and
22  *	8 64-byte spare buffers
23  *	to support up to 4K byte pagesize nand.
24  *	Reading or writing a 2K or 4K page requires only 1 FDI/FDO cycle.
25  *	Also some of registers are moved and/or changed meaning as seen below.
26  */
27 #if defined(CONFIG_MX27) || defined(CONFIG_MX31)
28 #define MXC_NFC_V1
29 #define is_mxc_nfc_1()		1
30 #define is_mxc_nfc_21()		0
31 #define is_mxc_nfc_32()		0
32 #elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
33 #define MXC_NFC_V2_1
34 #define is_mxc_nfc_1()		0
35 #define is_mxc_nfc_21()		1
36 #define is_mxc_nfc_32()		0
37 #elif defined(CONFIG_MX51) || defined(CONFIG_MX53)
38 #define MXC_NFC_V3
39 #define MXC_NFC_V3_2
40 #define is_mxc_nfc_1()		0
41 #define is_mxc_nfc_21()		0
42 #define is_mxc_nfc_32()		1
43 #else
44 #error "MXC NFC implementation not supported"
45 #endif
46 #define is_mxc_nfc_3()		is_mxc_nfc_32()
47 
48 #if defined(MXC_NFC_V1)
49 #define NAND_MXC_NR_BUFS		4
50 #define NAND_MXC_SPARE_BUF_SIZE		16
51 #define NAND_MXC_REG_OFFSET		0xe00
52 #define NAND_MXC_2K_MULTI_CYCLE
53 #elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
54 #define NAND_MXC_NR_BUFS		8
55 #define NAND_MXC_SPARE_BUF_SIZE		64
56 #define NAND_MXC_REG_OFFSET		0x1e00
57 #endif
58 
59 struct mxc_nand_regs {
60 	u8 main_area[NAND_MXC_NR_BUFS][0x200];
61 	u8 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE];
62 	/*
63 	 * reserved size is offset of nfc registers
64 	 * minus total main and spare sizes
65 	 */
66 	u8 reserved1[NAND_MXC_REG_OFFSET
67 		- NAND_MXC_NR_BUFS * (512 + NAND_MXC_SPARE_BUF_SIZE)];
68 #if defined(MXC_NFC_V1)
69 	u16 buf_size;
70 	u16 reserved2;
71 	u16 buf_addr;
72 	u16 flash_addr;
73 	u16 flash_cmd;
74 	u16 config;
75 	u16 ecc_status_result;
76 	u16 rsltmain_area;
77 	u16 rsltspare_area;
78 	u16 wrprot;
79 	u16 unlockstart_blkaddr;
80 	u16 unlockend_blkaddr;
81 	u16 nf_wrprst;
82 	u16 config1;
83 	u16 config2;
84 #elif defined(MXC_NFC_V2_1)
85 	u16 reserved2[2];
86 	u16 buf_addr;
87 	u16 flash_addr;
88 	u16 flash_cmd;
89 	u16 config;
90 	u32 ecc_status_result;
91 	u16 spare_area_size;
92 	u16 wrprot;
93 	u16 reserved3[2];
94 	u16 nf_wrprst;
95 	u16 config1;
96 	u16 config2;
97 	u16 reserved4;
98 	u16 unlockstart_blkaddr;
99 	u16 unlockend_blkaddr;
100 	u16 unlockstart_blkaddr1;
101 	u16 unlockend_blkaddr1;
102 	u16 unlockstart_blkaddr2;
103 	u16 unlockend_blkaddr2;
104 	u16 unlockstart_blkaddr3;
105 	u16 unlockend_blkaddr3;
106 #elif defined(MXC_NFC_V3_2)
107 	u32 flash_cmd;
108 	u32 flash_addr[12];
109 	u32 config1;
110 	u32 ecc_status_result;
111 	u32 status_sum;
112 	u32 launch;
113 #endif
114 };
115 
116 #ifdef MXC_NFC_V3_2
117 struct mxc_nand_ip_regs {
118 	u32 wrprot;
119 	u32 wrprot_unlock_blkaddr[8];
120 	u32 config2;
121 	u32 config3;
122 	u32 ipc;
123 	u32 err_addr;
124 	u32 delay_line;
125 };
126 #endif
127 
128 /* Set FCMD to 1, rest to 0 for Command operation */
129 #define NFC_CMD				0x1
130 
131 /* Set FADD to 1, rest to 0 for Address operation */
132 #define NFC_ADDR			0x2
133 
134 /* Set FDI to 1, rest to 0 for Input operation */
135 #define NFC_INPUT			0x4
136 
137 /* Set FDO to 001, rest to 0 for Data Output operation */
138 #define NFC_OUTPUT			0x8
139 
140 /* Set FDO to 010, rest to 0 for Read ID operation */
141 #define NFC_ID				0x10
142 
143 /* Set FDO to 100, rest to 0 for Read Status operation */
144 #define NFC_STATUS			0x20
145 
146 #if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
147 #define NFC_CONFIG1_SP_EN		(1 << 2)
148 #define NFC_CONFIG1_RST			(1 << 6)
149 #define NFC_CONFIG1_CE			(1 << 7)
150 #elif defined(MXC_NFC_V3_2)
151 #define NFC_CONFIG1_SP_EN		(1 << 0)
152 #define NFC_CONFIG1_CE			(1 << 1)
153 #define NFC_CONFIG1_RST			(1 << 2)
154 #endif
155 #define NFC_V1_V2_CONFIG1_ECC_EN	(1 << 3)
156 #define NFC_V1_V2_CONFIG1_INT_MSK	(1 << 4)
157 #define NFC_V1_V2_CONFIG1_BIG		(1 << 5)
158 #define NFC_V2_CONFIG1_ECC_MODE_4	(1 << 0)
159 #define NFC_V2_CONFIG1_ONE_CYCLE	(1 << 8)
160 #define NFC_V2_CONFIG1_FP_INT		(1 << 11)
161 #define NFC_V3_CONFIG1_RBA_MASK		(0x7 << 4)
162 #define NFC_V3_CONFIG1_RBA(x)		(((x) & 0x7) << 4)
163 
164 #define NFC_V1_V2_CONFIG2_INT		(1 << 15)
165 #define NFC_V3_CONFIG2_PS_MASK		(0x3 << 0)
166 #define NFC_V3_CONFIG2_PS_512		(0 << 0)
167 #define NFC_V3_CONFIG2_PS_2048		(1 << 0)
168 #define NFC_V3_CONFIG2_PS_4096		(2 << 0)
169 #define NFC_V3_CONFIG2_ONE_CYCLE	(1 << 2)
170 #define NFC_V3_CONFIG2_ECC_EN		(1 << 3)
171 #define NFC_V3_CONFIG2_2CMD_PHASES	(1 << 4)
172 #define NFC_V3_CONFIG2_NUM_ADDR_PH0	(1 << 5)
173 #define NFC_V3_CONFIG2_ECC_MODE_8	(1 << 6)
174 #define NFC_V3_CONFIG2_PPB_MASK		(0x3 << 7)
175 #define NFC_V3_CONFIG2_PPB(x)		(((x) & 0x3) << 7)
176 #define NFC_V3_CONFIG2_EDC_MASK		(0x7 << 9)
177 #define NFC_V3_CONFIG2_EDC(x)		(((x) & 0x7) << 9)
178 #define NFC_V3_CONFIG2_NUM_ADDR_PH1(x)	(((x) & 0x3) << 12)
179 #define NFC_V3_CONFIG2_INT_MSK		(1 << 15)
180 #define NFC_V3_CONFIG2_SPAS_MASK	(0xff << 16)
181 #define NFC_V3_CONFIG2_SPAS(x)		(((x) & 0xff) << 16)
182 #define NFC_V3_CONFIG2_ST_CMD_MASK	(0xff << 24)
183 #define NFC_V3_CONFIG2_ST_CMD(x)	(((x) & 0xff) << 24)
184 
185 #define NFC_V3_CONFIG3_ADD_OP(x)	(((x) & 0x3) << 0)
186 #define NFC_V3_CONFIG3_FW8		(1 << 3)
187 #define NFC_V3_CONFIG3_SBB(x)		(((x) & 0x7) << 8)
188 #define NFC_V3_CONFIG3_NUM_OF_DEVS(x)	(((x) & 0x7) << 12)
189 #define NFC_V3_CONFIG3_RBB_MODE		(1 << 15)
190 #define NFC_V3_CONFIG3_NO_SDMA		(1 << 20)
191 
192 #define NFC_V3_WRPROT_UNLOCK		(1 << 2)
193 #define NFC_V3_WRPROT_BLS_UNLOCK	(2 << 6)
194 
195 #define NFC_V3_IPC_CREQ			(1 << 0)
196 #define NFC_V3_IPC_INT			(1 << 31)
197 
198 #if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
199 #define operation	config2
200 #define readnfc		readw
201 #define writenfc	writew
202 #elif defined(MXC_NFC_V3_2)
203 #define operation	launch
204 #define readnfc		readl
205 #define writenfc	writel
206 #endif
207 
208 #endif /* __MXC_NAND_H */
209