xref: /openbmc/linux/arch/s390/include/asm/cpu_mf.h (revision 497cc42b)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * CPU-measurement facilities
4  *
5  *  Copyright IBM Corp. 2012, 2018
6  *  Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
7  *	       Jan Glauber <jang@linux.vnet.ibm.com>
8  */
9 #ifndef _ASM_S390_CPU_MF_H
10 #define _ASM_S390_CPU_MF_H
11 
12 #include <linux/errno.h>
13 #include <asm/asm-extable.h>
14 #include <asm/facility.h>
15 
16 asm(".include \"asm/cpu_mf-insn.h\"\n");
17 
18 #define CPU_MF_INT_SF_IAE	(1 << 31)	/* invalid entry address */
19 #define CPU_MF_INT_SF_ISE	(1 << 30)	/* incorrect SDBT entry */
20 #define CPU_MF_INT_SF_PRA	(1 << 29)	/* program request alert */
21 #define CPU_MF_INT_SF_SACA	(1 << 23)	/* sampler auth. change alert */
22 #define CPU_MF_INT_SF_LSDA	(1 << 22)	/* loss of sample data alert */
23 #define CPU_MF_INT_CF_MTDA	(1 << 15)	/* loss of MT ctr. data alert */
24 #define CPU_MF_INT_CF_CACA	(1 <<  7)	/* counter auth. change alert */
25 #define CPU_MF_INT_CF_LCDA	(1 <<  6)	/* loss of counter data alert */
26 #define CPU_MF_INT_CF_MASK	(CPU_MF_INT_CF_MTDA|CPU_MF_INT_CF_CACA| \
27 				 CPU_MF_INT_CF_LCDA)
28 #define CPU_MF_INT_SF_MASK	(CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE|	\
29 				 CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA|	\
30 				 CPU_MF_INT_SF_LSDA)
31 
32 #define CPU_MF_SF_RIBM_NOTAV	0x1		/* Sampling unavailable */
33 
34 /* CPU measurement facility support */
cpum_cf_avail(void)35 static inline int cpum_cf_avail(void)
36 {
37 	return test_facility(40) && test_facility(67);
38 }
39 
cpum_sf_avail(void)40 static inline int cpum_sf_avail(void)
41 {
42 	return test_facility(40) && test_facility(68);
43 }
44 
45 struct cpumf_ctr_info {
46 	u16   cfvn;
47 	u16   auth_ctl;
48 	u16   enable_ctl;
49 	u16   act_ctl;
50 	u16   max_cpu;
51 	u16   csvn;
52 	u16   max_cg;
53 	u16   reserved1;
54 	u32   reserved2[12];
55 } __packed;
56 
57 /* QUERY SAMPLING INFORMATION block */
58 struct hws_qsi_info_block {	    /* Bit(s) */
59 	unsigned int b0_13:14;	    /* 0-13: zeros			 */
60 	unsigned int as:1;	    /* 14: basic-sampling authorization	 */
61 	unsigned int ad:1;	    /* 15: diag-sampling authorization	 */
62 	unsigned int b16_21:6;	    /* 16-21: zeros			 */
63 	unsigned int es:1;	    /* 22: basic-sampling enable control */
64 	unsigned int ed:1;	    /* 23: diag-sampling enable control	 */
65 	unsigned int b24_29:6;	    /* 24-29: zeros			 */
66 	unsigned int cs:1;	    /* 30: basic-sampling activation control */
67 	unsigned int cd:1;	    /* 31: diag-sampling activation control */
68 	unsigned int bsdes:16;	    /* 4-5: size of basic sampling entry */
69 	unsigned int dsdes:16;	    /* 6-7: size of diagnostic sampling entry */
70 	unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
71 	unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
72 	unsigned long tear;	    /* 24-31: TEAR contents		 */
73 	unsigned long dear;	    /* 32-39: DEAR contents		 */
74 	unsigned int rsvrd0:24;	    /* 40-42: reserved			 */
75 	unsigned int ribm:8;	    /* 43: Reserved by IBM		 */
76 	unsigned int cpu_speed;     /* 44-47: CPU speed			 */
77 	unsigned long long rsvrd1;  /* 48-55: reserved			 */
78 	unsigned long long rsvrd2;  /* 56-63: reserved			 */
79 } __packed;
80 
81 /* SET SAMPLING CONTROLS request block */
82 struct hws_lsctl_request_block {
83 	unsigned int s:1;	    /* 0: maximum buffer indicator	 */
84 	unsigned int h:1;	    /* 1: part. level reserved for VM use*/
85 	unsigned long long b2_53:52;/* 2-53: zeros			 */
86 	unsigned int es:1;	    /* 54: basic-sampling enable control */
87 	unsigned int ed:1;	    /* 55: diag-sampling enable control	 */
88 	unsigned int b56_61:6;	    /* 56-61: - zeros			 */
89 	unsigned int cs:1;	    /* 62: basic-sampling activation control */
90 	unsigned int cd:1;	    /* 63: diag-sampling activation control  */
91 	unsigned long interval;     /* 8-15: sampling interval		 */
92 	unsigned long tear;	    /* 16-23: TEAR contents		 */
93 	unsigned long dear;	    /* 24-31: DEAR contents		 */
94 	/* 32-63:							 */
95 	unsigned long rsvrd1;	    /* reserved				 */
96 	unsigned long rsvrd2;	    /* reserved				 */
97 	unsigned long rsvrd3;	    /* reserved				 */
98 	unsigned long rsvrd4;	    /* reserved				 */
99 } __packed;
100 
101 struct hws_basic_entry {
102 	unsigned int def:16;	    /* 0-15  Data Entry Format		 */
103 	unsigned int R:4;	    /* 16-19 reserved			 */
104 	unsigned int U:4;	    /* 20-23 Number of unique instruct.  */
105 	unsigned int z:2;	    /* zeros				 */
106 	unsigned int T:1;	    /* 26 PSW DAT mode			 */
107 	unsigned int W:1;	    /* 27 PSW wait state		 */
108 	unsigned int P:1;	    /* 28 PSW Problem state		 */
109 	unsigned int AS:2;	    /* 29-30 PSW address-space control	 */
110 	unsigned int I:1;	    /* 31 entry valid or invalid	 */
111 	unsigned int CL:2;	    /* 32-33 Configuration Level	 */
112 	unsigned int H:1;	    /* 34 Host Indicator		 */
113 	unsigned int LS:1;	    /* 35 Limited Sampling		 */
114 	unsigned int:12;
115 	unsigned int prim_asn:16;   /* primary ASN			 */
116 	unsigned long long ia;	    /* Instruction Address		 */
117 	unsigned long long gpp;     /* Guest Program Parameter		 */
118 	unsigned long long hpp;     /* Host Program Parameter		 */
119 } __packed;
120 
121 struct hws_diag_entry {
122 	unsigned int def:16;	    /* 0-15  Data Entry Format		 */
123 	unsigned int R:15;	    /* 16-19 and 20-30 reserved		 */
124 	unsigned int I:1;	    /* 31 entry valid or invalid	 */
125 	u8	     data[];	    /* Machine-dependent sample data	 */
126 } __packed;
127 
128 struct hws_combined_entry {
129 	struct hws_basic_entry	basic;	/* Basic-sampling data entry */
130 	struct hws_diag_entry	diag;	/* Diagnostic-sampling data entry */
131 } __packed;
132 
133 union hws_trailer_header {
134 	struct {
135 		unsigned int f:1;	/* 0 - Block Full Indicator   */
136 		unsigned int a:1;	/* 1 - Alert request control  */
137 		unsigned int t:1;	/* 2 - Timestamp format	      */
138 		unsigned int :29;	/* 3 - 31: Reserved	      */
139 		unsigned int bsdes:16;	/* 32-47: size of basic SDE   */
140 		unsigned int dsdes:16;	/* 48-63: size of diagnostic SDE */
141 		unsigned long long overflow; /* 64 - Overflow Count   */
142 	};
143 	u128 val;
144 };
145 
146 struct hws_trailer_entry {
147 	union hws_trailer_header header; /* 0 - 15 Flags + Overflow Count     */
148 	unsigned char timestamp[16];	 /* 16 - 31 timestamp		      */
149 	unsigned long long reserved1;	 /* 32 -Reserved		      */
150 	unsigned long long reserved2;	 /*				      */
151 	union {				 /* 48 - reserved for programming use */
152 		struct {
153 			unsigned int clock_base:1; /* in progusage2 */
154 			unsigned long long progusage1:63;
155 			unsigned long long progusage2;
156 		};
157 		unsigned long long progusage[2];
158 	};
159 } __packed;
160 
161 /* Load program parameter */
lpp(void * pp)162 static inline void lpp(void *pp)
163 {
164 	asm volatile("lpp 0(%0)\n" :: "a" (pp) : "memory");
165 }
166 
167 /* Query counter information */
qctri(struct cpumf_ctr_info * info)168 static inline int qctri(struct cpumf_ctr_info *info)
169 {
170 	int rc = -EINVAL;
171 
172 	asm volatile (
173 		"0:	qctri	%1\n"
174 		"1:	lhi	%0,0\n"
175 		"2:\n"
176 		EX_TABLE(1b, 2b)
177 		: "+d" (rc), "=Q" (*info));
178 	return rc;
179 }
180 
181 /* Load CPU-counter-set controls */
lcctl(u64 ctl)182 static inline int lcctl(u64 ctl)
183 {
184 	int cc;
185 
186 	asm volatile (
187 		"	lcctl	%1\n"
188 		"	ipm	%0\n"
189 		"	srl	%0,28\n"
190 		: "=d" (cc) : "Q" (ctl) : "cc");
191 	return cc;
192 }
193 
194 /* Extract CPU counter */
__ecctr(u64 ctr,u64 * content)195 static inline int __ecctr(u64 ctr, u64 *content)
196 {
197 	u64 _content;
198 	int cc;
199 
200 	asm volatile (
201 		"	ecctr	%0,%2\n"
202 		"	ipm	%1\n"
203 		"	srl	%1,28\n"
204 		: "=d" (_content), "=d" (cc) : "d" (ctr) : "cc");
205 	*content = _content;
206 	return cc;
207 }
208 
209 /* Extract CPU counter */
ecctr(u64 ctr,u64 * val)210 static inline int ecctr(u64 ctr, u64 *val)
211 {
212 	u64 content;
213 	int cc;
214 
215 	cc = __ecctr(ctr, &content);
216 	if (!cc)
217 		*val = content;
218 	return cc;
219 }
220 
221 /* Store CPU counter multiple for a particular counter set */
222 enum stcctm_ctr_set {
223 	EXTENDED = 0,
224 	BASIC = 1,
225 	PROBLEM_STATE = 2,
226 	CRYPTO_ACTIVITY = 3,
227 	MT_DIAG = 5,
228 	MT_DIAG_CLEARING = 9,	/* clears loss-of-MT-ctr-data alert */
229 };
230 
stcctm(enum stcctm_ctr_set set,u64 range,u64 * dest)231 static __always_inline int stcctm(enum stcctm_ctr_set set, u64 range, u64 *dest)
232 {
233 	int cc;
234 
235 	asm volatile (
236 		"	STCCTM	%2,%3,%1\n"
237 		"	ipm	%0\n"
238 		"	srl	%0,28\n"
239 		: "=d" (cc)
240 		: "Q" (*dest), "d" (range), "i" (set)
241 		: "cc", "memory");
242 	return cc;
243 }
244 
245 /* Query sampling information */
qsi(struct hws_qsi_info_block * info)246 static inline int qsi(struct hws_qsi_info_block *info)
247 {
248 	int cc = 1;
249 
250 	asm volatile(
251 		"0:	qsi	%1\n"
252 		"1:	lhi	%0,0\n"
253 		"2:\n"
254 		EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
255 		: "+d" (cc), "+Q" (*info));
256 	return cc ? -EINVAL : 0;
257 }
258 
259 /* Load sampling controls */
lsctl(struct hws_lsctl_request_block * req)260 static inline int lsctl(struct hws_lsctl_request_block *req)
261 {
262 	int cc;
263 
264 	cc = 1;
265 	asm volatile(
266 		"0:	lsctl	0(%1)\n"
267 		"1:	ipm	%0\n"
268 		"	srl	%0,28\n"
269 		"2:\n"
270 		EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
271 		: "+d" (cc), "+a" (req)
272 		: "m" (*req)
273 		: "cc", "memory");
274 
275 	return cc ? -EINVAL : 0;
276 }
277 #endif /* _ASM_S390_CPU_MF_H */
278