1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2012
4 * Corscience GmbH & Co. KG, <www.corscience.de>
5 * Thomas Weber <weber@corscience.de>
6 * Sunil Kumar <sunilsaini05@gmail.com>
7 * Shashi Ranjan <shashiranjanmca05@gmail.com>
8 *
9 * Derived from Devkit8000 code by
10 * Frederik Kriewitz <frederik@kriewitz.eu>
11 */
12 #include <common.h>
13 #include <twl4030.h>
14 #include <asm/io.h>
15 #include <asm/gpio.h>
16 #include <asm/arch/mmc_host_def.h>
17 #include <asm/arch/mux.h>
18 #include <asm/arch/sys_proto.h>
19 #include <asm/arch/mem.h>
20 #include "tricorder.h"
21 #include "tricorder-eeprom.h"
22
23 DECLARE_GLOBAL_DATA_PTR;
24
25 /*
26 * Routine: board_init
27 * Description: Early hardware init.
28 */
board_init(void)29 int board_init(void)
30 {
31 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
32 /* boot param addr */
33 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
34
35 return 0;
36 }
37
38 /**
39 * get_eeprom - read the eeprom
40 *
41 * @eeprom - pointer to a eeprom struct to fill
42 *
43 * This function will panic() on wrong EEPROM content
44 */
get_eeprom(struct tricorder_eeprom * eeprom)45 static void get_eeprom(struct tricorder_eeprom *eeprom)
46 {
47 int ret;
48
49 if (!eeprom)
50 panic("No eeprom given!\n");
51
52 ret = gpio_request(7, "BMS");
53 if (ret)
54 panic("gpio: requesting BMS pin failed\n");
55
56 ret = gpio_direction_input(7);
57 if (ret)
58 panic("gpio: set BMS as input failed\n");
59
60 ret = gpio_get_value(7);
61 if (ret < 0)
62 panic("gpio: get BMS pin state failed\n");
63
64 gpio_free(7);
65
66 if (ret == 0) {
67 /* BMS is _not_ set, do the EEPROM check */
68 ret = tricorder_get_eeprom(0x51, eeprom);
69 if (!ret) {
70 if (strncmp(eeprom->board_name, "CS10411", 7) != 0)
71 panic("Wrong board name '%.*s'\n",
72 sizeof(eeprom->board_name),
73 eeprom->board_name);
74 if (eeprom->board_version[0] < 'D')
75 panic("Wrong board version '%.*s'\n",
76 sizeof(eeprom->board_version),
77 eeprom->board_version);
78 } else {
79 panic("Could not get board revision\n");
80 }
81 } else {
82 memset(eeprom, 0, TRICORDER_EEPROM_SIZE);
83 }
84 }
85
86 /**
87 * print_hwversion - print out a HW version string
88 *
89 * @eeprom - pointer to the eeprom
90 */
print_hwversion(struct tricorder_eeprom * eeprom)91 static void print_hwversion(struct tricorder_eeprom *eeprom)
92 {
93 size_t len;
94 if (!eeprom)
95 panic("No eeprom given!");
96
97 printf("Board %.*s:%.*s serial %.*s",
98 sizeof(eeprom->board_name), eeprom->board_name,
99 sizeof(eeprom->board_version), eeprom->board_version,
100 sizeof(eeprom->board_serial), eeprom->board_serial);
101
102 len = strnlen(eeprom->interface_version,
103 sizeof(eeprom->interface_version));
104 if (len > 0)
105 printf(" HW interface version %.*s",
106 sizeof(eeprom->interface_version),
107 eeprom->interface_version);
108 puts("\n");
109 }
110
111 /*
112 * Routine: misc_init_r
113 * Description: Configure board specific parts
114 */
misc_init_r(void)115 int misc_init_r(void)
116 {
117 struct tricorder_eeprom eeprom;
118 get_eeprom(&eeprom);
119 print_hwversion(&eeprom);
120
121 twl4030_power_init();
122 status_led_set(0, CONFIG_LED_STATUS_ON);
123 status_led_set(1, CONFIG_LED_STATUS_ON);
124 status_led_set(2, CONFIG_LED_STATUS_ON);
125
126 omap_die_id_display();
127
128 return 0;
129 }
130
131 /*
132 * Routine: set_muxconf_regs
133 * Description: Setting up the configuration Mux registers specific to the
134 * hardware. Many pins need to be moved from protect to primary
135 * mode.
136 */
set_muxconf_regs(void)137 void set_muxconf_regs(void)
138 {
139 MUX_TRICORDER();
140 }
141
142 #if defined(CONFIG_MMC)
board_mmc_init(bd_t * bis)143 int board_mmc_init(bd_t *bis)
144 {
145 return omap_mmc_init(0, 0, 0, -1, -1);
146 }
147 #endif
148
149 #if defined(CONFIG_MMC)
board_mmc_power_init(void)150 void board_mmc_power_init(void)
151 {
152 twl4030_power_mmc_init(0);
153 }
154 #endif
155
156 /*
157 * Routine: get_board_mem_timings
158 * Description: If we use SPL then there is no x-loader nor config header
159 * so we have to setup the DDR timings ourself on the first bank. This
160 * provides the timing values back to the function that configures
161 * the memory. We have either one or two banks of 128MB DDR.
162 */
get_board_mem_timings(struct board_sdrc_timings * timings)163 void get_board_mem_timings(struct board_sdrc_timings *timings)
164 {
165 struct tricorder_eeprom eeprom;
166 get_eeprom(&eeprom);
167
168 /* General SDRC config */
169 if (eeprom.board_version[0] > 'D') {
170 /* use optimized timings for our SDRAM device */
171 timings->mcfg = MCFG((256 << 20), 14);
172 #define MT46H64M32_TDAL 6 /* Twr/Tck + Trp/tck */
173 /* 15/6 + 18/6 = 5.5 -> 6 */
174 #define MT46H64M32_TDPL 3 /* 15/6 = 2.5 -> 3 (Twr) */
175 #define MT46H64M32_TRRD 2 /* 12/6 = 2 */
176 #define MT46H64M32_TRCD 3 /* 18/6 = 3 */
177 #define MT46H64M32_TRP 3 /* 18/6 = 3 */
178 #define MT46H64M32_TRAS 7 /* 42/6 = 7 */
179 #define MT46H64M32_TRC 10 /* 60/6 = 10 */
180 #define MT46H64M32_TRFC 12 /* 72/6 = 12 */
181 timings->ctrla = ACTIM_CTRLA(MT46H64M32_TRFC, MT46H64M32_TRC,
182 MT46H64M32_TRAS, MT46H64M32_TRP,
183 MT46H64M32_TRCD, MT46H64M32_TRRD,
184 MT46H64M32_TDPL,
185 MT46H64M32_TDAL);
186
187 #define MT46H64M32_TWTR 1
188 #define MT46H64M32_TCKE 1
189 #define MT46H64M32_XSR 19 /* 112.5/6 = 18.75 => ~19 */
190 #define MT46H64M32_TXP 1
191 timings->ctrlb = ACTIM_CTRLB(MT46H64M32_TWTR, MT46H64M32_TCKE,
192 MT46H64M32_TXP, MT46H64M32_XSR);
193
194 timings->mr = MICRON_V_MR_165;
195 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
196 } else {
197 /* use conservative beagleboard timings as default */
198 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
199 timings->ctrla = MICRON_V_ACTIMA_165;
200 timings->ctrlb = MICRON_V_ACTIMB_165;
201 timings->mr = MICRON_V_MR_165;
202 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
203 }
204 }
205