1 // SPDX-License-Identifier: GPL-2.0
2
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2022 Linaro Ltd.
5 */
6
7 #include <linux/types.h>
8 #include <linux/io.h>
9 #include <linux/delay.h>
10 #include <linux/pm_runtime.h>
11
12 #include "ipa.h"
13 #include "ipa_uc.h"
14 #include "ipa_power.h"
15
16 /**
17 * DOC: The IPA embedded microcontroller
18 *
19 * The IPA incorporates a microcontroller that is able to do some additional
20 * handling/offloading of network activity. The current code makes
21 * essentially no use of the microcontroller, but it still requires some
22 * initialization. It needs to be notified in the event the AP crashes.
23 *
24 * The microcontroller can generate two interrupts to the AP. One interrupt
25 * is used to indicate that a response to a request from the AP is available.
26 * The other is used to notify the AP of the occurrence of an event. In
27 * addition, the AP can interrupt the microcontroller by writing a register.
28 *
29 * A 128 byte block of structured memory within the IPA SRAM is used together
30 * with these interrupts to implement the communication interface between the
31 * AP and the IPA microcontroller. Each side writes data to the shared area
32 * before interrupting its peer, which will read the written data in response
33 * to the interrupt. Some information found in the shared area is currently
34 * unused. All remaining space in the shared area is reserved, and must not
35 * be read or written by the AP.
36 */
37 /* Supports hardware interface version 0x2000 */
38
39 /* Delay to allow a the microcontroller to save state when crashing */
40 #define IPA_SEND_DELAY 100 /* microseconds */
41
42 /**
43 * struct ipa_uc_mem_area - AP/microcontroller shared memory area
44 * @command: command code (AP->microcontroller)
45 * @reserved0: reserved bytes; avoid reading or writing
46 * @command_param: low 32 bits of command parameter (AP->microcontroller)
47 * @command_param_hi: high 32 bits of command parameter (AP->microcontroller)
48 *
49 * @response: response code (microcontroller->AP)
50 * @reserved1: reserved bytes; avoid reading or writing
51 * @response_param: response parameter (microcontroller->AP)
52 *
53 * @event: event code (microcontroller->AP)
54 * @reserved2: reserved bytes; avoid reading or writing
55 * @event_param: event parameter (microcontroller->AP)
56 *
57 * @first_error_address: address of first error-source on SNOC
58 * @hw_state: state of hardware (including error type information)
59 * @warning_counter: counter of non-fatal hardware errors
60 * @reserved3: reserved bytes; avoid reading or writing
61 * @interface_version: hardware-reported interface version
62 * @reserved4: reserved bytes; avoid reading or writing
63 *
64 * A shared memory area at the base of IPA resident memory is used for
65 * communication with the microcontroller. The region is 128 bytes in
66 * size, but only the first 40 bytes (structured this way) are used.
67 */
68 struct ipa_uc_mem_area {
69 u8 command; /* enum ipa_uc_command */
70 u8 reserved0[3];
71 __le32 command_param;
72 __le32 command_param_hi;
73 u8 response; /* enum ipa_uc_response */
74 u8 reserved1[3];
75 __le32 response_param;
76 u8 event; /* enum ipa_uc_event */
77 u8 reserved2[3];
78
79 __le32 event_param;
80 __le32 first_error_address;
81 u8 hw_state;
82 u8 warning_counter;
83 __le16 reserved3;
84 __le16 interface_version;
85 __le16 reserved4;
86 };
87
88 /** enum ipa_uc_command - commands from the AP to the microcontroller */
89 enum ipa_uc_command {
90 IPA_UC_COMMAND_NO_OP = 0x0,
91 IPA_UC_COMMAND_UPDATE_FLAGS = 0x1,
92 IPA_UC_COMMAND_DEBUG_RUN_TEST = 0x2,
93 IPA_UC_COMMAND_DEBUG_GET_INFO = 0x3,
94 IPA_UC_COMMAND_ERR_FATAL = 0x4,
95 IPA_UC_COMMAND_CLK_GATE = 0x5,
96 IPA_UC_COMMAND_CLK_UNGATE = 0x6,
97 IPA_UC_COMMAND_MEMCPY = 0x7,
98 IPA_UC_COMMAND_RESET_PIPE = 0x8,
99 IPA_UC_COMMAND_REG_WRITE = 0x9,
100 IPA_UC_COMMAND_GSI_CH_EMPTY = 0xa,
101 };
102
103 /** enum ipa_uc_response - microcontroller response codes */
104 enum ipa_uc_response {
105 IPA_UC_RESPONSE_NO_OP = 0x0,
106 IPA_UC_RESPONSE_INIT_COMPLETED = 0x1,
107 IPA_UC_RESPONSE_CMD_COMPLETED = 0x2,
108 IPA_UC_RESPONSE_DEBUG_GET_INFO = 0x3,
109 };
110
111 /** enum ipa_uc_event - common cpu events reported by the microcontroller */
112 enum ipa_uc_event {
113 IPA_UC_EVENT_NO_OP = 0x0,
114 IPA_UC_EVENT_ERROR = 0x1,
115 IPA_UC_EVENT_LOG_INFO = 0x2,
116 };
117
ipa_uc_shared(struct ipa * ipa)118 static struct ipa_uc_mem_area *ipa_uc_shared(struct ipa *ipa)
119 {
120 const struct ipa_mem *mem = ipa_mem_find(ipa, IPA_MEM_UC_SHARED);
121 u32 offset = ipa->mem_offset + mem->offset;
122
123 return ipa->mem_virt + offset;
124 }
125
126 /* Microcontroller event IPA interrupt handler */
ipa_uc_event_handler(struct ipa * ipa)127 static void ipa_uc_event_handler(struct ipa *ipa)
128 {
129 struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
130 struct device *dev = &ipa->pdev->dev;
131
132 if (shared->event == IPA_UC_EVENT_ERROR)
133 dev_err(dev, "microcontroller error event\n");
134 else if (shared->event != IPA_UC_EVENT_LOG_INFO)
135 dev_err(dev, "unsupported microcontroller event %u\n",
136 shared->event);
137 /* The LOG_INFO event can be safely ignored */
138 }
139
140 /* Microcontroller response IPA interrupt handler */
ipa_uc_response_hdlr(struct ipa * ipa)141 static void ipa_uc_response_hdlr(struct ipa *ipa)
142 {
143 struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
144 struct device *dev = &ipa->pdev->dev;
145
146 /* An INIT_COMPLETED response message is sent to the AP by the
147 * microcontroller when it is operational. Other than this, the AP
148 * should only receive responses from the microcontroller when it has
149 * sent it a request message.
150 *
151 * We can drop the power reference taken in ipa_uc_power() once we
152 * know the microcontroller has finished its initialization.
153 */
154 switch (shared->response) {
155 case IPA_UC_RESPONSE_INIT_COMPLETED:
156 if (ipa->uc_powered) {
157 ipa->uc_loaded = true;
158 ipa_power_retention(ipa, true);
159 pm_runtime_mark_last_busy(dev);
160 (void)pm_runtime_put_autosuspend(dev);
161 ipa->uc_powered = false;
162 } else {
163 dev_warn(dev, "unexpected init_completed response\n");
164 }
165 break;
166 default:
167 dev_warn(dev, "unsupported microcontroller response %u\n",
168 shared->response);
169 break;
170 }
171 }
172
ipa_uc_interrupt_handler(struct ipa * ipa,enum ipa_irq_id irq_id)173 void ipa_uc_interrupt_handler(struct ipa *ipa, enum ipa_irq_id irq_id)
174 {
175 /* Silently ignore anything unrecognized */
176 if (irq_id == IPA_IRQ_UC_0)
177 ipa_uc_event_handler(ipa);
178 else if (irq_id == IPA_IRQ_UC_1)
179 ipa_uc_response_hdlr(ipa);
180 }
181
182 /* Configure the IPA microcontroller subsystem */
ipa_uc_config(struct ipa * ipa)183 void ipa_uc_config(struct ipa *ipa)
184 {
185 ipa->uc_powered = false;
186 ipa->uc_loaded = false;
187 ipa_interrupt_enable(ipa, IPA_IRQ_UC_0);
188 ipa_interrupt_enable(ipa, IPA_IRQ_UC_1);
189 }
190
191 /* Inverse of ipa_uc_config() */
ipa_uc_deconfig(struct ipa * ipa)192 void ipa_uc_deconfig(struct ipa *ipa)
193 {
194 struct device *dev = &ipa->pdev->dev;
195
196 ipa_interrupt_disable(ipa, IPA_IRQ_UC_1);
197 ipa_interrupt_disable(ipa, IPA_IRQ_UC_0);
198 if (ipa->uc_loaded)
199 ipa_power_retention(ipa, false);
200
201 if (!ipa->uc_powered)
202 return;
203
204 pm_runtime_mark_last_busy(dev);
205 (void)pm_runtime_put_autosuspend(dev);
206 }
207
208 /* Take a proxy power reference for the microcontroller */
ipa_uc_power(struct ipa * ipa)209 void ipa_uc_power(struct ipa *ipa)
210 {
211 static bool already;
212 struct device *dev;
213 int ret;
214
215 if (already)
216 return;
217 already = true; /* Only do this on first boot */
218
219 /* This power reference dropped in ipa_uc_response_hdlr() above */
220 dev = &ipa->pdev->dev;
221 ret = pm_runtime_get_sync(dev);
222 if (ret < 0) {
223 pm_runtime_put_noidle(dev);
224 dev_err(dev, "error %d getting proxy power\n", ret);
225 } else {
226 ipa->uc_powered = true;
227 }
228 }
229
230 /* Send a command to the microcontroller */
send_uc_command(struct ipa * ipa,u32 command,u32 command_param)231 static void send_uc_command(struct ipa *ipa, u32 command, u32 command_param)
232 {
233 struct ipa_uc_mem_area *shared = ipa_uc_shared(ipa);
234 const struct reg *reg;
235 u32 val;
236
237 /* Fill in the command data */
238 shared->command = command;
239 shared->command_param = cpu_to_le32(command_param);
240 shared->command_param_hi = 0;
241 shared->response = 0;
242 shared->response_param = 0;
243
244 /* Use an interrupt to tell the microcontroller the command is ready */
245 reg = ipa_reg(ipa, IPA_IRQ_UC);
246 val = reg_bit(reg, UC_INTR);
247
248 iowrite32(val, ipa->reg_virt + reg_offset(reg));
249 }
250
251 /* Tell the microcontroller the AP is shutting down */
ipa_uc_panic_notifier(struct ipa * ipa)252 void ipa_uc_panic_notifier(struct ipa *ipa)
253 {
254 if (!ipa->uc_loaded)
255 return;
256
257 send_uc_command(ipa, IPA_UC_COMMAND_ERR_FATAL, 0);
258
259 /* give uc enough time to save state */
260 udelay(IPA_SEND_DELAY);
261 }
262